KR20040080594A - Method for removing defect in landing plug poly formation process - Google Patents

Abstract

PURPOSE: A method is provided to prevent bridge between poly plugs by removing slit and gum defects in LPP(Landing Plug Poly) forming process. CONSTITUTION: An interlayer dielectric(32) is formed on a substrate(31). A landing plug contact is formed by selectively etching the interlayer dielectric. A polysilicon layer is formed in the landing plug contact. A plurality of LPPs(33) are formed by CMP(Chemical Mechanical Polishing) of the polysilicon layer. Slit and gum defects are removed by cleaning the resultant structure using 4:1 H2SO4 chemicals.

Description

Method for removing defect in landing plug poly formation process

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for removing slit and gum defects generated in a landing plug poly forming process.

As the demand for semiconductor memory devices has soared, various techniques for obtaining high capacity capacitors have been proposed. The capacitor is a structure in which a dielectric film is interposed between the storage node and the plate node, and its capacity is proportional to the node surface area and the dielectric constant of the dielectric film, and inversely proportional to the spacing between the nodes, that is, the thickness of the dielectric film.

Meanwhile, as the integration of semiconductor devices proceeds, the height thereof is relatively increasing to compensate for the size of the storage node, which becomes smaller in order to secure required capacity. For example, storage nodes are currently formed by etching 20000 산화 thick oxide films.

Hereinafter, a manufacturing method of a conventional semiconductor device for forming a storage node will be briefly described.

First, several transistors are formed on a semiconductor substrate, and then a first interlayer insulating film made of an oxide film is deposited on the entire region of the substrate to cover the transistors. Then, the first interlayer insulating layer is etched to form a landing plug contact (hereinafter referred to as LPC), a polysilicon layer is deposited, and subsequently, the polysilicon layer is subjected to CMP (Chemical Mechanical Polishing) of the substrate. Several Landing Plug Polys (hereinafter referred to as LPPs) are formed in contact with the junction region.

Next, after the bit line is formed through a conductive film deposition and etching process on a specific LPP, a second interlayer insulating film made of an oxide film is deposited on the first interlayer insulating film including the bit line to a thickness of approximately 20000 Å. Then, the second interlayer dielectric layer is etched to form a storage node contact that exposes any LPP, and then a polysilicon layer is deposited and CMP is formed to form a poly plug in the storage node contact. do.

A storage node in contact with the poly plug is then formed on the second interlayer insulating film.

However, the manufacturing method of the conventional semiconductor device as described above has the following problems.

In general, in order to form LPP, deposition of a polysilicon film and CMP are performed. In this case, a slurry residue or a small amount of particles remain after the CMP. However, according to the high integration of the device, as the pattern size decreases, slurry residues or particles remaining after CMP appear as slit defects and gum defects on the oxide film between the LPPs.

Thus, in order to remove slit defects and gum defects after the formation of LPP, cleaning using a chemical mixture of H 2 O: H 2 SO 4 in 50: 1 has been performed. Since all of the defects are not completely removed, a bridge is caused between the adjacent poly plugs after the formation of the poly plug, which causes device fail.

In detail, FIGS. 1A and 1B are cross-sectional views illustrating a state in which the slit defect 10 and the gum defect 20 are not removed after cleaning using a chemical of 50: 1 H 2 SO 4, respectively. When the subsequent process proceeds with the 10 and the gum defect 20 remaining, as shown in FIGS. 1B and 2B, the slit type defect and the gum defect respectively form the storage node contact C. It is removed from the post-cleaning during etching to form, so that, as shown in FIGS. 1C and 2C, the bridge B between adjacent poly plugs 5, 15 after formation of the poly plugs 5, 15. ), And as a result, element failing occurs.

1A to 1C and 2A to 2C, unexplained reference numerals 1 and 11 are semiconductor substrates, 2 and 12 are first interlayer insulating films, 3 and 13 are LPPs, 4 and 14 are bit lines, 5 and 15 Denotes a second interlayer insulating film, respectively.

Accordingly, an object of the present invention is to provide a defect removal method capable of completely removing both the slit defect and the gum defect generated in the LPP forming process.

Another object of the present invention is to provide a defect removal method capable of preventing the occurrence of device failure due to slit defect and gum defect.

1A to 1C are cross-sectional views illustrating device fail generation due to slit defects.

2A to 2C are cross-sectional views illustrating device fail generation due to gum defects.

3A to 3C are cross-sectional views of processes for explaining a defect removing method according to a first embodiment of the present invention.

Figures 4a to 4c is a cross-sectional view for each process for explaining a defect removal method according to a second embodiment of the present invention.

5A to 5C are cross-sectional views illustrating processes for explaining a defect removing method according to a third embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

31,41,51: semiconductor substrate 32,42,52: first interlayer insulating film

33,43,53: LPP 34,44,54: Bitline

35,45,55: Poly Plug C: Storage Node Contact

D: Defect

In order to achieve the above object, the present invention provides a semiconductor substrate comprising an interlayer insulating film; Etching the interlayer insulating film to form an LPC; Depositing a polysilicon film on the interlayer insulating film so that the LPC is embedded; CMP said polysilicon film to form several LPPs; And cleaning the substrate resultant using 4: 1 H2SO4 chemical to remove all of the slit and gum defects generated on the interlayer insulating film portion between the LPPs. do.

The cleaning of the substrate resultant using 4: 1 H2SO4 chemical may include: first cleaning the 4: 1 H2SO4 chemical, and second cleaning the resultant substrate of the first cleaned substrate with 300: 1 BOE chemical. And a third step of cleaning the second cleaned substrate product with SC-1 (H 2 SO 4 + H 2 O 2 + H 2 O) chemical, and the second cleaning using the 300: 1 BOE chemical is performed for 10 to 200 seconds. The third cleaning using the SC-1 chemical is performed for 500 to 700 seconds. In addition, the three-stage cleaning is performed by turning on or off megasonic.

In addition, in order to achieve the above object, the present invention provides a semiconductor substrate formed with an oxide film; Etching the oxide layer to form an LPC; Depositing a polysilicon film on an oxide film so that the LPC is embedded; CMP said polysilicon film to form several LPPs; Simultaneously removing both the slit and the gum defect generated on the oxide film when the LPP is formed; And forming an interlayer insulating film between the LPPs.

Here, the removal of the oxide film and the defect may be performed by immersing the substrate product in a 10: 1 HF chemical for 30 to 180 seconds, or immersing the substrate product in a 9: 1 BOE chemical for 120 to 600 seconds. Proceed to At this time, the immersion time is adjusted according to the type of the oxide film.

Furthermore, in order to achieve the above object, the present invention provides a method for manufacturing a semiconductor substrate comprising: providing a semiconductor substrate having a first interlayer insulating film formed thereon; Etching the first interlayer insulating film to form an LPC; Depositing a polysilicon film on a first interlayer insulating film so that the LPC is embedded; CMP the polysilicon film to form several LPPs higher than the surface of the first interlayer dielectric film; Cleaning the substrate resultant so that defects generated during LPP formation are adsorbed to a portion of the first interlayer insulating film between the LPPs; Forming a bit line on the first interlayer insulating film; And forming a second interlayer insulating film on the resultant material so that the defect is buried.

According to the present invention, both the slit defect and the gum defect can be completely removed by changing the chemical, removing the interlayer insulating film including the defect, or changing the formation height of the LPP. Accordingly, the slit defect And generation of device fail due to gum defect can be effectively prevented.

(Example)

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3A to 3C are cross-sectional views illustrating processes for explaining a defect removing method according to a first embodiment of the present invention.

Referring to FIG. 3A, a first interlayer insulating film 32 is deposited on a semiconductor substrate 31 on which a predetermined lower structure including a transistor is formed, and the surface thereof is planarized. Then, the first interlayer insulating film 32 is etched according to a known LPC process, and then a polysilicon film is deposited on the entire surface of the substrate 31, followed by CMP to form the LPP 33.

Here, during the CMP, slurry residues or residues remain due to differences in removal rates between materials to be polished, and these become slit defects and gum defects. Thus, to remove this defect, the substrate result is cleaned using 4: 1 H2SO4 chemical, that is, H2O and H2SO4 in a ratio of 4: 1, instead of the existing 50: 1 H2SO4 chemical. do.

More specifically, in order to completely remove both the slit and the gum defect, first, the substrate result is cleaned using 4: 1 H2SO4 chemical. The resulting product is then cleaned for 10-200 seconds, preferably 50 seconds, using 300: 1 BOE chemical, followed by 500-1 using SC-1 (H2SO4 + H2O2 + H2O) chemical. The cleaning is performed for 700 seconds, preferably 600 seconds. In this case, the three-stage cleaning is performed by turning on or off the megasonic.

In this case, since the 4: 1 H2SO4 chemical has an excellent ability to remove slit defects and gum defects compared to 50: 1 H2SO4 chemicals, it is possible to completely remove both the slit defects and the gum defects.

Referring to FIG. 3B, a bit line 34 is formed on the first interlayer insulating layer 32. Then, the resultant second interlayer insulating film (not shown) is deposited to cover the bit line 34, and the surface thereof is planarized. Subsequently, the second interlayer dielectric layer is etched to form a storage node contact C exposing the LPP 33, and then post-cleaning using 300: 1 BOE chemical is performed on the substrate resultant.

At this time, since the slit defect and the gum defect have already been removed by cleaning using 4: 1 H2SO4 chemical, the defect due to the removal of the slit and the gum defect is not caused during the post cleaning using the 300: 1 BOE chemical. .

Referring to FIG. 3C, a polysilicon film is deposited on the second interlayer insulating film, and then CMP is formed to form a poly plug 35 in contact with the LPP 33.

Subsequently, although not shown, a storage node in contact with the poly plug is formed on the second interlayer insulating layer, and then a subsequent series of known processes are performed.

As described above, the method of the present invention eliminates defects in post cleaning after storage node contact etching because the slit defects and gum defects generated after CMP during LPP formation are completely removed by cleaning with 4: 1 H2SO4 chemical. Can be prevented from occurring.

Therefore, it is possible to prevent the occurrence of bridges between adjacent poly plugs after the subsequent poly plug formation, so that device failure due to defects can be prevented.

4A to 4C are cross-sectional views of processes for describing a defect removing method according to a second embodiment of the present invention.

Referring to FIG. 4A, an oxide film (not shown) is deposited on a semiconductor substrate 41 on which a predetermined lower structure including a transistor is formed, and then the surface thereof is planarized. Then, certain portions of the oxide film are etched according to a known LPC process, and then a polysilicon film is deposited, followed by CMP to form the LPP 43.

The substrate resultant is then immersed in a 10: 1 HF chemical for 30-180 seconds to dip out the oxide film between the LPPs 43. At this time, the oxide film may be dip-out by immersing in 9: 1 BOE chemical for 120 to 600 seconds, preferably 300 seconds instead of 10: 1 HF chemical, and the immersion in the chemical is appropriately depending on the type of oxide film Can be adjusted.

Here, after the CMP for forming the LPP 43, slit defects and gum defects may occur on the portion of the oxide film between the LPPs 43. However, since the oxide film is subsequently diped out using 10: 1 HF chemical, the defects are also removed in the process.

Referring to FIG. 4B, an oxide film is again deposited on the substrate resultant and then planarized to form a first interlayer insulating film 42 that insulates the LPPs 43 from each other. At this time, the first interlayer insulating film 42 is formed so that its surface is higher than that of the LPP 43.

Referring to FIG. 4C, after forming the bit line 44 on the substrate resultant, a second interlayer insulating film (not shown) is formed on the entire area of the substrate to cover the bit line 44. Then, the second interlayer insulating film is etched to form a storage node contact C exposing the LPP 43, and thereafter, post-cleaning is performed, followed by deposition of a polysilicon film and CMP thereto. 45).

According to this embodiment, by removing the oxide film after the formation of the LPP, defects generated on the oxide film can also be completely removed together, thereby preventing the device failing from occurring subsequently.

5A to 5C are cross-sectional views of processes for explaining a defect removing method according to a third embodiment of the present invention.

Referring to FIG. 5A, a first interlayer insulating film 52 is deposited on a semiconductor substrate 51 on which a predetermined lower structure including a transistor is formed, and then the surface thereof is planarized. Then, the first interlayer insulating film 52 is etched according to a known LPC process, and then a polysilicon film is deposited on the entire surface of the substrate 51, followed by CMP to form the LPP 53. At this time, the LPP 53 is formed such that its surface is higher than that of the first interlayer insulating film 52.

Here, after the CMP for forming the LPP 53, the slit defect and the gum defect D are generated on the portion of the first interlayer insulating film between the LPPs 53.

Referring to FIG. 5B, the substrate result is cleaned using 50: 1 H 2 SO 4 chemical. At this time, the defect D generated when the LPP 53 is formed is adsorbed on the portion of the first interlayer insulating film between the LPPs 53. Then, the bit line 54 is formed on the first interlayer insulating film 52 according to a known process. Subsequently, a second interlayer insulating film (not shown) is deposited on the resultant to cover the bit line 54, and then the surface of the bit line 54 is planarized. At this time, the defect (D) is completely buried.

Next, predetermined portions of the second interlayer insulating film are etched to form a storage node contact C exposing the LPP 53, and then post-cleaning is performed on the substrate resultant.

At this time, although the slit and gum defect D remain on the portion of the first interlayer insulating film between the LPPs 53, the slit is related to the formation of the LPP 53 higher than the first interlayer insulating film 52. And gum defect (D) is not removed even upon post-cleaning and therefore does not induce subsequent bridges between adjacent LPPs.

Referring to FIG. 5C, a polysilicon film is deposited on a substrate resultant, and then CMP is formed to form a poly plug 55. At this time, since the defect generated during LPP formation is completely buried by the second interlayer insulating film, the bridge between adjacent poly plugs 55 is not induced as the defect is removed.

As described above, the present invention eliminates the slit defects and the gum defects generated after the CMP for forming LPP, or by investing, as the defects are removed in post-cleaning in subsequent storage node contact etching. It is possible to prevent the occurrence of bridges between the poly plugs, thereby effectively preventing the device failing.

Therefore, the present invention can prevent the device fail, it is possible to improve the device manufacturing yield and reliability.

In addition, this invention can be implemented in various changes in the range which does not deviate from the summary.

Claims (9)

Providing a semiconductor substrate having an interlayer insulating film formed thereon; Etching the interlayer insulating film to form a landing plug contact; Depositing a polysilicon film on the interlayer insulating film so as to fill the landing plug contact; CMP said polysilicon film to form several landing plug polys; And Cleaning the substrate resultant using a 4: 1 H2SO4 chemical to remove both slit and gum defects generated on the interlayer insulating film portion between the landing plug polys. How to remove defects. The method of claim 1, wherein the cleaning of the substrate resultant using 4: 1 H2SO4 chemical Primary cleaning with the 4: 1 H2SO4 chemical, secondary cleaning of the primary cleaned substrate product with 300: 1 BOE chemical, and SC-1 (H2SO4 + H2O2) with the secondary cleaned substrate product + H2O) The defect removal method of the landing plug poly forming process, characterized in that the step consisting in the third cleaning with a chemical. The landing plug of claim 1, wherein the second cleaning using the 300: 1 BOE chemical is performed for 10 to 200 seconds and the third cleaning using the SC-1 chemical is performed for 500 to 700 seconds. Defect removal method in poly forming process. 3. The method of claim 2, wherein the cleaning of the third step is performed by turning on or off a megasonic. Providing a semiconductor substrate having an oxide film formed thereon; Etching the oxide layer to form a landing plug contact; Depositing a polysilicon film on an oxide film to fill the landing plug contact; CMP said polysilicon film to form several landing plug polys; Removing both the slit and gum defects generated on the oxide film when the landing plug poly is formed while the oxide film is removed; And And forming an interlayer insulating film between the landing plug polys. The method of claim 5, wherein the oxide film and the defect are removed by immersing the substrate product in a 10: 1 HF chemical for 30 to 180 seconds. 6. The method of claim 5, wherein the oxide film and the defect are removed by immersing the substrate product in a 9: 1 BOE chemical for 120 to 600 seconds. 8. The method of claim 6 or 7, wherein the immersion time of the substrate resultant is controlled according to the type of oxide film. Providing a semiconductor substrate having a first interlayer insulating film formed thereon; Etching the first interlayer insulating film to form a landing plug contact; Depositing a polysilicon film on a first interlayer insulating film to fill the landing plug contact; CMPing the polysilicon film to form several landing plug polys higher than the surface of the first interlayer dielectric film; Cleaning the substrate resultant so that defects generated during the formation of the landing plug poly are adsorbed to a portion of the first interlayer insulating film between the landing plug polys; Forming a bit line on the first interlayer insulating film; And And forming a second interlayer insulating film on the resultant material so that the defect is buried.