KR20040077188A - Liquid Crystal Display and Common Voltage adjusting Method and Apparatus Thereof - Google Patents

Abstract

PURPOSE: An LCD device is provided to set a voltage value of a common voltage by using digital control data, thereby reducing a process time and exactly setting the voltage value with which a flicker is minimized. CONSTITUTION: An LCD device(40) comprises as follows. A data driver(24) drives data lines(DL1-DLm) of an LCD panel(22). A gate driver(26) drives gate lines(GL0-GLn) of the LCD panel(22). A timing controller(28) controls a driving timing of the data driver(24) and the gate driver(26). A common voltage supplier(30) supplies a common voltage(Vcom) to a liquid crystal cell. The timing controller(28) is supplied with a synchronous signal and data from a computer(36), and supplies the signal and the data to the data driver(24).

Description

Liquid Crystal Display and Common Voltage Adjusting Method and Apparatus {Liquid Crystal Display and Common Voltage adjusting Method and Apparatus Thereof}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a method and apparatus for adjusting the common voltage thereof, which enable the voltage value of the common voltage to be set using digital data supplied from the outside.

The liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the liquid crystal display device includes a liquid crystal panel having a pixel matrix and a driving circuit for driving the liquid crystal panel. The driving circuit drives the pixel matrix so that the image information is displayed on the display panel.

1 is a view showing a conventional liquid crystal display device.

Referring to FIG. 1, a conventional liquid crystal display device includes a liquid crystal panel 2, a data driver 4 for driving data lines DL1 to DLm of the liquid crystal panel 2, and a liquid crystal panel 2. A gate driver 6 for driving the gate lines GL0 to GLn, a timing controller 8 for controlling driving timing of the data and gate drivers 4 and 6, and a common voltage Vcom to the liquid crystal cell. It is provided with a common voltage supply unit 10 for supplying.

The timing controller 8 receives a data clock DCLK, a horizontal synchronization signal Hsync, a vertical synchronization signal Vsync, a data enable DE, and data from an external system. The timing controller 8 that receives the data relays the data and supplies the data to the data driver 4. The timing controller 8, which receives the data clock, the horizontal synchronization signal, the vertical synchronization signal, and the data enable, generates control signals such as timing signals and polarity inversion signals for controlling the timing of the data and gate drivers 4 and 6. Done.

The liquid crystal panel 2 is connected to the thin film transistor TFT formed at the intersection of the n gate lines GL1 to GLn and the m data lines DL1 to DLm, and is formed in a matrix form. The liquid crystal cells are arranged as.

The thin film transistor TFT supplies data from the data lines DL1 to DLm to the liquid crystal cell in response to gate signals from the gate lines GL1 to GLn. The liquid crystal cell is composed of a common electrode facing each other with a liquid crystal interposed therebetween, and a pixel electrode connected to the thin film transistor TFT, so that the liquid crystal cell may be equivalently represented as a liquid crystal capacitor Clc. The liquid crystal cell includes a storage capacitor Cst connected to the previous gate line to maintain the data voltage charged in the liquid crystal capacitor Clc until the next data voltage is charged.

The gate driver 6 sequentially supplies gate signals to the gate lines GL1 to GLn according to a control signal from the timing controller 8. The data driver 4 converts the data R, G, and B supplied from the timing controller 8 into a video signal, which is an analog signal, and converts the data signal 4 into one video signal every 1 horizontal period in which the gate signals are supplied to the gate lines GL1 to GLn. The video signal for the horizontal line is supplied to the data lines DL1 to DLm.

The data driver 4 selects a gamma voltage having a predetermined DC level according to the luminance values of the data R, G, and B, and supplies the selected gamma voltage to the data lines DL1 to DLm.

The common voltage generator 10 generates a common voltage Vcom and supplies the generated common voltage Vcom to a common electrode which is one side of the liquid crystal capacitor Clc. The common voltage generator 14 is common with the third and fourth resistors R3 and R4 and the third resistor R3 to divide the voltage of the common voltage source Vc supplied from the outside as shown in FIG. 2. A variable resistor Rv is provided between the voltage sources Vc. The common voltage Vcom is extracted at the output terminal between the third and fourth resistors R3 and R4. The resistance value of the variable resistor Rv is set such that a desired common voltage Vcom can be applied to the fourth resistor R4.

Since the conventional liquid crystal display device is generally driven in an inversion method, the video signal supplied to the data lines DL1 to DLm is divided into a positive video signal and a sub video signal. That is, when a gate signal is sequentially supplied to the gate lines GL1 to GLn as shown in FIG. 3, a positive or negative video signal is commonly supplied to the data lines DL1 to DLm. do.

The video signals supplied to the data lines DL1 to DLm are charged in the liquid crystal cell until the next video signals are supplied. At this time, a predetermined image is displayed on the liquid crystal panel 2 corresponding to the video signals charged in the liquid crystal cell. At this time, the image actually displayed on the liquid crystal panel 2 is displayed by the difference value between the charged video signal and the common voltage Vcom. Therefore, conventionally, the quality of the image displayed on the liquid crystal panel 2 is determined according to the voltage value of the common voltage Vcom.

In other words, if the common voltage Vcom is set low (or high), flicker occurs in the liquid crystal panel 2. Accordingly, conventionally, the voltage value of the common voltage Vcom is adjusted to an optimum value using the resistance value of the variable resistor Rv shown in FIG. 2.

In detail, first, after the liquid crystal display device is completed, the liquid crystal display device 12 and the computer 14 are connected as shown in FIG. 4. After the computer 14 and the liquid crystal display device 12 are connected, the computer 14 supplies the predetermined data and synchronization signals to the liquid crystal display device 12 by the operator's control. A predetermined image is displayed. Thereafter, the operator finds a resistance value of the variable resistor Rv in which flicker is minimized while adjusting the resistance value of the variable resistor Rv included in the common voltage generator 10 (that is, the optimum common voltage Vcom). Value), and the liquid crystal display device 12 is shipped after the variable resistor Rv is fixed to a resistance value that minimizes flicker.

However, in such a conventional liquid crystal display device, since the operator manually sets the resistance value of the variable resistor Rv (manual setting using a driver or the like), a lot of processing time is required to set the resistance value of the variable resistor Rv. There is a problem that is consumed. In addition, since the operator manually adjusts the resistance value of the variable resistor Rv, it is difficult to accurately set the voltage value of the common voltage Vcom in which flicker is minimized.

Accordingly, an object of the present invention is to provide a liquid crystal display device and a method and apparatus for adjusting the common voltage thereof, which enable the voltage value of the common voltage to be set using digital data supplied from the outside.

1 is a view showing a conventional liquid crystal display device.

FIG. 2 is a circuit diagram illustrating a common voltage generator shown in FIG. 1. FIG.

3 is a diagram illustrating a driving waveform supplied to a conventional gate line, a data line, and a common electrode.

4 is a view showing a state in which a conventional liquid crystal display device is connected to a computer in order to adjust the common voltage of the conventional liquid crystal display device.

5 is a view showing a liquid crystal display device and a computer connected thereto according to an embodiment of the present invention.

FIG. 6 is a diagram illustrating in detail a common voltage generator illustrated in FIG. 5;

FIG. 7 is a diagram illustrating a common voltage regulator connected to the liquid crystal display shown in FIG. 5.

<Description of Symbols for Main Parts of Drawings>

2,22 LCD panel 4,24 Data driver

6,26: Gate Driver 8,28: Timing Control

10,30: common voltage generator 12,40: liquid crystal display device

14,36: Computer 32: Interface

34: EEPROM 42: Camera

44: image determination unit

In order to achieve the above object, the liquid crystal display device of the present invention includes a liquid crystal panel in which an image is displayed, a thin film transistor arranged in a matrix form on the liquid crystal panel, a pixel electrode connected to the thin film transistor, a pixel electrode interposed between the liquid crystal, A common electrode disposed to face each other; A timing controller for generating a timing control signal using a synchronization signal supplied from an external system; A common voltage generator for generating a common voltage supplied to the common electrode; The voltage value of the common voltage is set by digital control data supplied from an external system.

The common voltage generator is connected to a common voltage source, a plurality of voltage divider resistors for dividing a voltage value of the common voltage source, a plurality of switching elements connected to the voltage divider resistors to output a divided voltage value, and an external system. And an controller configured to receive digital control data supplied through an interface from an external system and to turn on any one of the plurality of switching elements in response to the supplied digital control data.

The divided voltage value supplied via the turned-on switching element is used as a common voltage.

The controller turns on one of the switching elements of the plurality of switch elements so that a common voltage for minimizing flicker may be supplied to the common electrode in the image displayed on the liquid crystal panel.

Control data for turning on a switching device for outputting a divided voltage for minimizing the flicker is stored in the controller so that the common voltage for minimizing the flicker is always supplied to the common electrode.

The control unit may be a memory device capable of storing the control data.

The controller may be any one of an EEPROM, a memory, and an SRAM.

The common voltage regulator of the liquid crystal display device of the present invention checks the camera for detecting the image displayed on the liquid crystal panel, and checks the flicker included in the image detected by the camera, and increases or decreases the digital data corresponding to the checked flicker. And an image determining unit for supplying a control signal to the external system.

The common voltage adjusting method of the liquid crystal display of the present invention includes supplying control data to the common voltage generator, generating a common voltage corresponding to the control data from the common voltage generator, and supplying the common voltage to the liquid crystal panel. Displaying the image, checking the flicker displayed on the image, increasing or decreasing the control data so that a common voltage that can minimize flicker is supplied to the image, and controlling the flicker to be minimized. The value of the data is stored in the common voltage generator.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 5 to 7.

5 is a view showing a liquid crystal display device according to an embodiment of the present invention.

Referring to FIG. 5, the liquid crystal display device 40 according to an exemplary embodiment of the present invention includes a liquid crystal panel 22 and a data driver 24 for driving the data lines DL1 to DLm of the liquid crystal panel 22. A gate driver 26 for driving the gate lines GL0 to GLn of the liquid crystal panel 22, a timing controller 28 for controlling the driving timing of the data and gate drivers 24 and 26; A common voltage supply unit 30 is provided to supply a common voltage Vcom to the liquid crystal cell.

The timing controller 28 receives a synchronization signal and data from the outside (here, the computer 36). The timing controller 28 receiving the data relays the data and supplies the data to the data driver 24. The timing controller 28 receiving the synchronization signals generates control signals for driving the data driver 24 and the gate driver 26, and supplies them to the data driver 24 and the gate driver 26, respectively.

The liquid crystal panel 22 is connected to the thin film transistor TFT formed at the intersection of the n gate lines GL1 to GLn and the m data lines DL1 to DLm, and is formed in a matrix form. The liquid crystal cells are arranged as.

The thin film transistor TFT supplies data from the data lines DL1 to DLm to the liquid crystal cell in response to gate signals from the gate lines GL1 to GLn. The liquid crystal cell is composed of a common electrode facing each other with a liquid crystal interposed therebetween, and a pixel electrode connected to the thin film transistor TFT, so that the liquid crystal cell may be equivalently represented as a liquid crystal capacitor Clc. The liquid crystal cell includes a storage capacitor Cst connected to the previous gate line to maintain the data voltage charged in the liquid crystal capacitor Clc until the next data voltage is charged.

The gate driver 26 sequentially supplies gate signals to the gate lines GL1 to GLn according to a control signal from the timing controller 28. The data driver 24 converts the data (R, G, B) supplied from the timing controller 28 into a video signal, which is an analog signal, so that 1 per horizontal period in which the gate signal is supplied to the gate lines GL1 to GLn. The video signal for the horizontal line is supplied to the data lines DL1 to DLm.

The common voltage generator 30 generates a common voltage Vcom and supplies the generated common voltage Vcom to a common electrode which is one side electrode of the liquid crystal capacitor Clc. At this time, the common voltage generator 30 sets the voltage value of the common voltage Vcom in response to digital control data supplied from the outside.

To this end, the common voltage generator 10 may include an interface 32, an EP-ROM (hereinafter referred to as “EEPROM”) 34, and a common voltage source Vc as shown in FIG. 6. ; Dividing resistors R1 to Ri for dividing the voltage value of the common voltage source Vc and switching elements Sw1 to Swi-1 connected to the dividing resistors R1 to Ri are provided.

The interface 32 connects the common voltage generator 30 with an external device (here, the computer 36) for supplying control data. The EEPROM 34 turns on any one of the plurality of switches SW1 to Swi-1 in response to control data supplied from the external device via the interface 32. Meanwhile, in the present invention, not only the EEPROM 34 but also various devices (control unit) capable of turning on the switches Sw1 to Swi-1 in correspondence to the control data may be used. For example, memory devices such as flash memory and SRAM may be used as the control unit instead of the EEPROM 34.

The divided resistors R1 to Ri divide the voltage value of the common voltage source Vc. The switches Sw1 to Swi-1 are connected to the voltage dividers R1 to Ri and turned on by the control of the EEPROM 34. In this case, the divided voltage supplied through the turned-on switches Sw1 to Swi-1 is supplied to the liquid crystal panel 22 as the common voltage Vcom.

The setting process of the common voltage Vcom will be described in detail. First, after the liquid crystal display device 40 is completed, the liquid crystal display device 40 is connected to the computer 36 by an operator. At this time, the timing controller 28 is connected to receive data and synchronization signals from the computer 36, and the common voltage generator 30 is connected to receive control data from the computer 36. .

After the liquid crystal display 40 and the computer 36 are connected, the operator controls the computer 36 so that predetermined data and synchronization signals are supplied to the liquid crystal display 40. At this time, the liquid crystal panel 22 displays a predetermined image corresponding to predetermined data. Thereafter, the operator controls the computer 36 to supply predetermined control data to the common voltage generator 30. At this time, the control data has a size of j (j is a natural number) bits, for example, 4 bits, so as to be sequentially increased (0000, 0001, 0010, ...) or sequentially lowered (1111, 1110, 1101, ...). .) It is supplied to the common voltage generator 30.

Control data supplied from the computer 36 is supplied to the controller, that is, the EEPROM 34 via the interface 32. The EEPROM 34 turns on any one of the plurality of switches Sw1 to Swi-1 (one of Sw1 to Swi-1) in response to the control data supplied thereto. The operator monitors the liquid crystal panel 22 and checks the flicker corresponding to the common voltage Vcom currently supplied. Here, the operator sets a common voltage Vcom value in which flicker is minimized, and the control data to which the common voltage Vcom value is output is stored in the EEPROM 34. The control data is stored in the EEPROM 34 so that the common voltage Vcom value of the flicker is minimized by outputting the control data. The liquid crystal display 40 stores the control data in which the flicker is minimized. Will be shipped.

In the present invention as described above, the process time for adjusting the voltage value of the common voltage Vcom can be shortened by using the control data supplied from the computer 36. In addition, since the common voltage Vcom is set using the control data, the voltage value of the common voltage Vcom in which flicker is minimized can be set accurately.

Meanwhile, in the present invention, the common voltage Vcom may be set using the camera 42 and the image determining unit 44 as shown in FIG. 7.

In detail, first, after the liquid crystal display device 40 is completed, the liquid crystal display device 40 is connected to the computer 36 by an operator. At this time, the timing controller 28 is connected to receive data and synchronization signals from the computer 36, and the common voltage generator 30 is connected to receive control data from the computer 36. .

After the liquid crystal display 40 and the computer 36 are connected, the operator controls the computer 36 so that predetermined data and synchronization signals are supplied to the liquid crystal display 40. At this time, the liquid crystal panel 22 displays a predetermined image corresponding to predetermined data.

The camera 42 supplies the image displayed on the liquid crystal panel 22 to the image determining unit 44. The image determination unit 44 checks the flicker included in the image supplied from the camera 42. At this time, if a flicker containing a large number of images supplied from the camera 42 is included, the image determining unit 44 supplies a control signal for requesting a change (increase or decrease) of control data to the computer 42.

The computer 42 supplied with the control signal from the image determining unit 44 increases or decreases the control data and supplies the same to the common voltage generator 30. The control data supplied from the computer 36 is supplied to the control unit, that is, the EEPROM 34 via the interface 32. The EEPROM 34 corresponds to the control data supplied to the control unit 34 so as to correspond to the control data supplied thereto. The switch of any one of Swi-1) (Sw1 to Swi-1) is turned on.

On the other hand, this process is repeated until the image on which the flicker is minimized is displayed on the liquid crystal panel 22. Thereafter, when the image on which the flicker is minimized is displayed on the liquid crystal panel 22, the image determining unit 44 does not supply the control signal to the computer 36. Therefore, the control data is no longer increased or decreased. (I.e., control data for minimizing flicker is stored in the EEPROM 34.) Thereafter, control data for minimizing flicker is stored in the EEPROM 34. 40 is to be shipped.

In the present invention as described above, the process time for adjusting the voltage value of the common voltage Vcom can be shortened by using the control data supplied from the computer 36. In addition, since the common voltage Vcom is set using the control data, the voltage value of the common voltage Vcom in which flicker is minimized can be set accurately. In addition, since the image determining unit 44 determines the image in which flicker is minimized, the common voltage Vcom may be set such that a uniform image is displayed on the liquid crystal panel 22 regardless of the operator's state.

As described above, according to the liquid crystal display according to the present invention and the method and apparatus for adjusting the common voltage thereof, the process time can be shortened because the voltage value of the common voltage is set using digital control data. In addition, it is possible to accurately set the voltage value of the common voltage to minimize flicker using the digital control data.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (9)

A liquid crystal panel displaying an image, a thin film transistor arranged in a matrix form on the liquid crystal panel, a pixel electrode connected to the thin film transistor, and a common electrode disposed to face the pixel electrode with a liquid crystal interposed therebetween; A timing controller for generating a timing control signal using a synchronization signal supplied from an external system; A common voltage generator for generating a common voltage supplied to the common electrode; And the voltage value of the common voltage is set by digital control data supplied from the external system. The method of claim 1, The common voltage generator Common voltage source, A plurality of voltage divider resistors for dividing the voltage value of the common voltage source; A plurality of switching elements connected to the divided resistors to output the divided voltage value, An interface unit for connecting with the external system; And a controller for receiving the digital control data supplied via the interface from the external system and turning on any one of the plurality of switching elements in response to the supplied digital control data. Liquid crystal display device. The method of claim 2, And a divided voltage value supplied through the turned-on switching element is used as a common voltage. The method of claim 3, wherein The control unit turns on one of the switching elements of the plurality of switch elements so that the common voltage which can minimize flicker in the image displayed on the liquid crystal panel is supplied to the common electrode. LCD display device. The method of claim 4, wherein And a control data for turning on a switching element for outputting a divided voltage for minimizing the flicker so that the common voltage for minimizing the flicker is always supplied to the common electrode. . The method of claim 5, And the controller is a memory device capable of storing the control data. The method of claim 6, And the controller is one of an EEPROM, a memory, and an SRAM. A liquid crystal panel displaying an image, a thin film transistor arranged in a matrix form on the liquid crystal panel, a pixel electrode connected to the thin film transistor, and a common electrode disposed to face the pixel electrode with a liquid crystal interposed therebetween; A liquid crystal comprising a timing controller for generating a timing control signal using a synchronization signal supplied from an external system, and a common voltage generator for generating a common voltage supplied to a common electrode using digital data supplied from the external system. A common voltage regulating device of a display device; A camera for sensing an image displayed on the liquid crystal panel; And an image determining unit for checking flicker included in the image detected by the camera and supplying a control signal corresponding to the checked flicker to the external system to increase or decrease the digital data. Common voltage regulator of the device. Supplying control data to the common voltage generator; Generating a common voltage corresponding to the control data by the common voltage generator and supplying the common voltage to the liquid crystal panel; Displaying an image on the liquid crystal panel; Checking the flicker displayed on the image; Increasing or decreasing the control data so that the common voltage, which can minimize flicker in the image, can be supplied to the liquid crystal panel; And storing the value of the control data to minimize the flicker in the common voltage generator.