KR20040057249A - LCD panel and its driving method - Google Patents

LCD panel and its driving method Download PDF

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KR20040057249A
KR20040057249A KR1020020083880A KR20020083880A KR20040057249A KR 20040057249 A KR20040057249 A KR 20040057249A KR 1020020083880 A KR1020020083880 A KR 1020020083880A KR 20020083880 A KR20020083880 A KR 20020083880A KR 20040057249 A KR20040057249 A KR 20040057249A
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liquid crystal
terminal
gate
thin film
film transistor
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KR1020020083880A
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Korean (ko)
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강필성
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엘지.필립스 엘시디 주식회사
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Priority to KR1020020083880A priority Critical patent/KR20040057249A/en
Publication of KR20040057249A publication Critical patent/KR20040057249A/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

PURPOSE: An LCD(Liquid Crystal Display) and a driving method thereof are provided to solve a voltage drop problem generated during the operation of a liquid crystal capacitor in the LCD. CONSTITUTION: A data line(D1) among a plurality of data lines and a plurality of gate lines including the first and second gate lines(G1,G2) are arranged lengthwise and crosswise. In a liquid crystal driving TFT(Thin Film Transistor)(100), the first terminal(N1) is connected to the first gate line(G1), the second terminal(N2) is connected to the data line(D1) and the third terminal(N3) is connected to terminals of a liquid crystal capacitor(Clc) and a storage capacitor(Cst). In a voltage compensation TFT(200), a gate terminal(200G) is connected to the second gate line(G2) and terminals are connected to the third terminal(N3) of the TFT(100) and a compensation voltage source(300).

Description

액정표시장치 및 그 구동방법{LCD panel and its driving method}Liquid crystal display and its driving method {LCD panel and its driving method}

본 발명은 액정표시장치에 관한 것으로서, 보다 상세하게는 액정커패시터에 인가되는 신호전압의 불균형을 개선하기 위한 액정표시장치의 액정커패시터 전압편차 보상방법 및 그 보상회로에 괸한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal capacitor voltage deviation compensation method of a liquid crystal display device for improving an imbalance of a signal voltage applied to a liquid crystal capacitor, and a compensation circuit thereof.

액정표시장치는 제 1 ,제 2 기판과 상기 두 기판 사이에 형성된 액정으로 구성되는데 특히, 상기 제 1 기판 상에는 매트릭스 형태로 배열되어 단위 화소를 구분짓는 게이트 배선 및 데이터 배선과, 상기 두 배선의 교차 부위에 형성된 박막트랜지스터와, 상기 박막트랜지스터와 전기적으로 연결된 화소전극으로 이루어져 있다.The liquid crystal display device includes a liquid crystal formed between the first and second substrates and the two substrates. In particular, a liquid crystal display device includes a gate wiring and a data wiring arranged in a matrix on the first substrate to distinguish unit pixels, and an intersection of the two wirings. The thin film transistor includes a thin film transistor formed at a portion and a pixel electrode electrically connected to the thin film transistor.

이때, 상기 박막트랜지스터는 상기 게이트 배선과 연결된 게이트 전극과, 액티브층으로서의 역할을 하는 반도체층과, 상기 데이터 배선과 동시에 형성된 소스/드레인 전극의 적층막으로 구성된다.In this case, the thin film transistor includes a gate electrode connected to the gate wiring, a semiconductor layer serving as an active layer, and a stacked film of a source / drain electrode formed simultaneously with the data wiring.

이와 같은 액정표시장치의 화소내 신호기록은 능동 스위치 소자인 상기 박막트랜지스터에 의해 이루어지는데, 박막트랜지스터는 게이트 배선에 인가되는 전압에 따라 데이터 신호를 선택적으로 온/오프(on/off)시키는 역할을 한다.In-pixel signal recording of the liquid crystal display is performed by the thin film transistor, which is an active switch element, and the thin film transistor selectively serves to turn on / off a data signal according to a voltage applied to a gate wiring. do.

한편, 일반적으로 화상신호는 60Hz에서 정(+)부(-)의 기입을 행하여 이루어지며 정의 기입과 정의 표시시간을 더한 것이 제 1 필드, 부의 기입과 부의 표시시간을 더한 것이 제 2 필드로서 양 필드의 합계를 1프레임이라 한다.On the other hand, in general, an image signal is formed by writing a positive part (-) at 60 Hz, and positive writing plus positive display time is added to the first field, negative writing plus negative display time is added to the second field. The sum of the fields is called one frame.

도 1은 일반적인 액정표시장치 패널의 구성에 대한 등가회로를 도시한 도면으로서, 게이트드라이버(미도시)와 소스드라이버(미도시)에서 연장되어 기판(P)상에 구성된 게이트TCP패드(10)와 소스TCP패드(20)를 통해 각각의 서브픽셀로 연결되는 다수의 게이트라인(G1~Gm))과 데이터라인(D1~Dn)이 종횡하여 구성되고, 상기 일 게이트라인과 일 데이터라인 및 액정커패시터(CLC)와 연결되는 박막트랜지스터(TFT)와 상기 액정커패시터와 병렬 연결되어 있는 저장커패시터(CST)로 구성되는 일 서브픽셀이 집합된 액티브영역(A)를 포함하는 연결구조를 간략히 보여주고 있다.FIG. 1 is a diagram illustrating an equivalent circuit of the configuration of a general liquid crystal display panel, and includes a gate TCP pad 10 formed on a substrate P extending from a gate driver (not shown) and a source driver (not shown). A plurality of gate lines G1 to Gm) and data lines D1 to Dn connected to the respective subpixels through the source TCP pad 20 are formed horizontally and horizontally, and the one gate line, one data line, and a liquid crystal capacitor are provided. Briefly illustrates a connection structure including an active region A in which one subpixel composed of a thin film transistor TFT connected to a C LC and a storage capacitor C ST connected in parallel with the liquid crystal capacitor is assembled. have.

도 2는 상기 액정패널의 액티브영역을 구성하는 일 서브픽셀에 대한 등가회로도로서, 데이터드라이버에서 상기 각 데이터라인(D1~Dn)들에 데이터를 인가하고 게이트라인에 전압을 인가하여 스위치역할을 하는 박막트랜지스터(TFT)를 ON시킴으로서 상기 액정커패시터(CLC)에 전하를 충전시킨다. 상기 충전된 전하는 다음번 충전때까지 유지되어야 하는데 도 3의 액정커패시터(CLC)에 인가되는 신호파형 예시도에서 보듯이, 상기 박막트랜지스터, 게이트 또는 데이터라인의 내부저항, 저장커패시터(CST)의 용량 및 동작여부 등에 의한 △Vp로 표시한 전압편차(즉, 전압강하문제)가 발생하게 되고, 이는 플리커 또는 화면잔상 등의 문제점들을 발생시키는 원인이 되고 있다.FIG. 2 is an equivalent circuit diagram of one subpixel constituting an active region of the liquid crystal panel, and a data driver acts as a switch by applying data to each of the data lines D1 to Dn and applying a voltage to a gate line. The thin film transistor TFT is turned on to charge the liquid crystal capacitor C LC . The charged charge should be maintained until the next charge, as shown in the signal waveform applied to the liquid crystal capacitor C LC of FIG. 3, the internal resistance of the thin film transistor, the gate or the data line, and the storage capacitor C ST . The voltage deviation (that is, the voltage drop problem) expressed by ΔVp occurs due to the capacity and operation, etc., which causes problems such as flicker or afterimages.

상기 도시된 파형은 공통전극전압(Vcom)과 게이트배선전압(Vg), 데이터배선전압(Vd), 액정커패시터 양단전압(VLC(t))(즉, 화소전극전압)이다.The waveform shown is the common electrode voltage V com , the gate wiring voltage V g , the data wiring voltage V d , and the voltage across the liquid crystal capacitor V LC (t ) (that is, the pixel electrode voltage).

상기와 같은 문제점을 해결하기 위해, 본 발명은 액정커패시터의 동작에 있어서 발생되는 전압강하문제를 해결할 수 있는 방법과 그 구체적인 회로구조를 제시한다.In order to solve the above problems, the present invention provides a method and a specific circuit structure that can solve the voltage drop problem generated in the operation of the liquid crystal capacitor.

아울러 액정커패시터의 전압편차로 인해 발생되는 플리커, 화질저하 문제를 개선할 수 있는 방법을 제시한다.In addition, the present invention suggests a method for improving the flicker and image quality degradation caused by the voltage deviation of the liquid crystal capacitor.

도 1은 일반적인 액정표시장치 패널의 구성에 대한 등가회로를 도시한 도면1 is a diagram showing an equivalent circuit for the configuration of a general liquid crystal display panel.

도 2는 액정표시장치 액티브영역을 구성하는 일 서브픽셀에 대한 등가회로도2 is an equivalent circuit diagram of one subpixel constituting an active area of a liquid crystal display device;

도 3은 종래의 액정표시장치 일 서브픽셀의 액정커패시터(CLC)에 인가되는 신호파형 예시도3 is a diagram illustrating a signal waveform applied to a liquid crystal capacitor C LC of one subpixel of a conventional liquid crystal display.

도 4는 본 발명에 따른 액정표시장치의 액정커패시터 인가전압 편차보상회로를 도시한 도면4 is a diagram illustrating a voltage difference compensating circuit for applying a liquid crystal capacitor in a liquid crystal display according to the present invention.

도 5는 본 발명에 따른 액정표시장치에서 사용될 보상전압을 구하는 방법을 설명하기 위한 회로도5 is a circuit diagram illustrating a method for obtaining a compensation voltage to be used in the liquid crystal display according to the present invention.

<도면의 주요부분에 대한 부호의 설명><Description of the symbols for the main parts of the drawings>

N1,N2,N3 : 제1,제2,제3단자 G1,G2 : 제1, 제2게이트라인N1, N2, N3: first, second and third terminals G1, G2: first and second gate lines

100 : 액정구동 박막트랜지스터 200 : 전압보상 박막트랜지스터100: liquid crystal drive thin film transistor 200: voltage compensation thin film transistor

200G : 전압보상 박막트랜지스터 게이트단자200G: Voltage Compensation Thin Film Transistor Gate Terminal

300 : 보상전압원300: compensation voltage source

상기와 같은 목적을 달성하기 위해, 본 발명은 다수의 데이터라인과, 제1 및 제2게이트라인을 포함한 다수의 게이트라인이 서로 종횡하도록 배열되어 있으며, 상기 제1게이트라인에 제1단자가 연결되고 상기 일 데이터라인에 제2단자가 연결되고 액정커패시터와 저장커패시터의 일단이 제3단자에 연결되는 액정구동 박막트랜지스터를 포함하여 서브픽셀로 정의되는 액정표시장치에 있어서, 상기 제2게이트라인에 게이트단자가 연결되고, 상기 액정구동 박막트랜지스터의 제3단자와 보상전압원에 각각 단자가 연결되는 전압보상 박막트랜지스터를 더욱 포함하는 것을 특징으로 하는 액정커패시터 인가전압 편차보상회로를 구비한 액정표시장치를 제시한다.In order to achieve the above object, in the present invention, a plurality of data lines and a plurality of gate lines including first and second gate lines are arranged to cross each other, and a first terminal is connected to the first gate line. And a liquid crystal driving thin film transistor having a second terminal connected to the one data line and one end of the liquid crystal capacitor and the storage capacitor connected to the third terminal, wherein the liquid crystal display device is defined as a subpixel. And a voltage compensating thin film transistor having a gate terminal connected thereto and a terminal connected to a third terminal and a compensation voltage source of the liquid crystal driving thin film transistor, respectively. present.

여기서 상기 전압보상 박막트랜지스터는 상기 액정구동 박막트랜지스터와 동일한 타입의 박막트랜지스터인 것을 특징으로 한다.The voltage compensation thin film transistor may be a thin film transistor of the same type as the liquid crystal driving thin film transistor.

아울러 상기 보상전압원은 DC전압원인 것을 특징으로 한다.In addition, the compensation voltage source is characterized in that the DC voltage source.

상기 제1단자는 게이트단자이고, 제2단자는 소스단자이고, 제3단자는 드레인단자인 것을 특징으로 한다.The first terminal is a gate terminal, the second terminal is a source terminal, the third terminal is characterized in that the drain terminal.

또한 본 발명은 다수의 데이터라인과, 제1 및 제2게이트라인을 포함한 다수의 게이트라인이 서로 종횡하도록 배열되어 있으며, 상기 제1게이트라인에 제1단자가 연결되고 상기 일 데이터라인에 제2단자가 연결되고 액정커패시터와 저장커패시터의 일단이 제3단자에 연결되는 액정구동 박막트랜지스터를 포함하여 서브픽셀로 정의되는 액정표시장치에, 상기 제2게이트라인에 게이트단자가 연결되고, 상기 액정구동 박막트랜지스터의 제3단자와 보상전압원에 각각 단자가 연결되는 전압보상 박막트랜지스터를 더욱 포함하는 것을 특징으로 하는 액정표시장치의 액정커패시터 전압편차 보상회로에 있어서, 상기 제1게이트라인과 제2게이트라인에 순차적으로 게이트신호를 인가하는 단계와; 상기 제2게이트라인의 게이트신호에 따라 상기 전압보상 박막트랜지스터에 보상전압을 인가하는 단계를 포함하는 액정표시장치의 액정커패시터 인가전압 편차보상방법을 제시하는 바, 상기 보상전압은 상기 액정커패시터에 인가되는 데이터신호의 전압에서 누설전류에 의해 감소된 차이만큼의 전압인 것을 특징으로 한다.According to the present invention, a plurality of data lines and a plurality of gate lines including first and second gate lines are arranged so as to cross each other, and a first terminal is connected to the first gate line and a second is connected to the one data line. A liquid crystal display device defined as a subpixel including a liquid crystal driving thin film transistor having a terminal connected to one end of the liquid crystal capacitor and the storage capacitor connected to a third terminal, and having a gate terminal connected to the second gate line. A voltage compensating thin film transistor having a terminal connected to a third terminal and a compensation voltage source of a thin film transistor, the liquid crystal capacitor voltage deviation compensation circuit of the liquid crystal display device further comprising: the first gate line and the second gate line Sequentially applying a gate signal to the; A liquid crystal capacitor applied voltage deviation compensation method of a liquid crystal display device comprising applying a compensation voltage to the voltage compensation thin film transistor according to a gate signal of the second gate line, the compensation voltage is applied to the liquid crystal capacitor The voltage is as much as the difference reduced by the leakage current in the voltage of the data signal.

이하 첨부된 도면을 참조하여 본 발명에 대해 설명하기로 한다.Hereinafter, the present invention will be described with reference to the accompanying drawings.

도 4는 본 발명에 따른 액정표시장치의 액정커패시터 인가전압 편차보상회로를 도시한 도면으로서, 다수의 데이터라인중 일 데이터라인(D1)과, 제1 및 제2게이트라인(G1)(G2)을 포함한 다수의 게이트라인이 서로 종횡하도록 배열되어 있으며, 상기 제1게이트라인(G1)에 제1단자(N1)가 연결되고 상기 데이터라인(D1)에제2단자(N2)가 연결되고 액정커패시터(CLC)와 저장커패시터(CST)의 일단이 제3단자(N3)에 연결되는 액정구동 박막트랜지스터(100)를 포함하여 서브픽셀로 정의되는 액정표시장치에, 상기 제2게이트라인(G2)에 게이트단자(200G)가 연결되고, 상기 액정구동 박막트랜지스터(100)의 제3단자(N3)와 보상전압원(300)에 각각 단자가 연결되는 전압보상 박막트랜지스터(200)를 도시하고 있다.4 is a diagram illustrating a liquid crystal capacitor applied voltage deviation compensation circuit of a liquid crystal display according to the present invention, wherein one data line D1 and first and second gate lines G1 and G2 of a plurality of data lines are shown. A plurality of gate lines including a plurality of gate lines are arranged to cross each other, and a first terminal N1 is connected to the first gate line G1, and a second terminal N2 is connected to the data line D1, and a liquid crystal capacitor ( C LC ) and a liquid crystal driving thin film transistor 100 having one end of the storage capacitor C ST connected to the third terminal N3, wherein the second gate line G2 is defined as a subpixel. The voltage compensation thin film transistor 200 having a gate terminal 200G connected thereto and a terminal connected to the third terminal N3 and the compensation voltage source 300 of the liquid crystal driving thin film transistor 100, respectively.

상기와 같이 구성되는 회로도에서 상기 전압보상 박막트랜지스터(200)는 상기 액정구동 박막트랜지스터(100)와 동일한 타입의 박막트랜지스터인 것이 바람직하겠고, 상기 보상전압원(300)은 상기 액정커패시터(CLC)로 인가되는 전압에서 소자의 누설전류에 의해 손실되는 전압편차만큼의 전압을 공급하는 외부 전원이다.In the circuit diagram configured as described above, it is preferable that the voltage compensation thin film transistor 200 is a thin film transistor of the same type as the liquid crystal driving thin film transistor 100, and the compensation voltage source 300 is the liquid crystal capacitor C LC . An external power supply that supplies a voltage equal to the voltage deviation lost by the leakage current of the device at the applied voltage.

상기와 같은 구성의 액정커패시터 인가전압 편차보상회로에 대한 동작을 설명하면 다음과 같다.Referring to the operation of the liquid crystal capacitor applied voltage deviation compensation circuit of the above configuration is as follows.

먼저 액정표시장치의 서브픽셀들을 상기와 같은 구성으로 회로를 구성하여 종래의 액정표시장치 구동과 동일하게 구동하면서, 상기 보상전압원(300)에 상기 도 3의 그래프에서 도시한 △Vp만큼의 보상전압을 인가한다.First, the subpixels of the liquid crystal display device are configured in the same manner as the circuit to drive the same as the conventional liquid crystal display device driving, and the compensation voltage source 300 has a compensation voltage of ΔVp as shown in the graph of FIG. 3. Is applied.

상기 보상전압을 구하는 방법의 일예시를 도 5의 회로도를 참조하여 설명한다.An example of a method of obtaining the compensation voltage will be described with reference to the circuit diagram of FIG. 5.

도 5에 도시한 바와 같이, 상기 액정커패시터(CLC)로 인가되는 전압의 누설전류에 의한 편차분 보상전압은,As shown in FIG. 5, the deviation compensation voltage due to the leakage current of the voltage applied to the liquid crystal capacitor C LC is

△Vp = {CGS/(CST+CLC+CGS)} * △Vg (여기서, △Vg = Von-Voff)ΔVp = (C GS / (C ST + C LC + C GS )} * ΔVg (where ΔVg = V on -V off )

과 같이 구할 수 있다. 물론 상기 공식에 의한 다수의 측정을 토대로 평균값을 구하여 적용하는 것이 바람직할 것이다.It can be obtained as Of course, it would be desirable to obtain and apply an average value based on a number of measurements by the above formula.

상기와 같이 전압편차 보상전압(△Vp)이 상기 보상전압원(300)에 의해 상기 전압보상 박막트랜지스터(200)로 인가되고 있을 때, 상기 액정구동 박막트랜지스터(100)의 스위칭을 위해 상기 제1게이트라인(G1)에 게이트신호가 인가된 후 상기 제2게이트라인(G2)으로 게이트신호 인가 순서가 넘어갈 때, 상기 제1게이트라인(G1)에 연결된 액정커패시터(CLC)에서는 누설전류에 의한 △Vp 만큼의 전압강하가 발생한다.As described above, when the voltage deviation compensation voltage ΔVp is applied to the voltage compensation thin film transistor 200 by the compensation voltage source 300, the first gate for switching the liquid crystal driving thin film transistor 100. When the gate signal is applied to the second gate line G2 after the gate signal is applied to the line G1, the liquid crystal capacitor C LC connected to the first gate line G1 may be caused by a leakage current. The voltage drop as much as Vp occurs.

이때 상기 제2게이트라인에서 상기 전압보상 박막트랜지스터(200)의 게이트단자(200G)를 통해 보상전압 인가 스위칭 신호를 인가하게 되고, 상기 보상전압원(300)에서 출력된 △Vp만큼의 보상전압이 상기 액정커패시터(CLC)로 인가되어 전압편차를 보상하게 된다.In this case, a compensation voltage application switching signal is applied through the gate terminal 200G of the voltage compensation thin film transistor 200 at the second gate line, and a compensation voltage equal to ΔVp output from the compensation voltage source 300 is applied. The liquid crystal capacitor CLC is applied to compensate for the voltage deviation.

상기와 같이 설명한 본 발명에 따른 액정표시장치의 액정커패시터 인가전압 편차보상방법 및 그 보상회로는 액정커패시터로 인가되는 데이터신호에 대한 감소분을 보상하여 플리커현상 방지, 액정 셀의 열화로 인한 잔상, 화면 고착 등의 문제를 개선할 수 있는 장점이 있다.As described above, the liquid crystal capacitor applied voltage deviation compensation method and the compensation circuit of the liquid crystal display according to the present invention compensate for the reduction of the data signal applied to the liquid crystal capacitor to prevent the flicker phenomenon, the afterimage due to deterioration of the liquid crystal cell, the screen There is an advantage that can improve problems such as sticking.

Claims (6)

다수의 데이터라인과, 제1 및 제2게이트라인을 포함한 다수의 게이트라인이 서로 종횡하도록 배열되어 있으며, 상기 제1게이트라인에 제1단자가 연결되고 상기 일 데이터라인에 제2단자가 연결되고 액정커패시터와 저장커패시터의 일단이 제3단자에 연결되는 액정구동 박막트랜지스터를 포함하여 서브픽셀로 정의되는 액정표시장치에 있어서,A plurality of data lines and a plurality of gate lines including first and second gate lines are arranged to cross each other, a first terminal is connected to the first gate line, and a second terminal is connected to the one data line. A liquid crystal display device defined by a subpixel including a liquid crystal driving thin film transistor having one end of a liquid crystal capacitor and a storage capacitor connected to a third terminal. 상기 제2게이트라인에 게이트단자가 연결되고, 상기 액정구동 박막트랜지스터의 제3단자와 보상전압원에 각각 단자가 연결되는 전압보상 박막트랜지스터A voltage compensation thin film transistor having a gate terminal connected to the second gate line and a terminal connected to a third terminal of the liquid crystal driving thin film transistor and a compensation voltage source, respectively. 를 더욱 포함하여 서브픽셀로 정의하는 것을 특징으로 하는 액정표시장치Liquid crystal display characterized in that it further comprises a sub-pixel 청구항 제 1 항에 있어서,The method according to claim 1, 상기 전압보상 박막트랜지스터는 상기 액정구동 박막트랜지스터와 동일한 타입의 박막트랜지스터인 것을 특징으로 하는 액정표시장치The voltage compensating thin film transistor is a thin film transistor of the same type as the liquid crystal driving thin film transistor. 청구항 제 1 항에 있어서,The method according to claim 1, 상기 보상전압원은 DC전압원인 것을 특징으로 하는 액정표시장치The compensation voltage source is a liquid crystal display, characterized in that the DC voltage source. 청구항 제 1 항에 있어서,The method according to claim 1, 상기 제1단자는 게이트단자이고, 제2단자는 소스단자이고, 제3단자는 드레인단자인 것을 특징으로 하는 액정표시장치Wherein the first terminal is a gate terminal, the second terminal is a source terminal, and the third terminal is a drain terminal. 다수의 데이터라인과, 제1 및 제2게이트라인을 포함한 다수의 게이트라인이 서로 종횡하도록 배열되어 있으며, 상기 제1게이트라인에 제1단자가 연결되고 상기 일 데이터라인에 제2단자가 연결되고 액정커패시터와 저장커패시터의 일단이 제3단자에 연결되는 액정구동 박막트랜지스터를 포함하여 서브픽셀로 정의되는 액정표시장치에, 상기 제2게이트라인에 게이트단자가 연결되고, 상기 액정구동 박막트랜지스터의 제3단자와 보상전압원에 각각 단자가 연결되는 전압보상 박막트랜지스터를 더욱 포함하여 서브픽셀로 정의하는 것을 특징으로 하는 액정표시장치에 있어서,A plurality of data lines and a plurality of gate lines including first and second gate lines are arranged to cross each other, a first terminal is connected to the first gate line, and a second terminal is connected to the one data line. A liquid crystal display device defined as a subpixel including a liquid crystal driving thin film transistor having one end of a liquid crystal capacitor and a storage capacitor connected to a third terminal, the gate terminal of which is connected to the second gate line, and the first portion of the liquid crystal driving thin film transistor. In the liquid crystal display device characterized in that it further comprises a voltage compensation thin film transistor having a terminal connected to each of the three terminals and the compensation voltage source as a sub-pixel, 상기 제1게이트라인과 제2게이트라인에 순차적으로 게이트신호를 인가하는 단계와;Sequentially applying a gate signal to the first gate line and the second gate line; 상기 제2게이트라인의 게이트신호에 따라 상기 전압보상 박막트랜지스터에 보상전압을 인가하는 단계Applying a compensation voltage to the voltage compensation thin film transistor according to a gate signal of the second gate line; 를 포함하는 액정표시장치의 구동방법Method of driving a liquid crystal display device comprising a 청구항 제 5 항에 있어서,The method according to claim 5, 상기 보상전압은 상기 액정커패시터에 인가되는 데이터신호의 전압에서 누설전류에 의해 감소된 차이만큼의 전압인 것을 특징으로 하는 액정표시장치 구동방법The compensation voltage is a liquid crystal display device driving method, characterized in that the voltage reduced by the leakage current in the voltage of the data signal applied to the liquid crystal capacitor
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US8810606B2 (en) 2004-11-12 2014-08-19 Samsung Display Co., Ltd. Display device and driving method thereof

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US8810606B2 (en) 2004-11-12 2014-08-19 Samsung Display Co., Ltd. Display device and driving method thereof
US9058787B2 (en) 2004-11-12 2015-06-16 Samsung Display Co., Ltd. Display device and driving method thereof
US9390669B2 (en) 2004-11-12 2016-07-12 Samsung Display Co., Ltd. Display device and driving method thereof

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