KR20040050771A - Liquid Crystal Display Device and Method for fabricating the same - Google Patents

Abstract

PURPOSE: An LCD(Liquid Crystal Display) and a method for manufacturing the LCD are provided to minimize a margin of attachment of substrates to improve transmissivity. CONSTITUTION: A gate line including a gate electrode and the first capacitor electrode and a gate pad are formed on a substrate(210) using the first metal. A gate insulating layer and a semiconductor layer are sequentially formed on the substrate. Source and drain electrodes, a data line connected to the source electrode, a data pad disposed at one end of the data line and the second capacitor electrode are formed using the second metal. The first passivation layer is formed on the substrate. A black matrix having open parts exposing pixel regions, the drain electrode and the second capacitor electrode is formed on the first passivation layer. The second passivation layer(235) is formed on the substrate using OxNy or Nx including carbon. The first transparent conductive layer(236) connected to the drain electrode, the second capacitor electrode, the gate pad and the data pad is formed on the second passivation layer. Red, green and blue color filters are formed on the first transparent conductive layer, which are sequentially disposed at the open parts of the black matrix. The second transparent conductive layer is formed on the color filters. The first and second transparent conductive layers are patterned to form pixel electrodes, gate pad electrodes and data pad electrodes.

Description

Liquid Crystal Display Device and Method for Fabricating the same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display (COT) structure liquid crystal display device having a structure of simultaneously forming a color filter layer on a substrate on which a thin film transistor is formed, and a manufacturing method thereof.

In general, a liquid crystal display device displays an image by using optical anisotropy and birefringence characteristics of liquid crystal molecules. When an electric field is applied, the alignment of liquid crystals is changed, and the characteristics of light transmission vary according to the arrangement direction of the changed liquid crystals.

In general, a liquid crystal display device is formed by arranging two substrates on which electric field generating electrodes are formed so that the surfaces on which the two electrodes are formed face each other, injecting a liquid crystal material between the two substrates, and then applying a voltage to the two electrodes. By moving the liquid crystal molecules by the electric field is a device that represents the image by the transmittance of light that varies accordingly.

1 is a view schematically showing a general liquid crystal display device.

As shown, a general color liquid crystal display device 11 includes a color filter 7 and a color filter 8 including a black matrix 6 formed between a sub color filter 8 and each sub color filter 8. The upper substrate 5 having the common electrode 18 deposited thereon, the pixel region P, and the pixel electrode 17 and the switching element T formed in the pixel region, and the pixel region P The liquid crystal 14 is filled between the lower substrate 22 and the upper substrate 5 and the lower substrate 22 on which array wiring is formed.

The lower substrate 22 is also referred to as an array substrate, and the thin film transistor T, which is a switching element, is positioned in a matrix type, and the gate wiring 13 crosses the plurality of thin film transistors TFT. ) And data wirings 15 are formed.

In this case, the pixel area P is an area defined by the gate wiring 13 and the data wiring 15 intersecting. A transparent pixel electrode 17 is formed on the pixel area P as described above.

The pixel electrode 17 uses a transparent conductive metal having relatively high light transmittance such as indium-tin-oxide (ITO).

A storage capacitor C _ST connected in parallel with the pixel electrode 17 is formed on the gate wiring 13, and a part of the gate wiring 13 is used as the first electrode of the storage capacitor C _ST . As the second electrode, an island-shaped source / drain metal layer 30 formed of the same material as the source and drain electrodes is used.

In this case, the source / drain metal layer 30 is configured to be in contact with the pixel electrode 17 to receive a signal of the pixel electrode.

As described above, when the upper color filter substrate 5 and the lower array substrate 22 are bonded to each other to produce a liquid crystal panel, light leakage defects due to the bonding error between the color filter substrate 5 and the array substrate 22 may be reduced. It is very likely to occur.

A description with reference to FIG. 2 is as follows.

FIG. 2 is a cross-sectional view taken along the line II-II of FIG. 1.

As described above, the first substrate 22, which is an array substrate, and the second substrate 5, which is a color filter substrate, are spaced apart from each other, and the liquid crystal layer 14 is disposed between the first and second substrates 22, 5. This is located.

The thin film transistor T including the gate electrode 32, the active layer 34, the source electrode 36, and the drain electrode 38 is disposed on the array substrate 22, and the thin film transistor T is disposed on the thin film transistor T. A protective film 40 is configured to protect it.

In the pixel region P, a transparent pixel electrode 17 is formed in contact with the drain electrode 38 of the thin film transistor T, and a storage capacitor C _ST connected in parallel with the pixel electrode 17 includes a gate wiring ( 13) is configured on the top.

The upper substrate 5 includes a black matrix 6 corresponding to the gate wiring 13, the data wiring 15, and the thin film transistor T, and corresponds to the pixel region P of the lower substrate 22. The color filter 8 is comprised.

In this case, the general array substrate is configured such that the data line 15 and the pixel electrode 17 are spaced apart at a predetermined interval IIIa to prevent vertical cross talk, and the gate line 13 and the pixel electrode are spaced apart from each other. In addition, it is configured to be spaced apart a certain interval (IIIb).

Since the spaces A and B spaced apart between the data line 15 and the gate line 13 and the pixel electrode 17 are regions where light leakage occurs, a black matrix formed on the upper color filter substrate 5 matrix) (6) will cover this part.

In addition, the black matrix 6 formed on the thin film transistor T serves to block the light so that the light radiated from the outside does not affect the active layer 34 through the passivation layer 40. .

However, a misalignment may occur during the process of bonding the upper substrate 5 and the lower substrate 22. In view of this, a margin of a constant value is determined when designing the black matrix 6. Since the design is carried out with reference to), the aperture ratio decreases by that amount.

In addition, when the bonding error beyond the margin occurs, there is often a case of light leakage defects in which the light leakage regions IIIa and IIIb are not covered by the black matrix 6.

In this case, since the light leakage appears outside, there is a problem that the image quality is deteriorated.

In order to solve the above problems, it is an object of the present invention to provide a liquid crystal display device having a structure that can minimize the bonding margin to increase the transmittance.

To this end, the present invention is to provide a COT liquid crystal display device of a method of forming a color filter element on a substrate on which a thin film transistor is formed.

Another object of the present invention is to provide a COT liquid crystal display device including an insulating layer capable of preventing thermal oxidation of a black matrix and a method of manufacturing the same.

1 is a view schematically showing a general liquid crystal display device.

FIG. 2 is a cross-sectional view taken along the line II-II of FIG. 1. FIG.

3 is a plan view of a COT liquid crystal display device according to the present invention.

4A to 4I, FIGS. 5A to 5I, and FIGS. 6A to 6I are cross-sectional views illustrating a manufacturing process of a substrate for a COT liquid crystal display device according to a first embodiment of the present invention.

7A to 7E, 8A to 8E, and 9A to 9E are cross-sectional views illustrating steps of a manufacturing process of a COT liquid crystal display device according to a second exemplary embodiment of the present invention.

<Brief description of the main parts of the drawing>

210: substrate 217: gate pad

218 gate insulating film 232 first protective layer

234: black matrix 235: second protective layer

In order to achieve the above object, according to a first aspect of the present invention, a gate wiring having a gate electrode and a first capacitor electrode, and positioned in a first direction using a first metal material on a substrate, Forming a gate pad positioned at one end; Forming a first insulating material and a semiconductor material in a region covering the gate wiring and the gate pad, and then using the first insulating material as a gate insulating film and patterning the semiconductor material into a semiconductor layer; Source and drain electrodes spaced apart from each other on the semiconductor layer by using a second metal material in an area covering the semiconductor layer, and data connected to the source electrode and positioned in a second direction crossing the first direction Forming a wiring, a data pad positioned at one end of the data wiring, and a second capacitor electrode having an island pattern at a position covering the first capacitor electrode; Forming a first protective layer using a second insulating material at a position covering the thin film transistor, wherein the gate electrode, the semiconductor layer, the source electrode, and the drain electrode form a thin film transistor; Forming a black matrix on the first passivation layer, the black matrix having an open portion partially exposing the pixel region, the drain electrode and the second capacitor electrode defined as a region where the gate line and the data line cross each other; Located on the front surface of the substrate covering the black matrix, a silicon nitride film (SiNx) by a plasma enhanced chemical vapor deposition (PECVD) method or a silicon nitride film, a silicon oxide film (SiOx), a silicon oxynitride film by a sputtering method ( A second protective layer using a material selected from any one of nitrogen oxide film (OxNy) and nitride film (Nx) containing carbon formed by depositing SiOxNy) or 3MS (3-methoxy silane) as a reaction gas by PECVD. Forming a; Forming a first transparent conductive layer on a region covering the second protective layer, the first transparent conductive layer being connected to the drain electrode, the second capacitor electrode, the gate pad, and the data pad; Forming red, green, and blue color filters on the first transparent conductive layer in order, using the black matrix as a color-specific boundary; The red, green, and blue color filters form a color filter layer, and in a region covering the color filter layer, a second transparent conductive layer is formed in contact with the first transparent conductive layer, and the first and second transparent conductive layers for each pixel region. Patterning the pixel electrode, forming the gate pad electrode by patterning the first and second transparent conductive layers in the gate pad part, and forming the data pad electrode by patterning the first and second transparent conductive layers in the data pad part. It provides a method for manufacturing a substrate for a COT liquid crystal display device comprising the step.

In a second aspect of the invention, there is provided a method, comprising: forming a gate wiring having a gate electrode on a substrate; Forming a first insulating material and a semiconductor material in a region covering the gate wiring, and then using the first insulating material as a gate insulating film and patterning the semiconductor material into a semiconductor layer; Forming a source electrode and a drain electrode spaced apart from each other on the semiconductor layer, and a data line connected to the source electrode and intersecting the gate line by using a second metal material in an area covering the semiconductor layer; Forming a first protective layer using a second insulating material at a position covering the thin film transistor, wherein the gate electrode, the semiconductor layer, the source electrode, and the drain electrode form a thin film transistor; Forming a black matrix positioned on the first passivation layer and having a pixel area defined as an area where the gate line and the data line intersect, and an open part partially exposing the drain electrode; Located on the front surface of the substrate covering the black matrix, a silicon nitride film (SiNx) by a plasma enhanced chemical vapor deposition (PECVD) method or a silicon nitride film, a silicon oxide film (SiOx), a silicon oxynitride film by a sputtering method ( Second protection using a material selected from one of nitrogen oxide film (OxNy) and nitride film (Nx) containing carbon formed by deposition by PECVD using SiOxNy) or 3-methoxy silane (3MS) as a reaction gas Forming a layer; Forming a first transparent conductive layer in a region covering the second protective layer and connected to the drain electrode; Forming red, green, and blue color filters on the first transparent conductive layer in order, using the black matrix as a color-specific boundary; The red, green, and blue color filters form a color filter layer, and in a region covering the color filter layer, a second transparent conductive layer is formed in contact with the first transparent conductive layer, and the first and second transparent conductive layers for each pixel region. It provides a method for manufacturing a substrate for a COT liquid crystal display device comprising the step of forming a pixel electrode by patterning.

The deposition thickness of the second protective layer according to the first and second aspects of the present invention is selected in the range of 500 to 3,000 Pa, and the deposition temperature of the second protective layer is 250 ° C. or lower based on room temperature, and the second protective layer The silicon nitride film forming a film is formed using a mixed gas of hydrogen (H ₂ ) or helium (He) and silane (SiH ₄ ) / ammonia (NH ₃ ) / nitrogen (N ₂ ). .

The present invention relates to a COT liquid crystal display device and a manufacturing method thereof, and more particularly, to a structure for preventing thermal oxidation of a black matrix and a manufacturing method thereof.

3 is a plan view of the COT liquid crystal display device according to the present invention, and is shown centering on the array substrate structure.

As shown, the gate wiring 112 is formed in the first direction, the data wiring 126 is formed in the second direction crossing the first direction, and the gate wiring 112 and the data wiring 126 are formed. This intersecting area is defined as the pixel area P.

Gate pads 117 and data pads 128 are formed at one ends of the gate wiring 112 and the data wiring 126, respectively.

A thin film transistor T is formed at a point where the gate line 112 and the data line 126 cross each other, and the pixel electrode 142 is formed by being connected to the thin film transistor T.

The thin film transistor T is spaced apart from the gate electrode 114 branched from the gate line 112, the source electrode 122 branched from the data line 126, and the source electrode 122. Drain electrode 124.

The pixel electrode 142 partially overlaps the front gate line 112, and an area of the gate line 112 overlapping the pixel electrode 142 forms a first capacitor electrode 116, and a first capacitor electrode. In the region covering 116, a second capacitor electrode 130 made of the same material as the data line 126 is formed, and the second capacitor electrode 130 is electrically connected to the pixel electrode 142. The region where the first and second capacitor electrodes 116 and 130 and the pixel electrode 142 overlap each other forms a storage capacitor C _ST .

In addition, the hatched region in the drawing corresponds to the black matrix 134 forming portion, and the black matrix 134 includes a gate wiring 112, a data wiring 126, and an area and a pixel electrode covering the thin film transistor T. 142 is positioned in an area covering the edge portion, and has an open portion 133 that exposes the main region of the pixel region P. FIG.

In this case, the open part 133 has an area range partially exposing the second capacitor electrode 130 and the drain electrode 124, so that the pixel electrode 142 has the drain electrode 124 and the second capacitor electrode. 130 is directly connected to the side contact method without a separate contact hole.

In addition, a gate pad electrode 144 and a data pad electrode 146 are formed in an area covering the gate pad 117 and the data pad 128.

However, in the COT structure, as the black matrix 134 is formed on the same substrate as the pixel electrode 142, the bonding margin between the black matrix 134 and the pixel electrode 142 is minimized than in the conventional liquid crystal display.

Hereinafter, a cross-sectional stacked structure of a thin film transistor unit, a pixel region unit, a storage capacitor unit, a gate pad unit, and a data pad unit of the COT liquid crystal display will be described in detail with reference to the accompanying drawings.

First Embodiment

4A to 4I, 5A to 5I, and 6A to 6I are cross-sectional views illustrating, in stages, a manufacturing process of a substrate for a COT liquid crystal display device according to a first embodiment of the present invention, and FIGS. Cut lines IVa-IVa, FIGS. 5A to 5I are cross-sectional views taken along the cut line IVb-IVb of FIG. 3, and FIGS. 6A to 6I are cut along the cut line IVc-IVc of FIG. 3.

4A, 5A, and 6A, a first mask process, which is a mask process defined by photolithography, which includes depositing a first metal material on a substrate 110 and then exposing and developing a photosensitive material. In this step, the gate electrode 114, the first capacitor electrode 116, the gate wiring 112, and the gate pad 117 are formed.

As shown in FIG. 3, the gate electrode 114 and the first capacitor electrode 116 are patterns branched from the gate wiring 112, respectively, and the gate pad 117 is one of the gate wiring 112. Corresponds to the pattern located at the end.

4B, 5B, and 6B, a region in which the gate electrode 112, the first capacitor electrode 116, the gate wiring 112, and the gate pad 117 are covered, includes a first insulating material, an amorphous silicon material, and an impurity amorphous silicon. After depositing the materials in order, the first insulating material is formed as the gate insulating film 118, and the active layer (the amorphous silicon material and the impurity amorphous silicon material are covered by the second mask process at a position covering the area of the gate electrode 114). 120a) and the ohmic contact layer 120b.

The active layer 120a and the ohmic contact layer 120b form a semiconductor layer 120.

4C, 5C and 6C, the second metal material is deposited at a position covering the semiconductor layer 120, and the source electrode 122 is spaced apart from each other on the semiconductor layer 120 by a second mask process. ) And forming the data line 126 in the second direction connected to the drain electrode 124 and the source electrode 122 and crossing the first direction.

In this step, the step of forming a data pad 128 located at one end of the data line 126, and a second capacitor formed of an island pattern in a position overlapping with the first capacitor electrode 116 Forming an electrode 130.

The gate pad 117 and the data pad 128 are located in the non-display area.

The gate electrode 114, the semiconductor layer 120, the source electrode 122, and the drain electrode 124 form a thin film transistor (T).

In this step, the step of removing the ohmic contact layer 120b positioned in the section between the source electrode 122 and the drain electrode 124 to configure the exposed active layer 120a as a channel ch. do.

The channel (ch) manufacturing process is performed by an etching process using the source electrode 122 and the drain electrode 124 as a mask without a separate mask process.

3D, 4D, 5D, and 6D, a first protection is performed by using a second insulating material in an area covering the source electrode 122, the drain electrode 124, the data line 126, and the second capacitor electrode 130. Forming layer 132 is a step.

4E, 5E, and 6E, after forming a light blocking material on the first protective layer 132, the gate wiring 112 and the data wiring 126 are formed by the third mask process (gate pad 117). And a black matrix 134 covering the thin film transistor part and having the open part 133 in the subpixel area P. Referring to FIG.

In this case, the open part 133 of the black matrix 134 may be formed in a region partially exposing the drain electrode 124 and the second capacitor electrode 130.

4F, 5F, and 6F, the exposed first protective layer 132 and the gate insulating film are formed using the black matrix 134, the exposed drain electrode 124, and the second capacitor electrode 130 as a mask. Step 118).

In this step, partial regions of the drain electrode 124 and the second capacitor electrode 130 are exposed.

4G, 5G and 6G, the first transparent conductive layer 136 made of a first transparent conductive material is formed in a region covering the black matrix 134.

In this step, the first transparent conductive layer 136 is configured to be in contact with regions of the drain electrode 124 and the second capacitor electrode 130 exposed through the batch etching process, and the first transparent conductive layer ( It is important that the 136 is formed in an area including the side step portions of the black matrix 134.

The first transparent conductive layer 136 is formed to contact the base substrate of the first substrate 110 in the subpixel area P.

4H, 5H, and 6H, the color filter 138 is formed in the open part 133 of the black matrix 134 using the black matrix 134 as a color boundary.

Although not shown in the drawings, the color filter 138 may be formed by sequentially forming the red, green, and blue color filters by the fourth to sixth mask processes in the manufacturing step of the color filter 138.

4I, 5I, and 6I, forming a second transparent conductive layer 140 made of a second transparent conductive material on the color filter layer 138 and performing a first subpixel unit by a seventh mask process. And forming the pixel electrode 142 formed of the two transparent conductive layers 136 and 140. In this step, the first and second transparent conductive layers 136 and 140 patterned in the gate pad 117 form the gate pad electrode 144 and the first and second transparent patterns patterned in the data pad 128. The conductive layers 136 and 140 form a data pad electrode 146.

However, in the above embodiment, since the transparent conductive layer is formed directly on the substrate on which the black matrix pattern is formed, there is a disadvantage in that the black matrix pattern is thermally oxidized during the transparent conductive layer deposition process.

In order to improve this problem, the present invention is to provide a manufacturing method between the black matrix and the transparent conductive layer, and adding another protective layer made of a process condition and a material capable of preventing thermal oxidation of the black matrix.

Second Embodiment

7A to 7E, 8A to 8E, and 9A to 9E are cross-sectional views illustrating step-by-step manufacturing processes of a COT liquid crystal display device according to a second embodiment of the present invention, and FIGS. 4A to 4E and 5A of the first embodiment. Since the processes of FIGS. 5E to 5E and FIGS. 6A to 6E can be applied in the same manner, the following description will focus on the subsequent processes.

7A, 8A, and 9A illustrate forming a second protective layer 235 using a third insulating material in a region covering the black matrix 234.

The second protective layer 235 is formed for the purpose of preventing the black matrix 234 from thermally oxidizing during the process. For this purpose, the material forming the second protective layer 235 is a low temperature deposition method. The silicon nitride film (SiNx) by the PECVD (Plasma Enhanced Chemical Vapor Deposition) method or the silicon nitride film by the sputtering method (SiOx), the silicon oxynitride film (SiOxNy). Among them, when the silicon oxide film or the silicon oxynitride film is formed by the PECVD method, it is preferable to limit the sputtering method because the deposition temperature must be increased.

In addition, the material constituting the second protective layer 235 according to the present embodiment may be a nitric oxide film (OxNy) containing carbon formed by deposition by PECVD using 3-methoxy silane (3MS) as a reaction gas, or It may be selected from any one of the nitride film (Nx).

Among the above-described second protective layer 235 materials, in the case of the silicon nitride film, the film must be densely formed by controlling the reaction gas and the power to prevent penetration of various solvents during the process. In addition to silane (SiH ₄ ) / ammonia (NH ₃ ) / nitrogen (N ₂ ), which are used reaction gases, hydrogen (H ₂ ) or helium (He) is added to form a film at lower temperature conditions.

In addition, in order to prevent peeling and deformation due to external stress, the second protective layer 235 is preferably formed to have a deposition thickness of 3,000 Pa or less, more preferably 500 to 3,000 Pa. To choose from a range of.

In addition, in consideration of the thermal stability of the material of the black matrix 234, the deposition process is preferably performed at a room temperature of 250 ° C or less.

7B, 8B, and 9B, the drain electrode 224 and the second capacitor electrode 230, and the drain electrode 224 and the second protective layer 232 and 235 in the region covering the data pad 228 are formed. A gate insulating film 218 forming a drain contact hole 237, a capacitor contact hole 239, and a data pad contact hole 229 exposing a part of the second capacitor electrode 230, respectively, and covering the gate pad 217; The gate pad contact hole 219 is formed in the first and second protective layers 232 and 235.

In the first embodiment, the open portion and the pad electrode are exposed to the entire surface without a separate contact hole process by using the black matrix, the exposed drain electrode, and the second capacitor electrode as a mask, but in the present embodiment, the second protective layer 235 Since a contact hole must be formed on the formed substrate, a mask process is included.

7C, 8C, and 9C are disposed on the entire surface of the substrate covering the second protective layer 235, and the drain contact hole 237, the capacitor contact hole 239, the gate pad contact hole 219, and the data pad contact. The first transparent conductive layer 236 connected to the drain electrode 224, the second capacitor electrode 230, the gate pad 217, and the data pad 228 is formed through the hole 229.

7D, 8D, and 9D are steps of forming the color filter layer 238 in the open portion 233 of the black matrix 234 using the black matrix 234 as the color-specific boundary.

7E, 8E, and 9E illustrate forming a second transparent conductive layer 240 on the color filter layer 238 and first and second transparent conductive layers 236 and 240 in subpixel units by a mask process. ) Is a step of forming the pixel electrode 242.

In this step, the first and second transparent conductive layers 236 and 240 patterned at the gate pad portion 217 of FIG. 8D form the gate pad electrode 244, and the data pad portion 228 of FIG. 8D. The first and second transparent conductive layers 236 and 240, which are patterned at, form the data pad electrode 246.

However, the present invention is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present invention.

As described above, according to the COT liquid crystal display device and the manufacturing method thereof according to the present invention has the following effects.

First, since the array element including the thin film transistor and the color filter element are formed on the same substrate, the aperture ratio can be improved by minimizing the bonding margin.

Second, by additionally forming an insulating material having a predetermined process condition for the purpose of preventing thermal oxidation of the black matrix, it is possible to minimize the defects in the subsequent process of the black matrix can provide a stable process.

Claims (5)

Forming a gate wiring having a gate electrode and a first capacitor electrode on the substrate, the gate wiring positioned in a first direction, and a gate pad positioned at one end of the gate wiring; Forming a first insulating material and a semiconductor material in a region covering the gate wiring and the gate pad, and then using the first insulating material as a gate insulating film and patterning the semiconductor material into a semiconductor layer; Source and drain electrodes spaced apart from each other on the semiconductor layer by using a second metal material in an area covering the semiconductor layer, and data connected to the source electrode and positioned in a second direction crossing the first direction Forming a wiring, a data pad positioned at one end of the data wiring, and a second capacitor electrode having an island pattern at a position covering the first capacitor electrode; Forming a first protective layer using a second insulating material at a position covering the thin film transistor, wherein the gate electrode, the semiconductor layer, the source electrode, and the drain electrode form a thin film transistor; Forming a black matrix on the first passivation layer, the black matrix having an open portion partially exposing the pixel region, the drain electrode and the second capacitor electrode defined as a region where the gate line and the data line cross each other; Located on the front surface of the substrate covering the black matrix, the silicon nitride film (SiNx) by the PECVD (Plasma Enhanced Chemical Vapor Deposition) method or the silicon nitride film by the sputtering method (SiOx), silicon oxynitride film (SiOxNy) ) Or a second protective layer using a material selected from any one of nitric oxide film (OxNy) and nitride film (Nx) containing carbon formed by depositing by PECVD using 3-methoxy silane (3MS) as a reaction gas. Forming a; Forming a first transparent conductive layer on a region covering the second protective layer, the first transparent conductive layer being connected to the drain electrode, the second capacitor electrode, the gate pad, and the data pad; Forming red, green, and blue color filters on the first transparent conductive layer in order, using the black matrix as a color-specific boundary; The red, green, and blue color filters form a color filter layer, and in a region covering the color filter layer, a second transparent conductive layer is formed in contact with the first transparent conductive layer, and the first and second transparent conductive layers for each pixel region. Patterning the pixel electrode, forming the gate pad electrode by patterning the first and second transparent conductive layers in the gate pad part, and forming the data pad electrode by patterning the first and second transparent conductive layers in the data pad part. step Method of manufacturing a substrate for a COT liquid crystal display device comprising a. Forming a gate wiring having a gate electrode on the substrate; Forming a first insulating material and a semiconductor material in a region covering the gate wiring, and then using the first insulating material as a gate insulating film and patterning the semiconductor material into a semiconductor layer; Forming a source electrode and a drain electrode spaced apart from each other on the semiconductor layer, and a data line connected to the source electrode and intersecting the gate line by using a second metal material in an area covering the semiconductor layer; Forming a first protective layer using a second insulating material at a position covering the thin film transistor, wherein the gate electrode, the semiconductor layer, the source electrode, and the drain electrode form a thin film transistor; Forming a black matrix positioned on the first passivation layer and having a pixel area defined as an area where the gate line and the data line intersect, and an open part partially exposing the drain electrode; Located on the front surface of the substrate covering the black matrix, a silicon nitride film (SiNx) by a plasma enhanced chemical vapor deposition (PECVD) method or a silicon nitride film, a silicon oxide film (SiOx), a silicon oxynitride film by a sputtering method ( Second protection using a material selected from one of nitrogen oxide film (OxNy) and nitride film (Nx) containing carbon formed by deposition by PECVD using SiOxNy) or 3-methoxy silane (3MS) as a reaction gas Forming a layer; Forming a first transparent conductive layer in a region covering the second protective layer and connected to the drain electrode; Forming red, green, and blue color filters sequentially on the first transparent conductive layer, using the black matrix as a color-specific boundary; The red, green, and blue color filters form a color filter layer, and in a region covering the color filter layer, a second transparent conductive layer is formed in contact with the first transparent conductive layer, and the first and second transparent conductive layers for each pixel region. Patterning the pixel electrodes to form pixel electrodes Method of manufacturing a substrate for a COT liquid crystal display device comprising a. The method according to claim 1 or 2, The deposition thickness of the second protective layer is a method of manufacturing a substrate for a COT liquid crystal display device selected from the range of 500 ~ 3,000 Å. The method according to claim 1 or 2, And a deposition temperature of the second protective layer is 250 ° C. or less at room temperature. The method according to claim 1 or 2, The silicon nitride film forming the second protective layer is formed using any one of hydrogen (H ₂ ) or helium (He) and a mixed gas of silane (SiH ₄ ) / ammonia (NH ₃ ) / nitrogen (N ₂ ). Method for producing a substrate for a COT liquid crystal display device.