KR20040050623A - In plane switching mode liquid crystal display device - Google Patents
In plane switching mode liquid crystal display device Download PDFInfo
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- KR20040050623A KR20040050623A KR1020020078483A KR20020078483A KR20040050623A KR 20040050623 A KR20040050623 A KR 20040050623A KR 1020020078483 A KR1020020078483 A KR 1020020078483A KR 20020078483 A KR20020078483 A KR 20020078483A KR 20040050623 A KR20040050623 A KR 20040050623A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G02F1/1343—Electrodes
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- G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
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- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
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Abstract
Description
본 발명은 횡전계모드 액정표시소자에 관한 것으로, 특히 공통전극과 화소전극을 동일층 및 다른 층에 동시에 형성함으로써 DC잔상 및 AC잔상을 효과적으로 제거할 수 있는 횡전계모드 액정표시소자에 관한 것이다.The present invention relates to a transverse field mode liquid crystal display device, and more particularly, to a transverse field mode liquid crystal display device capable of effectively removing a DC afterimage and an AC afterimage by simultaneously forming a common electrode and a pixel electrode on the same layer and another layer.
근래, 핸드폰(Mobile Phone), PDA, 노트북컴퓨터와 같은 각종 휴대용 전자기기가 발전함에 따라 이에 적용할 수 있는 경박단소용의 평판표시장치(Flat Panel Display Device)에 대한 요구가 점차 증대되고 있다. 이러한 평판표시장치로는 LCD(Liquid Crystal Display), PDP(Plasma Display Panel), FED(Field Emission Display), VFD(Vacuum Fluorescent Display) 등이 활발히 연구되고 있지만, 양산화 기술, 구동수단의 용이성, 고화질의 구현이라는 이유로 인해 현재에는 액정표시소자(LCD)가 각광을 받고 있다.Recently, with the development of various portable electronic devices such as mobile phones, PDAs, and notebook computers, there is a growing demand for flat panel display devices for light and thin applications. Such flat panel displays are being actively researched, such as LCD (Liquid Crystal Display), PDP (Plasma Display Panel), FED (Field Emission Display), VFD (Vacuum Fluorescent Display), but mass production technology, ease of driving means, Liquid crystal display devices (LCDs) are in the spotlight for reasons of implementation.
이러한 액정표시소자는 액정분자의 배열에 따라 다양한 표시모드가 존재하지만, 현재에는 흑백표시가 용이하고 응답속도가 빠르며 구동전압이 낮다는 장점 때문에 주로 TN모드의 액정표시소자가 사용되고 있다. 이러한 TN모드 액정표시소자에서는 기판과 수평하게 배향된 액정분자가 전압이 인가될 때 기판과 거의 수직으로 배향된다. 따라서, 액정분자의 굴절율 이방성(refractive anisotropy)에 의해 전압의 인가시 시야각이 좁아진다는 문제가 있었다.The liquid crystal display device has various display modes according to the arrangement of the liquid crystal molecules. However, the liquid crystal display device of the TN mode is mainly used because of the advantages of easy monochrome display, fast response speed, and low driving voltage. In such a TN mode liquid crystal display device, liquid crystal molecules aligned horizontally with the substrate are almost perpendicular to the substrate when a voltage is applied. Therefore, there is a problem that the viewing angle is narrowed upon application of voltage due to the refractive anisotropy of the liquid crystal molecules.
이러한 시야각문제를 해결하기 위해, 근래 광시야각특성(wide viewing angle characteristic)을 갖는 각종 모드의 액정표시소자가 제안되고 있지만, 그중에서도횡전계모드(In Plane Switching Mode)의 액정표시소자가 실제 양산에 적용되어 생산되고 있다. 상기 IPS모드 액정표시소자는 화소내에 평행으로 배열된 적어도 한쌍의 전극을 형성하여 기판과 실질적으로 평행한 횡전계를 형성함으로써 액정분자를 평면상으로 배향시키는 것이다.In order to solve this viewing angle problem, liquid crystal display devices of various modes having a wide viewing angle characteristic have recently been proposed, but among them, the liquid crystal display device of the in-plane switching mode is applied to actual production. It is produced. The IPS mode liquid crystal display device aligns liquid crystal molecules in a plane by forming at least one pair of electrodes arranged in parallel in a pixel to form a transverse electric field substantially parallel to the substrate.
도 1에 상기한 IPS모드 액정표시소자의 구조가 도시되어 있다. 도면에 도시된 바와 같이, 액정패널(1)의 화소는 종횡으로 배치된 게이트라인(3) 및 데이터라인(4)에 의해 정의된다. 도면에는 비록 (n,m)번째의 화소만을 도시하고 있지만 실제의 액정패널(1)에는 상기한 게이트라인(3)과 데이터라인(4)이 각각 n개 및 m개 배치되어 액정패널(1) 전체에 걸쳐서 n×m개의 화소를 형성한다. 상기 화소내의 게이트라인(3)과 데이터트라인(4)의 교차영역에는 박막트랜지스터(10)가 형성되어 있다. 상기 박막트랜지스터(10)는 게이트라인(3)으로부터 주사신호가 인가되는 게이트전극(11)과, 상기 게이트전극(11) 위에 형성되어 주사신호가 인가됨에 따라 활성화되어 채널층을 형성하는 반도체층(12)과, 상기 반도체층(12) 위에 형성되어 데이터라인(4)을 통해 화상신호가 인가되는 소스전극(13) 및 드레인전극(14)으로 구성되어 외부로부터 입력되는 화상신호를 액정층에 인가한다.The structure of the IPS mode liquid crystal display device described above is shown in FIG. As shown in the figure, the pixels of the liquid crystal panel 1 are defined by gate lines 3 and data lines 4 arranged vertically and horizontally. Although only the (n, m) th pixels are shown in the drawing, in the liquid crystal panel 1, n and m gate lines 3 and data lines 4 are disposed, respectively, and thus the liquid crystal panel 1 is disposed. N x m pixels are formed throughout. The thin film transistor 10 is formed at the intersection of the gate line 3 and the data line 4 in the pixel. The thin film transistor 10 includes a gate electrode 11 to which a scan signal is applied from the gate line 3, and a semiconductor layer formed on the gate electrode 11 and activated as a scan signal is applied to form a channel layer. 12 and a source electrode 13 and a drain electrode 14 formed on the semiconductor layer 12 and to which an image signal is applied through the data line 4. The image signal input from the outside is applied to the liquid crystal layer. do.
화소내에는 데이터라인(4)과 실질적으로 평행하게 배열된 복수의 공통전극(5a∼5c)과 화소전극(7a,7b)이 배치되어 있다. 또한, 화소의 중간에는 상기 공통전극(5a∼5c)과 접속되는 공통라인(16)이 배치되어 있으며, 상기 공통라인(16) 위에는 화소전극(7a,7b)과 접속되는 화소전극라인(18)이 배치되어 상기 공통라인(16)과 오버랩되어 있다.In the pixel, a plurality of common electrodes 5a to 5c and pixel electrodes 7a and 7b are arranged substantially parallel to the data line 4. In addition, a common line 16 connected to the common electrodes 5a to 5c is disposed in the middle of the pixel, and a pixel electrode line 18 connected to the pixel electrodes 7a and 7b is disposed on the common line 16. Is disposed and overlaps with the common line 16.
상기와 같이, 구성된 IPS모드 액정표시소자에서 액정분자는 공통전극(5a∼5c) 및 화소전극(7a,7b)과 실질적으로 평행하게 배향되어 있다. 박막트랜지스터(10)가 작동하여 화소전극(7a,7b)에 신호가 인가되면, 공통전극(5a∼5c)과 화소전극(7a,7b) 사이에는 액정패널(1)과 실질적으로 평행한 횡전계가 발생하게 된다. 액정분자는 상기 횡전계를 따라 동일 평면상에서 회전하게 되므로, 액정분자의 굴절율 이방성에 의한 계조반전을 방지할 수 있게 된다.As described above, in the configured IPS mode liquid crystal display device, the liquid crystal molecules are aligned substantially parallel to the common electrodes 5a to 5c and the pixel electrodes 7a and 7b. When the thin film transistor 10 is operated and a signal is applied to the pixel electrodes 7a and 7b, the transverse electric field is substantially parallel to the liquid crystal panel 1 between the common electrodes 5a to 5c and the pixel electrodes 7a and 7b. Will occur. Since the liquid crystal molecules rotate on the same plane along the transverse electric field, gray level inversion due to the refractive anisotropy of the liquid crystal molecules can be prevented.
도 2는 종래 IPS모드 액정표시소자의 단면도로서, 도 2(a)는 I-I'선 단면도이고 도 2(b)는 II-II'선 단면도이다. 도 2(a)에 도시된 바와 같이, 제1기판(20) 위에는 게이트전극(11)이 형성되어 있으며, 상기 그 위에 제1기판(20) 전체에 걸쳐 게이트절연층(22)이 적층되어 있다. 상기 게이트절연층(22) 위에는 반도체층(12)이 형성되어 있으며, 그 위에 소스전극(13) 및 드레인전극(14)이 형성되어 있다. 또한, 상기 제1기판(20) 전체에 걸쳐 보호층(passivation layer;24)이 형성되어 있다.FIG. 2 is a cross-sectional view of a conventional IPS mode liquid crystal display device. FIG. 2 (a) is a cross-sectional view taken along the line II ′ and FIG. 2 (b) is a cross-sectional view taken along the line II-II ′. As shown in FIG. 2A, a gate electrode 11 is formed on the first substrate 20, and a gate insulating layer 22 is stacked over the entire first substrate 20. . The semiconductor layer 12 is formed on the gate insulating layer 22, and the source electrode 13 and the drain electrode 14 are formed thereon. In addition, a passivation layer 24 is formed on the entire first substrate 20.
제2기판(30)에는 블랙매트릭스(32)와 컬러필터층(34)이 형성되어 있다. 상기 블랙매트릭스(32)는 액정분자가 동작하지 않는 영역으로 광이 누설되는 것을 방지하기 위한 것으로, 도면에 도시한 바와 같이 박막트랜지스터(10) 영역과 화소와 화소 사이(즉, 게이트라인 및 데이터라인 영역)에 주로 형성된다. 컬러필터층(34)은 R(Red), B(Blue), G(Green)로 구성되어 실제 컬러를 구현하기 위한 것이다.The black matrix 32 and the color filter layer 34 are formed on the second substrate 30. The black matrix 32 is to prevent light leakage into a region in which the liquid crystal molecules do not operate. As shown in the drawing, the black matrix 32 is between the thin film transistor 10 region and the pixel and the pixel (that is, the gate line and the data line). Area). The color filter layer 34 is composed of R (Red), B (Blue), and G (Green) to realize actual colors.
상기 제1기판(20) 및 제2기판(30) 사이에는 액정층(40)이 형성되어 액정패널(1)이 완성된다.The liquid crystal layer 40 is formed between the first substrate 20 and the second substrate 30 to complete the liquid crystal panel 1.
한편, 도 2(b)에 도시된 바와 같이, 공통전극(5a∼5c)은 제1기판(20) 위에 형성되어 있고 화소전극(7a,7b)은 게이트절연층(22) 위에 형성되어, 상기 공통전극(5a∼5c) 및 화소전극(7a,7b) 사이에 횡전계가 발생한다. 최초에 배향막의 배향방향(통상적으로 공통전극 및 화소전극과 일정 각도로 방향지어진)을 따라 배열된 액정분자는 공통전극(5a∼5c)과 화소전극(7a,7b) 사이에 형성된 횡전계를 따라 회전하게 되어 화면상에 화상을 표시한다.Meanwhile, as shown in FIG. 2B, the common electrodes 5a to 5c are formed on the first substrate 20 and the pixel electrodes 7a and 7b are formed on the gate insulating layer 22. The transverse electric field is generated between the common electrodes 5a to 5c and the pixel electrodes 7a and 7b. The liquid crystal molecules initially arranged along the alignment direction of the alignment layer (typically oriented at a predetermined angle with the common electrode and the pixel electrode) follow the transverse electric field formed between the common electrodes 5a to 5c and the pixel electrodes 7a and 7b. It rotates to display an image on the screen.
상기한 구조의 IPS모드 액정표시소자에서는 공통전극(5a∼5c)과 화소전극(7a,7b)이 각각 다른 층에 형성되어 있다. 그러나, 이와 같이 공통전극(5a∼5c)과 화소전극(7a,7b)을 서로 다른 층에 형성하는 경우, 층 사이에 생성되는 횡전계에 의해 화면상에 DC잔상이 발생하므로 액정표시소자의 화질이 저하되는 문제가 있었다.In the IPS mode liquid crystal display device having the above structure, the common electrodes 5a to 5c and the pixel electrodes 7a and 7b are formed on different layers, respectively. However, in the case where the common electrodes 5a to 5c and the pixel electrodes 7a and 7b are formed on different layers in this way, DC afterimages are generated on the screen by the transverse electric field generated between the layers. There was a problem of this deterioration.
이러한 문제를 해결하기 위해, 도 3에 도시된 바와 같이 공통전극(5a∼5c)과 화소전극(7a,7b)을 게이트절연층(22)이나 제1기판(20) 위에 형성하여, 모든 전극을 동일한 층에 배열하는 방법이 제시되고 있지만, 이 경우의 IPS모드 액정표시소자에서는 화면상에 AC잔상이 발생하는 문제가 있었다.To solve this problem, as shown in FIG. 3, the common electrodes 5a to 5c and the pixel electrodes 7a and 7b are formed on the gate insulating layer 22 or the first substrate 20 to form all the electrodes. Although a method of arranging on the same layer has been proposed, there is a problem that AC afterimage occurs on the screen in the IPS mode liquid crystal display device in this case.
본 발명은 상기한 문제를 해결하기 위한 것으로, 공통전극과 화소전극을 각각 동일층과 서로 다른층에 배치하여 AC잔상과 DC잔상을 최소화함으로써 화질이 향상된 횡전계모드 액정표시소자를 제공하는 것을 목적으로 한다.Disclosure of Invention The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a transverse electric field mode liquid crystal display device having improved image quality by minimizing AC and DC afterimages by disposing common electrodes and pixel electrodes on the same and different layers, respectively. It is done.
상기한 목적을 달성하기 위해, 본 발명에 따른 횡전계모드 액정표시소자는복수의 화소를 정의하는 복수의 게이트라인 및 데이터라인과, 각 화소내에 배치된 구동소자와, 상기 화소내에 배치된 화소전극과, 상기 화소전극과 동일층에 배치되어 상기 화소전극과 횡전계를 생성하는 적어도 하나의 제1공통전극과, 상기 화소전극과 다른 층에 배치되어 상기 화소전극과 횡전계를 생성하는 적어도 하나의 제2공통전극으로 구성된다.In order to achieve the above object, the transverse electric field mode liquid crystal display device according to the present invention comprises a plurality of gate lines and data lines defining a plurality of pixels, a driving element disposed in each pixel, and a pixel electrode disposed in the pixel. At least one first common electrode disposed on the same layer as the pixel electrode and generating a transverse electric field, and at least one arranged on a different layer from the pixel electrode to generate the pixel electrode and a transverse electric field. It consists of a 2nd common electrode.
화소전극이 게이트절연층에 형성되는 경우 제1공통전극 역시 게이트절연층 위에 형성되어 AC잔상을 감소시키고 제2공통전극은 기판 위에 형성되어 DC잔상을 감소시킨다. 이와 같이, DC잔상과 AC잔상을 감소하여 사람의 눈으로 인식할 수 없을 만큼 잔상을 최소화함으로 액정표시소자의 화질이 향상된다.When the pixel electrode is formed on the gate insulating layer, the first common electrode is also formed on the gate insulating layer to reduce AC afterimage, and the second common electrode is formed on the substrate to reduce DC afterimage. As described above, the image quality of the liquid crystal display device is improved by reducing the DC afterimage and the AC afterimage to minimize the afterimage so that it cannot be recognized by the human eye.
화소전극이 기판 위에 형성되는 경우에는 제1공통전극은 기판위에 형성되고 제2공통전극은 게이트절연층 위에 형성되어, 역시 DC잔상 및 AC잔상을 감소시킬 수 있게 된다.In the case where the pixel electrode is formed on the substrate, the first common electrode is formed on the substrate and the second common electrode is formed on the gate insulating layer, which also reduces DC afterimage and AC afterimage.
도 1은 종래 횡전계모드 액정표시소자의 평면도.1 is a plan view of a conventional transverse electric field mode liquid crystal display device.
도 2(a)는 도 1의 I-I'선 단면도.(A) is sectional drawing along the II 'line | wire of FIG.
도 2(b)는 도 1의 II-II'선 단면도.(B) is sectional drawing along the II-II 'line | wire of FIG.
도 3은 종래 횡전계모드 액정표시소자의 다른 예를 나타내는 단면도.3 is a cross-sectional view showing another example of a conventional transverse electric field mode liquid crystal display device.
도 4는 본 발명의 일실시예에 따른 횡전계모드 액정표시소자의 구조를 나타내는 단면도.4 is a cross-sectional view illustrating a structure of a transverse electric field mode liquid crystal display device according to an exemplary embodiment of the present invention.
도 5는 본 발명의 다른 실시예에 따른 횡전계모드 액정표시소자의 구조를 나타내는 단면도.5 is a cross-sectional view illustrating a structure of a transverse electric field mode liquid crystal display device according to another exemplary embodiment of the present invention.
* 도면의 주요부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings
120,130 : 기판 104 : 데이터라인120,130: substrate 104: data line
105 : 공통전극 107 : 화소전극105: common electrode 107: pixel electrode
122 : 게이트절연층 124 : 보호층122: gate insulating layer 124: protective layer
132 : 블랙매트릭스 134 : 컬러필터층132: black matrix 134: color filter layer
140 : 액정층140: liquid crystal layer
본 발명의 IPS모드 액정표시소자는 DC잔상과 AC잔상을 제거할 수 있는 구조로 이루어진다. 이를 위해, 본 발명의 IPS모드 액정표시소자는 DC잔상과 AC잔상을 제거할 수 있는 하이브리드구조로 형성된다. 다시 말해서, 공통전극과 화소전극이 동일층에 형성됨으로써 발생하는 AC잔상을 제거하고 공통전극과 화소전극이 다른 층에 형성됨으로써 발생하는 DC잔상을 제거하기 위해, 공통전극과 화소전극의 일부는 동일 층에 형성하고 다른 일부는 다른 층에 형성하는 구조로 IPS모드 액정표시소자를 설계하는 것이다.The IPS mode liquid crystal display device of the present invention has a structure capable of removing a DC afterimage and an AC afterimage. To this end, the IPS mode liquid crystal display device of the present invention is formed of a hybrid structure capable of removing DC and AC afterimages. In other words, a part of the common electrode and the pixel electrode are the same in order to remove the AC afterimage caused by the common electrode and the pixel electrode formed on the same layer and to remove the DC afterimage caused by the common electrode and the pixel electrode formed on the other layer. The IPS mode liquid crystal display device is designed to be formed in the layer and the other part in the other layer.
이하, 첨부한 도면을 참조하여 본 발명에 따른 IPS모드 액정표시소자에 대하여 상세히 설명한다.Hereinafter, an IPS mode liquid crystal display device according to the present invention will be described in detail with reference to the accompanying drawings.
도 4는 본 발명의 일실시예에 따른 IPS모드 액정표시소자의 구조를 나타내는 도면이다. 도면에 도시된 IPS모드 액정표시소자는 3개의 공통전극과 2개의 화소전극에 의해 4개의 블럭(block)이 형성된 4블럭 IPS모드 액정표시소자이다. 일반적으로 블럭이란 한화소내에서 광이 액정층(140)을 통과하여 화상을 표시하는 영역을 의미한다. 이러한 블럭은 공통전극과 화소전극의 형성 갯수에 따라 달라진다. 그러나, 본 발명에 따른 IPS모드 액정표시소자에서는 특정 블럭의 구조에만 한정되는 것은 아니다. 액정표시소자의 블럭수는 액정표시소자의 면적이나 화소수, 화소간의 피치와 같은 여러가지 요인에 따라 달라지는 가변적인 것이지 절대적인 것은 아니다. 따라서, 이하에서 설명하는 액정표시소자가 특정 블럭수를 갖는 것을 단지 설명의 편의를 위한 것이지 본 발명을 한정하기 위한 것은 아니다.4 is a diagram illustrating a structure of an IPS mode liquid crystal display device according to an exemplary embodiment of the present invention. The IPS mode liquid crystal display device shown in the drawing is a four-block IPS mode liquid crystal display device in which four blocks are formed by three common electrodes and two pixel electrodes. In general, a block means an area in which light passes through the liquid crystal layer 140 to display an image in a pixel. This block depends on the number of formation of the common electrode and the pixel electrode. However, the IPS mode liquid crystal display device according to the present invention is not limited to the specific block structure. The number of blocks of the liquid crystal display device is variable, which is dependent on various factors such as the area of the liquid crystal display device, the number of pixels, and the pitch between pixels, but it is not absolute. Therefore, it is merely for convenience of description that the liquid crystal display device described below has a specific number of blocks, but not for limiting the present invention.
도면에 도시된 바와 같이, 제1기판(120) 위에는 제1공통전극(105a) 및 제3공통전극(105c)이 형성되어 있으며, 그 위에 제1기판(120) 전체에 걸쳐 게이트절연층(122)이 적층되어 있다. 상기 제1공통전극(105a) 및 제3공통전극(105c)은 박막트랜지스터의 게이트전극과 동일한 공정에 의해 형성되는 것으로, 주로 Cu, Mo, Ta, Cr, Ti, Al 또는 Al합금 등의 금속을 증착(evaporation) 또는 스퍼터링(sputtering)방법에 의해 적층하고 에천트(etchant)에 에칭하여 형성된다.As shown in the figure, a first common electrode 105a and a third common electrode 105c are formed on the first substrate 120, and the gate insulating layer 122 is formed over the entire first substrate 120. ) Are stacked. The first common electrode 105a and the third common electrode 105c are formed by the same process as the gate electrode of the thin film transistor, and mainly include a metal such as Cu, Mo, Ta, Cr, Ti, Al, or an Al alloy. It is formed by lamination and etching in an etchant by evaporation or sputtering methods.
상기 게이트절연층(122) 위에는 데이터라인(104), 제2공통전극(105b), 제1화소전극(107a) 및 제2화소전극(107b)이 형성되어 있다. 상기 데이터라인(104), 제2공통전극(105b), 제1화소전극(107a) 및 제2화소전극(107b)은 박막트랜지스터의 소스전극 및 드레인전극과 동일한 공정에 의해 형성되는 것으로, 주로 Cr, Mo, Ta, Cu, Ti, Al 또는 Al합금 등의 금속을 적층하고 에칭함으로써 형성된다. 이때, 상기 제2공통전극(105b)은 제1공통전극(105a) 및 제3공통전극(105c)과 동일한 금속으로 형성할 수도 있다.The data line 104, the second common electrode 105b, the first pixel electrode 107a, and the second pixel electrode 107b are formed on the gate insulating layer 122. The data line 104, the second common electrode 105b, the first pixel electrode 107a and the second pixel electrode 107b are formed by the same process as the source electrode and the drain electrode of the thin film transistor, and are mainly Cr , Mo, Ta, Cu, Ti, Al or Al alloys are formed by laminating and etching. In this case, the second common electrode 105b may be formed of the same metal as the first common electrode 105a and the third common electrode 105c.
한편, 제2기판(130)에는 비표시영역, 예를 들면, 박막트랜지스터 영역, 게이트라인 및 데이터라인 영역으로 광이 누설되는 것을 방지하기 위한 블랙매트릭스(132)와 실제 컬러를 구현하기 위한 R,G,B의 색소를 가진 컬러필터층(134)이 형성되어 있다. 또한, 도면에는 도시하지 않았지만, 제2기판(130)의 평탄성을 향상시키기 위한 오버코트층(overcoat layer)이 형성될 수도 있다. 상기 제1기판(120) 및 제2기판(130) 사이에 액정층(140)이 형성되어 IPS모드 액정표시소자가 완성된다.Meanwhile, the second substrate 130 may include a black matrix 132 for preventing light from leaking into a non-display area, for example, a thin film transistor area, a gate line, and a data line area, and an R for real color. The color filter layer 134 which has the pigment | dye of G and B is formed. In addition, although not shown, an overcoat layer may be formed to improve the flatness of the second substrate 130. The liquid crystal layer 140 is formed between the first substrate 120 and the second substrate 130 to complete the IPS mode liquid crystal display device.
상기한 바와 같이, 본 발명의 IPS모드 액정표시소자에서는 모든 공통전극(105a∼105c)과 화소전극(107a,107b)이 동일한 층에 형성되지도 않으며 다른 층에 형성되지도 않는다. 다시 말해서, 본 발명의 IPS모드 액정표시소자에서는 일부의 공통전극(즉, 제2공통전극(105b))은 화소전극(107a,107b)과 동일한 층에 배열되지만, 다른 일부의 공통전극(즉, 제1공통전극(105a) 및 제3공통전극(105c))은 화소전극(107a,107b)과 다른 층에 배열된다.As described above, in the IPS mode liquid crystal display device of the present invention, all the common electrodes 105a to 105c and the pixel electrodes 107a and 107b are neither formed on the same layer nor on other layers. In other words, in the IPS mode liquid crystal display device of the present invention, some of the common electrodes (ie, the second common electrode 105b) are arranged on the same layer as the pixel electrodes 107a and 107b, but some of the common electrodes (ie, The first common electrode 105a and the third common electrode 105c are arranged in different layers from the pixel electrodes 107a and 107b.
따라서, 동일층에 공통전극(105b)과 화소전극(107a,107b)을 형성함으로써 얻을 수 있는 AC잔상제거효과와 다른 층에 공통전극(105a,105c)과화소전극(107a,107b)을 형성함으로써 얻을 수 있는 DC잔상제거효과를 동시에 얻을 수 있게 된다.Therefore, the AC afterimage removal effect obtained by forming the common electrode 105b and the pixel electrodes 107a and 107b in the same layer and the common electrodes 105a and 105c and the pixel electrodes 107a and 107b in different layers are formed. The DC afterimage removal effect can be obtained at the same time.
물론, 상기한 구성에 의해 AC잔상과 DC잔상을 완전히 제거할 수는 없다. 그러나, 통상적으로 DC잔상이나 AC잔상이 발생하는 경우, 이를 사람이 인식하기 위해서는 잔상의 세기가 설정값 보다 커야만 한다. 따라서, AC잔상과 DC잔상을 설정값 이하까지만 제거하기만 하면, 사람은 화면에 발생하는 AC잔상과 DC잔상을 인식할 수 없게 된다. 본 발명의 IPS모드 액정표시소자에서는 AC잔상과 DC잔상을 설정값 이하까지 감소시키며, 그 결과 화질을 갖는 IPS모드 액정표시소자를 제조할 수 있게 되는 것이다.Of course, the above-described configuration cannot completely remove the AC afterimage and the DC afterimage. In general, however, when a DC afterimage or an AC afterimage occurs, the intensity of the afterimage should be greater than a set value in order for a human to recognize it. Therefore, if only the AC afterimage and the DC afterimage are removed to the set value or less, the person cannot recognize the AC afterimage and the DC afterimage on the screen. In the IPS mode liquid crystal display device of the present invention, the AC afterimage and the DC afterimage are reduced to a set value or less, and as a result, an IPS mode liquid crystal display device having image quality can be manufactured.
도 5는 본 발명의 다른 실시예에 따른 IPS모드 액정표시소자의 구조를 나타내는 도면이다. 도면에 도시된 바와 같이, 이 실시예에서는 제2기판(220) 위에는 제2공통전극(205b)만이 형성되어 화소전극(207a,207b)과 다른 층에 배치되며, 제1공통전극(205a)과 제3공통전극(205c)이 게이트절연층(222) 위에 형성되어 화소전극(207a,207b)과 동일 층에 배치된다. 이 실시예의 구조와 도 4에 도시된 실시예의 구조의 차이는 제1기판(220)과 게이트절연층(222)에 배치되는 공통전극이 다르다는 것뿐이다. 다시 말해서, 동일층에 배치되는 전극들과 다른 층에 배치되는 전극들이 변경되었다는 차이밖에는 없다.5 is a view showing the structure of an IPS mode liquid crystal display device according to another embodiment of the present invention. As shown in the figure, in this embodiment, only the second common electrode 205b is formed on the second substrate 220 and is disposed on a different layer from the pixel electrodes 207a and 207b. The third common electrode 205c is formed on the gate insulating layer 222 and disposed on the same layer as the pixel electrodes 207a and 207b. The only difference between the structure of this embodiment and that of the embodiment shown in FIG. 4 is that the common electrodes disposed on the first substrate 220 and the gate insulating layer 222 are different. In other words, the only difference is that the electrodes arranged on the same layer and the electrodes arranged on the other layer are changed.
이 실시예의 IPS모드 액정표시소자도 동일층에 배치된 공통전극(205a,205c)과 화소전극(207a,207b)에 의해 AC잔상을 감소시킬 수 있게 되고 서로 다른 층에 배치된 공통전극(205b)과 화소전극(207a,207b)에 의해 DC잔상을 감소시킬 수 있게되어, 사람의 눈이 인식할 수 없을 정도로 잔상을 제거할 수 있게 된다.In the IPS mode liquid crystal display device of this embodiment, the AC residual image can be reduced by the common electrodes 205a and 205c and the pixel electrodes 207a and 207b disposed on the same layer, and the common electrodes 205b disposed on different layers. The DC afterimage can be reduced by the pixel electrodes 207a and 207b, and the afterimage can be removed to an extent that the human eye cannot recognize.
상기한 바와 같이, 공통전극과 화소전극은 그 일부가 동일층에 배치되고 다른 일부가 다른 층에 배치된다면, 각각 어떠한 층에 형성될 수도 있다. 예를 들어, 도 5에서 게이트절연층(222)위에는 제2공통전극(205b)만을 형성하고, 제1기판(220) 위에는 제1공통전극(205a)과 제3공통전극(205c) 및 화소전극(207a,207b)을 형성하는 경우에도 DC잔상 및 AC잔상을 효과적으로 제거할 수 있게 된다. 따라서, 본 발명의 IPS모드 액정표시소자는 상기 실시예에 개시된 특정 구조에 한정되는 것이 아니라, 동일층에 공통전극과 화소전극이 배치되는 동시에 다른 층에 공통전극과 화소전극이 배치되는 모든 구조의 IPS모드 액정표시소자에 적용가능할 것이다.As described above, the common electrode and the pixel electrode may be formed in any layer, respectively, if a part thereof is disposed on the same layer and another part is disposed on another layer. For example, in FIG. 5, only the second common electrode 205b is formed on the gate insulating layer 222, and the first common electrode 205a, the third common electrode 205c, and the pixel electrode are formed on the first substrate 220. In the case of forming 207a and 207b, the DC afterimage and the AC afterimage can be effectively removed. Accordingly, the IPS mode liquid crystal display device of the present invention is not limited to the specific structure disclosed in the above embodiment, but has a structure in which all of the structures in which the common electrode and the pixel electrode are arranged on the same layer and the common electrode and the pixel electrode are arranged on the other layer are provided. It will be applicable to the IPS mode liquid crystal display device.
상술한 바와 같이, 본 발명의 IPS모드 액정표시소자에서는 공통전극과 화소전극의 일부를 동일층에 배치하고 다른 일부를 서로 다른 층에 배치함으로써 DC잔상과 AC잔상을 효과적으로 제거할 수 있게 되며, 그 결과 액정표시소자의 품질을 향상시킬 수 있게 된다.As described above, in the IPS mode liquid crystal display device of the present invention, the DC residual image and the AC residual image can be effectively removed by arranging a part of the common electrode and the pixel electrode on the same layer and different parts on different layers. As a result, the quality of the liquid crystal display device can be improved.
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