KR20040036049A - CMOS Image sensor improved fill factor - Google Patents

Abstract

PURPOSE: A unit pixel of CMOS(Complementary Metal Oxide Semiconductor) image sensor with improved fill factor is provided to be capable of restraining the generation of current leakage due to a voltage supply contact adjacent to a photo diode of the unit pixel. CONSTITUTION: A unit pixel of a CMOS image sensor is provided with a plurality of rectangular type photo diode regions(PD), a band type transfer gate(Tx) located at the upper portion of the photo diode regions for defining a floating diffusion region(FD) at the center portion of a photo diode, the first active region for being supplied with voltage and the second active region for transforming photo-generated charges of the photo diode region into electric signal.

Description

CMOS image sensor improved fill factor

TECHNICAL FIELD The present invention relates to semiconductor manufacturing technology, and more particularly, to a manufacturing method of an image sensor.

In general, a photo diode (PD) in a charge couple device (CCD) or a CMOS image sensor is an introduction part that converts incident light according to each wavelength into an electrical signal, and ideally, photocharge generation rate in all wavelength ranges. Since (Quantum Efficiency) is 1, all incident light is focused, and efforts are being made to achieve this.

FIG. 1 is an equivalent circuit diagram of a unit pixel of a conventional CMOS image sensor, and includes one photodiode (PD) and four NMOSs (Tx Tr, Rx Tr, Sx Tr, and Dx Tr).

Four NMOS transistors are used to transfer the photo-generated charge from the photodiode (PD) to the floating diffusion region (FD). Reset transistor (Rx Tr), source follower buffer amplifier (Source Follower Buffer Amplif ier) to set the potential and discharge the charge (C _pd ) to reset the floating diffusion region (FD) A drive transistor (Dx Tr), and a select transistor (Sx Tr) for addressing by switching.

2 is a plan view of a unit pixel of a CMOS image sensor according to the related art.

Referring to FIG. 2, a gate electrode of the transfer transistor Tx Tr (hereinafter, abbreviated as 'transfer gate Tx') is formed with a predetermined width overlapping an active region where a photodiode PD is to be formed. The floating diffusion region FD is formed in the active region below the other side of the transfer gate Tx. Here, the photodiode PD has a relatively large area, and the area of the photodiode PD becomes narrow while giving a bottle neck effect from the photodiode PD to the floating diffusion region FD.

The gate electrode of the reset transistor Rx Tr in the counterclockwise direction with respect to the floating diffusion region FD (hereinafter, abbreviated as 'reset gate Rx') and the gate electrode of the drive transistor Dx Tr , Abbreviated as "drive gate (Dx)" and the gate electrode (hereinafter, abbreviated as "select gate (Sx)") of the select transistor (Sx Tr) are arranged while crossing the upper portion of the active region at predetermined intervals. have.

In the unit pixel as shown in FIG. 2, the contact includes a gate contact (Tx CT), an output terminal contact (Vout CT), a power supply voltage terminal contact (VDD CT), a floating diffusion region contact (FD CT), and a gate of a drive transistor. The contact (Dx CT) and the like, and the contact surrounded by the field oxide film and the gate, and the overlap margin is insufficient during the process, are the output contact (Output CT) and the floating diffusion region contact (FD CT). The aforementioned contacts are typically referred to as M1 contacts.

3 is a view showing a fill factor according to the prior art.

As shown in FIG. 3, the prior art has a fill factor that represents an area ratio occupied by the photodiode PD in a unit pixel, and the dynamic range is increased when the device density increases to 30% to 40%. (dynamic range) and photodiode capacity increase is limited.

4 is a view showing a leakage of the power supply voltage terminal contact according to the prior art, Figure 5 is a diagram showing a depletion state of the photodiode according to the prior art.

In addition, in the related art, as shown in FIG. 4, a leakage voltage around the power voltage terminal contact VDD CT is adjacent to the photodiode PD of an adjacent unit pixel. There is a problem that a dark bad pixel caused by L ').

In addition, the prior art, as shown in Figure 5, when the distance affected by the power supply voltage driving force (VDD driving force) for moving the photoelectron by the power supply voltage (VDD), 'r', the transfer gate (Tx) As the physical distance is long, there is a region (Y) where electrons that do not flow into the photodiode (PD) are distributed. There is a problem of distorting optical data during subsequent cycle operations.

The present invention has been made to solve the above-mentioned problems of the prior art, the CMOS image sensor suitable for suppressing the leakage caused by the power supply voltage terminal contact (VDD CT) adjacent to the photodiode (PD) of the adjacent unit pixel To provide.

In addition, another object of the present invention to provide a CMOS image sensor that can achieve a complete depletion of the photodiode.

In addition, another object of the present invention is to provide a CMOS image sensor that can increase the fill factor.

1 is an equivalent circuit diagram of a unit pixel of a conventional CMOS image sensor;

2 is a plan view of a unit pixel of a CMOS image sensor according to the related art;

3 is a view showing a fill factor according to the prior art,

4 is a view showing a leakage of a power supply voltage terminal contact according to the prior art;

5 is a view showing a depletion state of a photodiode according to the prior art,

6 is an equivalent circuit diagram of a unit pixel of a CMOS image sensor according to an embodiment of the present invention;

7 is a plan view of a unit pixel of FIG. 6;

8 is a cross-sectional view taken along line II ′ of FIG. 7;

9 is a view showing a fill factor according to an embodiment of the present invention;

10 is a view illustrating leakage of a power supply voltage terminal contact according to an embodiment of the present invention;

11 is a view showing a depletion state of a photodiode according to an embodiment of the present invention;

12 is a plan view of a unit pixel according to another exemplary embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings

PD: Photodiode area FD: Floating diffusion area

Rx: Reset Gate Tx: Transfergate

Dx: Drivegate Sx: Selectgate

The CMOS image sensor of the present invention for achieving the above object is divided into a lower region having a relatively larger area than the upper region of the unit pixel forming a rectangular shape on a plane, the photodiode in the entire region of the lower region A reset transistor, a drive transistor, and a select transistor are allocated to the upper region, and a strip-shaped transfer gate is disposed above the central portion of the lower region.

In addition, the unit pixel of the CMOS image sensor of the present invention is a band-shaped photodiode region consisting of four sides, a band-shaped so that the floating diffusion region is defined in the center portion of the photodiode is disposed above the photodiode region A transfer gate, a first active region connected to one end of a first side of four sides of the photodiode region and having one side aligned with a second side of the photodiode region in contact with the first side and supplied with a power voltage; and The photodiode of the photodiode region is output as an electrical signal by being connected to the other side of the first active region and arranged side by side with the first side of the photodiode and having its end aligned with a third side that is in contact with the first side. And a second active region, wherein a boundary between the first active region and the first side of the photodiode region is in contact with each other. A reset gate disposed above the second active region, a drive gate and a select gate arranged side by side in a direction crossing the second active region, and an output terminal connected to an end of the second active region by the select gate; And a power supply voltage terminal contact connected to an end of the first active region.

Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. .

6 is an equivalent circuit diagram of a unit pixel of a CMOS image sensor according to an exemplary embodiment of the present invention.

Referring to FIG. 6, a photodiode PD for focusing light to generate and store a _photocharge , a reset transistor Rx Tr for discharging a charge C _pd to reset the floating diffusion region FD, and a photo A transfer transistor (Tx Tr) for transporting the photocharges stored in the diode (PD), a floating diffusion region (FD) in which the photocharges transported from the photodiode (PD) are stored, and a drive transistor acting as a source follower ( Dx Tr) and a select transistor Sx Tr for addressing by switching.

In FIG. 6, the reset transistor is connected to one side of the photodiode PD, and the reset transistor and the drive transistor are supplied with a power supply voltage VDD.

Referring to the driving method of the unit pixel of FIG. 6, first, the transfer gate Tx, the reset gate Rx, and the select gate Sx are turned off. In this case, it is assumed that the photodiode PD is completely depleted.

Next, after concentrating photogenerated charge to the photodiode PD, the reset gate Rx is pulsed high to reset the floating diffusion region FD first.

Next, the select gate Sx is pulsed high to turn on the unit pixel, and the output voltage V1 of the source follower buffer is measured. This value merely means a DC level shift of the floating diffusion region FD.

Next, the transfer gate Tx is pulsed high and turned on, where all photoelectric charge is transferred to the floating diffusion region FD.

Next, the transfer gate Tx is turned to low by turning it low, and then the output voltage V2 of the source follower buffer is measured.

As a result, the output signals V1-V2 are the result of photocharges obtained from the difference between V1 and V2, which are pure signal values without noise. This method is called correlated double sampling (CDS).

7 is a plan view of a unit pixel of FIG. 6.

Referring to FIG. 7, a unit pixel having a rectangular shape on a plane is divided into a lower region having a relatively larger area than an upper region, a photodiode region PD is allocated to all regions of the lower region, and unit pixel. A reset transistor, a drive transistor, and a select transistor are allocated to the upper region of the circuit board, and a band-shaped transfer gate Tx is disposed above the central portion of the lower region.

In detail, the unit pixel is disposed on the photodiode PD and the photodiode PD having four sides pd1, pd2, pd3, and pd4 so that the floating diffusion region FD is formed on the photopixel. A band-shaped transfer gate Tx to be defined at the center of the diode region PD, a photodiode connected to one end of the first side pd1 of the four sides of the photodiode region PD and in contact with the first side pd1. One side thereof is aligned with the second side pd2 of the region PD so as to be connected to the first active region ACT1 to which the power supply voltage VDD is supplied and the other side of the first active region ACT1, The photodiode of the photodiode region PD is output as an electrical signal by being arranged in parallel with the first side pd1 of the PD and having its end aligned with the third side pd3 which is in contact with the first side pd1. It consists of two active areas ACT2.

In addition, the reset gate Rx is disposed above the boundary portion where the first active region ACT1 and the first side pd1 of the photodiode region PD contact each other, and the second active region is disposed above the second active region ACT2. The drive gate Dx and the select gate Sx are arranged side by side in the direction crossing the region ACT2, and the output terminal contact Vout CT is connected to the end of the second active region ACT2 by the select gate Sx. do. A power supply voltage terminal contact VDD CT for supplying a power supply voltage to the end of the first active region ACT1 is connected.

In FIG. 7, the drive gate Dx and the select gate Sx are disposed to have a length that crosses only the upper portion of the second active region ACT2, and are in the floating diffusion region FD defined by the transfer gate Tx. The floating diffusion contact FD CT is connected, and the floating diffusion contact FD CT is connected through the drive gate Dx and the drive gate contact Dx CT.

In addition, the size of the floating diffusion region FD is determined by a transfer gate Tx positioned above the photodiode region PD. The transfer gate Tx is a circular strip-shaped gate forming a closed curve. Accordingly, the floating diffusion region FD is positioned inside the closed curve of the transfer gate Tx.

In the above-described unit pixel, the photodiode region PD, the first active region ACT1 and the second active region ACT2 constituting the unit pixel are defined in a quadrangular shape. This shows that the photodiode region PD occupies all the lower region of the unit pixel defined by the quadrangle, and the reset transistor, the drive transistor, and the select transistor occupy the remaining upper region of the unit pixel. Therefore, the fill factor, which is the ratio occupied by the photodiode region PD in the unit pixel, increases. The fill factor will be described later.

Although not shown, the floating diffusion contact FD CT and the drive gate contact Dx CT are connected to each other according to the equivalent circuit diagram of FIG. 6.

When the unit pixels are arranged as shown in FIG. 7, the reset efficiency of the floating diffusion region is reduced as compared with the related art of FIG. 2, but the reset efficiency of the photodiode region is increased and a lot of freedom is ensured in the layout.

FIG. 8 is a cross-sectional view taken along line II ′ of FIG. 7.

As shown in FIG. 8, the p-type epitaxial layer 32 is grown on the p-type substrate 31 doped with a high concentration of p-type dopant, and the drive transistor and the selector are selected in a predetermined region of the p-type epitaxial layer 32. A p-type well 33 for dividing transistors is formed, and a field oxide film 34 as an element isolation film is formed in a predetermined region of the p-type epitaxial layer 32. Thus, the active region, which is intended to be a unit pixel, is defined by the field oxide film 34.

The active region is divided into a photodiode region, a reset transistor region, a drive transistor region, and a select transistor region, which will be described in detail below.

First, the transfer gate Tx, the reset gate Rx, the drive gate Dx, and the select gate Sx are arranged at a predetermined interval on the active region, and each gate has spacers 45 on both side walls thereof. do. Here, since the transfer gate Tx is in the form of a band of closed curves as shown in FIG. 7, the transfer gate Tx is divided into two upper portions of the active region.

In addition, the floating diffusion region FD is formed in the active region exposed inside the transfer gate Tx forming a closed curve, and the photodiode region PD is formed in the active region exposed outside the transfer gate Tx. do. As a result, the floating diffusion region FD is formed at a central portion of the photodiode region PD at a distance determined by the transfer gate Tx.

Meanwhile, the floating diffusion region FD is aligned with the edge of the spacer 35 provided on both sidewalls of the transfer gate Tx, and the photodiode region PD is aligned with the edge of the transfergate Tx, and the photodiode The region PD is, as is well known, a vertical pn junction of shallow p ⁰ regions and deep n ⁻ regions.

In addition, the reset gate Rx is aligned at one edge of the photodiode region PD, and a power supply voltage is supplied in an active region between the reset gate Rx and the drive gate Dx adjacent to the reset gate Rx. The power supply voltage short region 36 is formed.

Then, a common junction 37 of the drive transistor and the select transistor is formed in the active region between the drive gate Dx and the select gate Sx, and the output terminal region 38 serving as the source terminal of the select transistor is formed as the select gate (S). It is formed in the active region exposed to one side of Sx).

In addition, a floating diffusion contact FD CT contacting the floating diffusion region FD through the interlayer insulating layer 39 covering the upper portion of each gate, and a power supply voltage contact VDD contacting the power supply voltage end region 36. CT), an output terminal contact (Vout CT) which contacts the output terminal area 38 is formed. Here, the floating diffusion contact (FD CT), the power voltage terminal contact (VDD CT), and the output terminal contact (Vout CT) are referred to as 'M1 contacts' connected to M1.

In FIG. 8, the drive transistors and the select transistors are general NMOSFETs having an LDD structure, and the transfer transistors and reset transistors are native NMOSFETs having no LDD structure.

9 is a view showing a fill factor according to an embodiment of the present invention.

Referring to FIG. 9, a photodiode region PD occupies most of a lower region of a unit pixel in a unit pixel defined as a rectangle as shown in FIG. 7, and a reset transistor region, a drive transistor region, and the remaining upper region of the unit pixel. The select transistor area occupies.

If the length of the horizontal and vertical sides of the square is assumed to be '3a', the horizontal side of the lower region occupied by the photodiode region PD becomes '3a' and the length of the vertical side is '2a'. Becomes

Therefore, the fill factor, which is the ratio of the photodiode region PD in the unit pixel, By 66.7%. This is a fill factor of the prior art shown in FIG. In view of 44.4%, it is possible to increase the fill factor by changing the layout of the unit pixels as shown in FIG.

As a result, as the fill factor is increased, it is possible to secure the dynamic range and to sufficiently secure the capacity of the photodiode.

10 is a diagram illustrating leakage of a power supply voltage terminal contact according to an exemplary embodiment of the present invention.

Referring to FIG. 10, since the unit pixels are square, the distance x 'between the power source voltage terminal contact VDD CT and the photodiode region PD between adjacent unit pixels is longer than the minimum isolation space x between unit pixels. This is because the distance x 'has a diagonal direction with respect to the minimum isolation space x between the unit pixels. Thus, the distance x' has a diagonal direction, so that the photodiode region PD is connected to the power voltage terminal contact VDD CT in the adjacent unit pixel. This is because it is placed in a lower position.

As a result, the influence of leakage of the power supply voltage to the photodiode region PD in the adjacent unit pixel is reduced.

11 illustrates a depletion state of a photodiode according to an embodiment of the present invention.

Referring to FIG. 11, since the transfer gate Tx is in the shape of a closed band and is located at the center of the photodiode region PD, the critical distance r 'affecting the driving force for the charge transport transmitted from the power supply voltage is determined. All areas of the photodiode area PD are included.

Therefore, the complete depletion of the photodiode at the turn-on of the transfer transistor becomes easier, thereby improving the charge transfer efficiency and improving the sensitivity of the image sensor.

12 is a plan view of a unit pixel according to another exemplary embodiment of the present invention.

Referring to FIG. 12, a unit pixel having a rectangular shape on a plane is divided into a lower region having a relatively larger area than an upper region, and a photodiode region PD is allocated to all regions of the lower region. A reset transistor, a drive transistor, and a select transistor are allocated to the upper region of the circuit board, and a band-shaped transfer gate Tx is disposed above the central portion of the lower region.

In detail, the unit pixel is disposed on the photodiode PD and the photodiode PD having four sides pd1, pd2, pd3, and pd4 so that the floating diffusion region FD is formed on the photopixel. A band-shaped transfer gate Tx to be defined at the central portion of the diode region PD, a photodiode connected to one end of the first side pd1 of the four sides of the photodiode region PD and in contact with the first side pd1. One side thereof is aligned with the second side pd2 of the region PD so as to be connected to the first active region ACT1 to which the power supply voltage VDD is supplied and the other side of the first active region ACT1, The photodiode of the photodiode region PD is output as an electrical signal by being arranged in parallel with the first side pd1 of the PD and having its end aligned with the third side pd3 which is in contact with the first side pd1. It consists of two active areas ACT2.

In addition, the reset gate Rx is disposed above the boundary portion where the first active region ACT1 and the first side pd1 of the photodiode region PD contact each other, and the second active region is disposed above the second active region ACT2. The drive gate Dx and the select gate Sx are arranged side by side in the direction crossing the region ACT2, and the output terminal contact Vout CT is connected to the end of the second active region ACT2 by the select gate Sx. do. A power supply voltage terminal contact VDD CT for supplying a power supply voltage to the end of the first active region ACT1 is connected.

In FIG. 12, the drive gate Dx and the select gate Sx are disposed to have a length that crosses only the upper portion of the second active region ACT2, and are in the floating diffusion region FD defined by the transfer gate Tx. The floating diffusion contact FD CT is connected, and the floating diffusion contact FD CT is connected through the drive gate Dx and the drive gate contact Dx CT.

In addition, the size of the floating diffusion region FD is determined by a transfer gate Tx positioned above the photodiode region PD, and the transfer gate Tx is a strip-shaped gate forming a closed curve. Accordingly, the floating diffusion region FD is positioned inside the closed curve of the transfer gate Tx.

In the above-described unit pixel, the photodiode region PD, the first active region ACT1 and the second active region ACT2 constituting the unit pixel are defined in a quadrangular shape. This shows that the photodiode region PD occupies all the lower region of the unit pixel defined by the quadrangle, and the reset transistor, the drive transistor, and the select transistor occupy the remaining upper region of the unit pixel.

In FIG. 12, the transfer gate Tx has a closed curved band, and unlike FIG. 7, the transfer gate Tx has a rectangular band.

As described above, when the transfer gate Tx has a rectangular band shape, the area of the floating diffusion region FD may be further reduced compared to the doughnut shape of FIG. 7, thereby reducing the capacitance of the floating diffusion region FD. Can be obtained.

In the above-described embodiments, the transfer gate has a circular band shape and a rectangular band shape, but the transfer gate Tx may be a polygon.

The present invention described above is widely applicable to the manufacture of CMOS image sensors by the techniques of 0.25 mu m, 0.18 mu m and below, and equally applicable to optical elements and CCDs similar to CMOS image sensors.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention described above has the effect that the fill factor can be improved by sufficiently changing the layout such that the photodiode occupies all the lower regions of the unit pixels, thereby sufficiently securing the dynamic range and the capacity of the photodiode.

In addition, as the distance between the power supply terminal contact and the photodiode region of the adjacent unit pixel becomes longer, the dark bad pill cell error caused by the leakage of the power supply voltage can be suppressed to improve the yield and reduce the production cost.

In addition, since the transfer gate is positioned at the center of the photodiode region, the photoelectron in the photodiode is completely depleted, thereby improving the sensitivity of the image sensor.

Claims (7)

The unit pixels forming a rectangular shape on a plane are divided into lower areas having a relatively larger area than the upper areas. Photodiodes are allocated to all regions of the lower region, A reset transistor, a drive transistor, and a select transistor are allocated to the upper region. And a band-shaped transfer gate is disposed above the central portion of the lower region. According to claim 1, And the photodiode is allocated such that the fill factor, which is an area ratio of the photodiode to the unit pixel, is at least 66.7%. A rectangular photodiode region consisting of four sides; A band-type transfer gate disposed above the photodiode region to define a floating diffusion region at a central portion of the photodiode; A first active region connected to one end of a first side of the four sides of the photodiode region and having one side thereof aligned with a second side of the photodiode region in contact with the first side and supplied with a power supply voltage; And The photodiode of the photodiode region is output as an electrical signal by being connected to the other side of the first active region and arranged side by side with the first side of the photodiode and having its end aligned with a third side that is in contact with the first side. Second active area Unit pixel of the image sensor, characterized in that it comprises a. The method of claim 3, wherein A reset gate disposed on a boundary portion between the first active region and the first side of the photodiode region; A drive gate and a select gate disposed side by side in a direction crossing the second active region on the second active region; An output terminal contact connected to an end of the second active region by the select gate; And A power supply voltage contact connected to an end of the first active region Unit pixel of the image sensor, characterized in that it further comprises. The method of claim 4, wherein And the drive gate and the select gate have a length crossing only an upper portion of the second active region. The method of claim 4, wherein And a floating diffusion contact is connected to the floating diffusion region defined by the transfer gate, and the floating diffusion contact is connected to the drive gate. The method of claim 3, wherein The transfer gate unit pixel of the image sensor, characterized in that the band of the circular or polygonal form.