KR20040002403A - End-point detection system for chemical mechanical polishing applications - Google Patents

Abstract

In the present invention, a chemical mechanical polishing system and method are disclosed. The system includes a polishing pad configured to move from a first point to a second point. A carrier is also included and configured to hold the substrate being polished over the polishing pad. The carrier is designed to apply the substrate to the polishing pad in a polishing location between the first and second points. The first sensor is located at a first point and is oriented to sense the IN temperature of the polishing pad, and the second sensor is located at a second point and is oriented to sense the OUT temperature of the polishing pad. The sensing of the IN and OUT temperatures is configured to produce a temperature difference that allows monitoring of the state of the process and the state of the wafer surface for the purpose of switching process steps during processing of the wafer by chemical mechanical planarization.

Description

END-POINT DETECTION SYSTEM FOR CHEMICAL MECHANICAL POLISHING APPLICATIONS}

In assembling a semiconductor device, it is necessary to perform CMP operations including polishing, buffing and wafer cleaning. Typically, integrated circuit devices are in the form of multilevel structures. At the substrate level, a transistor device having a diffusion region is formed. Within the subsequent levels, interconnect metallization lines are patterned and electrically connected to transistor devices to define the device of the required function. As is known, the conductive layer of the pattern is insulated from the other conductive layer by a dielectric material such as silicon dioxide. At each metallization level, it is necessary to planarize the metal or associated dielectric material. Assembly of additional metallization layers without planarization is difficult due to large changes in surface topography. In other applications, metallization line patterns are formed in the dielectric material, and then metal CMP operations are performed to remove excessive metallization, such as, for example, copper.

In the prior art, CMP systems typically run stations with belts, tracks, or brushes, where belts, pads, or brushes are used for scrubbing, buffing, and polishing wafers. Slurry is used to easily increase the CMP operation. Typically, the slurry is mostly introduced into a moving preparation surface, such as a belt, pad or brush, and is distributed over the preparation surface as well as the surface of the semiconductor wafer that is buffed, polished or otherwise prepared by the CMP process. Generally, dispensing is performed by a combination of the movement of the preparation surface and the movement of the semiconductor wafer, and the friction caused between the semiconductor wafer and the preparation surface.

1A is a cross-sectional view of a dielectric layer 102 in which an assembly process is conducted in which an inlay and a double inlay interconnect metallization line is constructed. The dielectric layer 102 has a diffusion barrier layer 104 deposited over the etched patterned surface of the dielectric layer 102. The diffusion barrier layer as known is typically titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), or a combination of tantalum nitride (TaN) and tantalum (Ta). Diffusion barrier layer 104 is deposited to the desired thickness, and copper layer 104 is formed over the diffusion barrier layer by filling the etched features in dielectric layer 102. Some excess diffusion layers and metallization materials are inevitably deposited over the field region. In order to remove these excessively added materials, and to define the required interconnect metallization lines and associated vias (not shown), a chemical mechanical planarization (CMP) operation is performed.

As noted above, the CMP operation is planned to remove the upper metallization material therefrom across the dielectric layer 102. For example, as shown in FIG. 1B, excessively added portions of the copper layer 106 and the diffusion barrier layer 104 are removed. In general, the CMP operation should continue until all of the excessively added metallization and diffusion barrier layer 104 has been removed across the dielectric layer 102. However, to ensure that all diffusion barrier layer 104 is removed from dielectric layer 102, a method is needed to monitor the state of the process and the state of the wafer surface during the CMP process. This is commonly referred to as endpoint detection. In a multi-step CMP operation, it is necessary to identify a number of endpoints (such as ensuring that Cu is removed across the diffusion barrier layer and ensuring that the diffusion barrier layer is removed across the dielectric layer). Thus, endpoint detection techniques are used to ensure that all of the required excessively added material is removed. A common problem with current endpoint detection techniques is that all conductive materials (e.g., metallized material or diffusion barrier layer 104) may be applied to dielectric layer 102 to prevent inadvertent electrical connections between metallization lines. Some excess etching is required to ensure removal over time. The side effect of inadequate endpoint detection or excessive polishing is that across the metallization layer it is desirable for dishing 108 to remain in the dielectric layer 102. Basically, the dishing effect removes more metallization material than is required and leaves the disked features over the metallization line. The dishing negatively affects the performance of the interconnect metallization lines, with excessive dishing preventing the required integrated circuits from being used for their intended purpose.

1C shows a prior art belt CMP system, where pad 150 is designed to rotate around roller 151. In general, in a belt CMP system, a platen 154 is positioned below the pad 150 to provide a surface to which the wafer is applied using the carrier 152 as shown in FIG. 1D. One way to perform endpoint detection is to use photodetector 160, where light is applied on the surface of wafer 100 to be polished through platen 154 and through pad 150. . To achieve optical endpoint detection, pad slot 150a is formed in pad 150. In some embodiments, pad 150 may include a number of pad slots 150a strategically located within various locations of pad 150. Typically, the pad slot 150a should be designed small enough to minimize the impact on the polishing operation. In addition to pad slot 150a, platen slot 154a is defined within platen 154. The platen slot 154a is designed such that the optical beam passes through the platen 154, pad 150, towards the required surface of the wafer 100 during polishing.

By using the photodetector 160, it is possible to confirm the removal level of the predetermined film from the wafer surface. This detection technique is designed to measure the thickness of the film by irradiating the interference pattern received by the photodetector 160. Although optical endpoint detection may be suitable for some applications, optical endpoint detection may not be sufficient when endpoint detection is required for various areas or regions of semiconductor wafer 100. In order to examine the various regions of the wafer 100, it is necessary to define some pad slots 150a as well as some platen slots 154a. As more slots are defined in pad 150 and platen 154, this may be the most adverse effect on the polishing performed on wafer 100. That is, the surface of the pad 150 not only changes due to the number of slots formed in the pad 150 but also complicates the design of the platen 154.

Additionally, the conventional platen 154 is designed to strategically apply a predetermined back pressure to the pad 150 to enable accurate removal of the layer from the wafer 100. As more slots 154a are defined in the platen 154, it becomes difficult to plan and execute the pressure applied to the platen 154. Thus, optical endpoint detection is generally complex to integrate into a belt CMP system, and in complete detection of endpoints through various regions or areas of the wafer without affecting the CMP system's ability to precisely polish the wafer layer. Indicates a problem.

2A is a partial cross-sectional view of the semiconductor chip of an embodiment after the top layer has undergone a copper CMP process. Using reference impurity implantation and photolithography and etching techniques, the P-type transistors and N-type transistors are assembled into the P-type silicon substrate 200. As shown, each transistor has a gate, source and drain assembled into suitable wells. Alternating P-type transistors and N-type transistors create a dielectric semiconductor (CMOS) device of complementary metal.

The first dielectric layer 202 is assembled across the transistor and the substrate 200. Conventional photolithography, etching, and deposition techniques are used to create the tungsten plug 210 and the copper line 212. Tungsten plug 210 provides an electrical connection between the copper line 212 and the active feature on the transistor. The second dielectric layer 204 can be assembled over the first dielectric layer 202 and the copper line 212. Conventional photolithography, etching and deposition techniques are used to create the copper vias 220 and copper lines 214 in the second dielectric layer 204. The copper flow path 220 provides an electrical connection between the copper line 214 of the second layer and the copper line 212 or tungsten plug 210 of the first layer.

The wafer is then planarized to a surface of the flat plate (possibly shown here with reference to FIG. 1B but possibly with dishing) as described with reference to FIGS. 1A-1D. In order to do this, they typically undergo a copper CMP process. After the copper CMP process, the wafer is cleaned in a wafer cleaning system.

FIG. 2B is a partial cross-sectional view of the wafer after undergoing optical endpoint detection, as described with reference to FIGS. 1C and 1D. As shown, the copper line 214 on the top layer is subject to photo-corrosion during the detection process. Photo-corrosion is believed to be produced in part by the arrival of a P / N junction where photons emitted by the photodetector can act as solar cells. Unfortunately, the amount of light that normally occurs in the photodetector can cause catastrophic corrosion effects.

In this example of cross section, a copper line, a copper channel or a tungsten plug is electrically connected to various parts of the P / N junction. The slurry compound and / or the chemical solution applied to the wafer surface may comprise an electrolyte, which has the effect of closing the electrical circuit as electrons (e ⁻ ) and holes (p ⁺ ) cross the P / N junction. Has The photon generated electron / hole pairs within the junction are separated by an electric field. The introduced carrier induces a potential difference between the two sides of the junction. This potential difference increases with light intensity. Thus, at the electrode connected to the P- side of the junction, copper is corroded: Cu → Cu ²⁺ + 2e ⁻ . There is produced soluble ionic species can diffuse to the other electrode, where the reduction can occur Cu ²⁺ + 2e ^- → Cu. The general corrosion formula for metals is M → M ^{n +} + ne ^−, and the general reduction formula for metals is M ^{n +} + ne ⁻ → M. For further information on photo-corrosion effects, see A. Beverina et al., “Photo-Corrosion Effects During Cu Interconnection Cleanings,” presented at the 196th ECS Meeting in Honolulu, Hawaii, October 1999.

Unfortunately, this type of photo-corrosion displaces the copper lines as shown in FIG. 2B and destroys the intended physical topography of the copper features. At some locations on the wafer surface across the P-type transistor, the photo-corrosion effect can result in corroded copper line 224 or fully dissolved copper line 226. In other words, photo-corrosion can completely corrode the copper line so that the line no longer exists. On the other hand, over the N-type transistor, the photo-corrosion effect can cause copper deposition 222 to be formed. This distorted topography, including corrosion of the copper lines, causes defects in the device and renders the entire chip inoperable. One defective device means that the entire chip must be discarded, thus reducing the yield and significantly increasing the cost of the assembly process. And this effect occurs over the entire wafer, thus ruining many chips on the wafer. This, of course, increases the assembly cost.

As described above, there is a need for a CMP endpoint detection system that enables precise endpoint detection that prevents dishing and avoids the need for excessive polishing without running a photodetector.

TECHNICAL FIELD The present invention relates to chemical mechanical polishing (CMP) of semiconductor wafers, and more particularly to detection techniques for polishing endpoints.

1A and 1B are cross-sectional views of a dielectric layer undergoing an assembly process generally constituting inlay and double inlay interconnect metallization lines and structures;

1C and 1D show prior art belt CMP systems in which the pad is designed to rotate around the rollers and optical endpoint detection is used, FIG.

2A is a cross-sectional view of a conventional semiconductor chip after the top layer has undergone a copper CMP process,

FIG. 2B is a cross-sectional view of the conventional semiconductor chip of FIG. 2A after the wafer has undergone corrosion by photos, for example due to optical endpoint detection;

3A illustrates a CMP system including an endpoint detection system in accordance with an embodiment of the present invention;

3b is a plan view of a portion of the pad moving linearly,

3d is a more detailed view of FIG. 3c;

4A is a cross-sectional view of a dielectric layer, a diffusion barrier layer, and a copper layer with the copper layer and the diffusion barrier layer removed during a CMP operation including endpoint detection in accordance with one embodiment of the present invention;

4b and 4c are plots showing temperature differences versus time in accordance with one embodiment of the present invention;

FIG. 5A is a plan view of another embodiment of the present invention, in which a pair of the plurality of sensors 1 to 10 and the reference sensor R are disposed in close proximity to the carrier (a certain pair of sensors may be used depending on the application),

5B is a table having a target temperature difference for each region of a wafer according to one embodiment of the present invention;

FIG. 6 is a schematic diagram of the sensors 1 to 10 shown in FIG. 5A.

Broadly speaking, the present invention meets these needs by providing an endpoint detection system and method for use in chemical mechanical polishing of substrate surface layers. The invention can be practiced in a number of ways, including as a process, apparatus, system, apparatus, or method. For example, the present invention can be used as a track pad system as well as a linear belt pad system, a rotary pad system. A number of embodiments of the invention are described below.

In one embodiment, a chemical mechanical polishing system is disclosed. The system includes a polishing pad configured to move linearly from a first point to a second point. A carrier is also included and configured to hold the substrate being polished over the polishing pad. The carrier is designed to apply the substrate to the polishing pad in a polishing location between the first and second points. The first sensor is located at a first point and is oriented to sense the IN temperature of the polishing pad, and the second sensor is located at a second point and is oriented to sense the OUT temperature of the polishing pad. The sensing of the IN and OUT temperatures is configured to produce a temperature difference that indicates the removal of the required layer from the substrate.

In another embodiment, a method for monitoring an endpoint for chemical mechanical polishing is disclosed. The method provides a polishing pad configured to move linearly and applies the wafer to the polishing pad at the polishing position to remove the first layer of material from the wafer. Moreover, the method detects the first temperature of the polishing pad belt at the IN position before the polishing position and the second temperature of the polishing pad belt at the OUT position after the polishing position. The temperature difference between the second temperature and the first temperature is then calculated. The change in temperature difference is then monitored so that the change in temperature difference indicates the removal of the first layer from the wafer. Here, the first layer may be a predetermined layer assembled over a wafer such as a dielectric layer, a copper layer, a diffusion barrier layer, and the like.

In yet another embodiment, a method for detecting an endpoint of a material to be removed from a wafer surface is disclosed. The method includes (a) providing a polishing pad configured to move linearly, (b) applying the wafer to the polishing pad at the polishing position to remove a layer of material from the wafer, and (c) a first position before the polishing position Detecting a first temperature of the polishing pad, (d) detecting a second temperature of the polishing pad at a second position after the polishing position, and (e) calculating a temperature difference between the second temperature and the first temperature. It is made.

In another embodiment, an endpoint detection method is disclosed. The method includes (a) providing a polishing pad, (b) applying the wafer to the polishing pad at the polishing position to remove the first layer of material from the wafer, and (c) removing the polishing pad at the IN position before the polishing position. Sense a first temperature, (d) detect a second temperature of the polishing pad at the OUT position after the polishing position, (e) calculate a temperature difference between the second temperature and the first temperature, and (f) Monitoring a change in temperature difference indicating removal of the first layer. Here, the pad is one of a belt pad, a table pad, a rotary pad, and a track pad.

Disclosed are a chemical mechanical polishing (CMP) endpoint detection system and a method for implementing such a system. In the following description, numerous details are set forth in order to provide an understanding of the present invention. However, it is understood by those skilled in the art that the present invention may be practiced without some or all of these specific details. In other instances, well known process operations are described in detail to clarify the invention.

3A illustrates a CMP system 300 that includes an endpoint detection system in accordance with one embodiment of the present invention. The endpoint detection system is designed to include sensors 310a and 310b located near a location proximate the carrier 308. As is known, the carrier 308 is designed to hold the wafer 301 and apply the wafer 301 to the surface of the pad 304. The pad 304 is designed to move in the pad direction of movement 305 around the rollers 302a and 302b. In general, the pad 304 is provided with a slurry 306 that aids in chemical mechanical polishing of the wafer 301. In this embodiment, the CMP system 300 includes a conditioning head 316 coupled to the track 320. The conditioning head is designed to scrub the surface of the pad 304 in an internal or external position. As is known, the conditioning of the pad 304 is designed to readjust the surface of the pad 304 to improve the performance of the polishing operation.

The sensors 310a and 310b are designed such that the carrier 308 rotates the wafer 301 over the surface of the pad 304, while being fixed over the position of the pad 304. Thus, the sensors 310a and 310b do not rotate with the carrier 308 but remain in the same proximal position across the platen 322. Sensors 310a and 310b are temperature sensors that sense the temperature of pad 304 during CMP operation. The sensed temperature is then provided as sense signals 309a and 309b and sent to the endpoint signal processor 312. As shown, the carrier 308 has a carrier positioner 308 designed to lower and raise the carrier 308 and associated wafer 301 over the pad 304 in the direction 314.

3B is a plan view of a portion of the pad 304 that moves in the direction of movement 305. As shown, the carrier 308 is lowered onto the pad 304 by the carrier positioner 308a. As shown in FIGS. 3C and 3D, the sensors 310a and 310b are also lowered towards the pad 304. As noted above, the sensors 310a and 310b do not rotate with the carrier 308 but remain in the same relative position across the pad 304. Thus, the sensors 310a and 310b are designed to be fixed, which can move vertically towards the pad 304 and be spaced apart from the pad 304 synchronously with the carrier 308. Thus, when the carrier 308 is lowered towards the pad 304, the sensors 310a and 310b are also lowered towards the surface of the pad 304. In other embodiments, the carrier 308 can move independently from the sensors 310a, 310b.

In a preferred embodiment of the present invention, sensors 310a and 310b are designed to sense the temperature emitted from pad 304. Since the wafer is in constant friction with the pad 304 during polishing, the pad 304 will change in temperature from the time the pad 304 moves from a fixed position of the sensors 310a, 310b. Typically, heat is absorbed by the wafer, pad material, slurry to the outside, and ancillary processes. Therefore, this produces a temperature difference that can be sensed. Thus, the sensed temperature for sensor 310a is the "in" temperature (Tin) and the temperature sensed at sensor 310b is the "out" temperature (Tout). Then, the temperature difference DELTA T is measured by subtracting Tin from Tout. The temperature difference is represented by the formula in box 311 in FIG. 3B.

3C is a side view of the carrier 308 applying the wafer 301 to the pad 304. As shown, the carrier 308 applies the wafer 301 held by the retaining ring 308 to the pad 304 over the platen 322. As the pad 304 moves in the direction of movement 305, the sensor 310a detects the temperature Tin that is transmitted in the sense signal 309a to the endpoint signal processor 312. The sensor 310b is also configured to receive the temperature Tout, providing the sensed temperature to the processor 312 as a sense signal 309b to the endpoint signal processor. In one embodiment, the sensor 310 is preferably located close to the pad 304 so that the temperature can be sensed sufficiently accurately and provided to the endpoint signal processor 312. For example, the sensor is preferably adjusted to be between about 1 mm and about 250 mm from the surface of the pad 304 when the carrier 308 applies the wafer 301 to the surface of the pad 304. In a preferred embodiment, the sensor 310a shown in FIG. 3D is positioned to be approximately 5 mm from the surface of the pad 304.

In a preferred embodiment, the sensor 310 is preferably an infrared sensor configured to sense the temperature of the pad 304 as the pad moves linearly in the pad direction of movement 305. The infrared temperature sensor of one embodiment is model number 39670-10 sold by Cole Parmer Instruments, Co. of Vernon Hills, IL. In other embodiments, the sensor 310 need not be immediately adjacent the carrier 308. For example, the sensor may be spaced apart from the carrier 308 at a distance between about 1/8 inch and about 5 inches, most preferably located about 1/4 inch from the side of the carrier 308. The sensor 310 is fixed relative to the pad while the carrier 308 is configured to increase the rotation of the wafer 301 relative to the pad surface 304 so that the sensor 310 is arranged at the desired spacing so that the sensor 310 Do not interfere with the rotation of 308).

4A is a cross-sectional view of dielectric layer 102, diffusion barrier layer 104, and copper layer 106. The thickness of the diffusion barrier layer 104 and the copper layer 106 may vary depending on the wafer and on the region of the particular wafer surface to be polished. However, during the polishing operation, an approximate amount of time is taken to remove the desired amount of material from the wafer across the wafer 301. For example, at the beginning of the polishing operation, it takes until approximately time T ₂ to remove diffusion barrier layer 104 over time T ₀ , and remove copper 106 to diffusion barrier layer 104. To take the time T ₁ .

For purposes of illustration, FIG. 4B provides a plot 400 of temperature difference versus time. The temperature difference versus time plot 400 shows the change in temperature difference across the pad 304 surface between the sensors 310a and 310b. For example, the temperature difference state 402a at the temperature T ₀ becomes zero since the polishing operation has not yet started. When the polishing operation starts on the copper material, the temperature difference 402b is moved up to the temperature difference ΔT _A. This temperature difference increases with respect to the OFF position in accordance with the frictional stress that the temperature of the pad 304 receives by the application of the wafer 301 to the pad 304.

Further, the temperature difference DELTA T _A increases to a predetermined level based on the type of material to be polished. Once the copper layer 106 is removed over the structure of FIG. 4A, the CMP operation continues over the diffusion barrier layer 104. As the diffusion barrier layer material begins to polish, the temperature difference moves from 402b to 402c. The temperature difference 402c is represented by ΔT _B. This is an increase in temperature difference due to the fact that the diffusion barrier layer 104 is a harder material than the copper layer 106. As the diffusion barrier layer 104 is removed from the dielectric layer over the dielectric layer 102, more dielectric material begins to polish, thus causing another shift in temperature difference at time T ₂ .

At this point, the temperature difference 402d is created at ΔT _C. Thus, a shift between ΔT _B and ΔT _C will define the target endpoint temperature difference change 404. The target endpoint temperature difference change 404 will occur approximately at time T ₂ . In order to ensure that the diffusion barrier layer 104 is sufficiently removed from the dielectric layer over the dielectric layer 102, a transition between 402c and 402d is preferably made to ascertain a suitable time for stopping the polishing operation.

As shown in FIG. 4C, the target endpoint temperature difference change 404 is shown magnified, with the test at multiple points P ₁ , P ₂ , P ₃ , P _4, P ₅ , P ₆ , P ₇ . Is made. These points span the temperature difference ΔT _B and ΔT _C. As shown, time T ₂ actually spans between time T ₂ (P ₁ ) and time T ₂ (P ₇ ). In order to ensure the best and maximum accurate endpoint, it is necessary to check at what time within time T ₂ to stop. Preferably, the difference between points P ₁ to P ₇ is analyzed by polishing several test wafers having the same material and layer thickness. By examining the various polished layers for the associated layer thickness as well as various time periods, it is possible to ascertain the exact time to stop the polishing operation. For example, the polishing operation may stop at point P ₅ 405 instead of point P _OP 407 which defines excessive polishing time. Typically, excessive polishing techniques are used in the prior art when it is uncertain when the polished diffusion barrier layer or any other layer is actually removed from the base layer (eg, dielectric layer) over the base layer.

By checking the transition between time difference 402c and time difference 402d, however, it is possible to ascertain a suitable time for stopping the polishing operation in the window (and thus to detect an accurate or nearly accurate endpoint). The above-mentioned problems of dishing and other excessive abrasive damage that may occur in sensitive interconnect metallization lines or features can be avoided.

5A is a plan view of another embodiment of the present invention, in which a plurality of sensors 1 to 10 and a pair of reference sensors R are arranged in close proximity to the carrier 308. By the way, it should also be understood that any pair of sensors may be used. In this embodiment, the sensor is divided into five zones over the wafer to be polished. As the pad is rotated in the direction 305, the temperature difference is determined between the sensors 9 and 10, 5 and 6, 1 and 2, 3 and 4, and 7 and 8. Each of these temperature differences ΔT ₁ to ΔT ₅ define regions 1 to 5, respectively. For each of these areas, there will be a determined target temperature difference to identify the endpoint.

By the calibrated test, it can be determined that the target temperature difference for each of the regions can be varied as shown in FIG. 5B. For example, regions 1 and 5 may have a target temperature difference of 15, regions 2 and 4 may have a target temperature difference of approximately 20, and region 3 may have a temperature difference of approximately 35. By examining the temperature difference in each of the zones, it becomes possible to see in FIG. 5A whether the appropriate endpoint reaches for the various zones of the wafer being polished. Therefore, the embodiment of FIGS. 3 to 4 can be similarly applied to the embodiment of FIGS. 5A and 5B. By analyzing various regions of the wafer surface, however, it becomes possible to identify more accurate endpoints over various regions of a given wafer. Of course, some sensors may be implemented depending on the number of areas in which it is desirable to be monitored.

FIG. 6 is a schematic diagram of the sensors 1 to 10 shown in FIG. 5A. Sensors 1 through 10 (such as sensors 310a and 310b in FIG. 3) are arranged in a position proximate to the pad, but are in a stationary position that does not rotate as carrier 308 rotates. As the polishing operation proceeds, by determining the temperature at various locations across the pad 304, the temperature difference ΔT ₁ to ΔT ₅ can be identified at various relative positions of the pad 304. The sensed signal 309 is then sent to the endpoint signal processor 312.

Endpoint signal processor 12 is configured to include a multichannel digitization card 462 (or digitization circuitry). The multichannel digitizing card 462 samples each of the signals and provides a suitable output 463 to the CMP control computer 464. The CMP control computer 464 then processes the signals received from the multichannel digitization card 462, which may provide the signals 465 to the graphic display 466. Graphical display 466 may include a graphical user interface (GUI) that graphically illustrates the various regions of the wafer being polished and informs when a suitable endpoint is reached for each particular region. If the endpoints reach for one area before another area, an appropriate back pressure on the wafer may be applied, or the polishing pad back pressure may be changed at these given locations where polishing is slowed to improve the uniformity of the CMP operation and thus uniform In a method (eg, at about the same time) to allow the endpoint to reach through the wafer.

As noted above, the endpoint monitoring of the present invention allows for more accurate CMP operation across the wafer and, without harm, leaving the underlying surface clear of the wafer being polished to ensure that the required material is removed. Has the benefit of zeroing to the selected area. In addition, the monitored embodiments of the present invention may be configured nondestructively on wafers that may be sensitive to photo-corrosion as described above. Moreover, embodiments of the present invention do not require the CMP pads to be changed by pad slots or drilled into a platen or rotary table located under the pads. Thus, monitoring is a manual monitoring that does not interfere with accurate polishing of the wafer and provides a very accurate indication of the endpoint to accurately stop polishing.

Although the present invention has been described by a number of preferred embodiments, it will be apparent to those skilled in the art that various changes and modifications and equivalents are possible through the specification and drawings. For example, endpoint detection techniques can be used on certain polishing platforms (eg, belts, table rotary machines, tracked machines, etc.) and on wafers or substrates of any size, such as 200 mm and 300 mm, as well as larger other sizes and shapes. Can be done for. Therefore, it is intended that the present invention cover all such modifications, changes, substitutions, and equivalents without departing from the spirit and scope of the invention.

Claims (25)

A polishing pad configured to move linearly from a first point to a second point, A carrier configured to hold the substrate being polished over the polishing pad, the carrier being designed to apply the substrate to the polishing pad at a polishing location between the first and second points, A first sensor positioned at a first point and oriented to sense an IN temperature of the polishing pad, And a second sensor positioned at a second point and oriented to sense the OUT temperature of the polishing pad. 2. A chemical mechanical polishing system according to claim 1, wherein during polishing of the substrate, the temperature difference between the OUT temperature and the IN temperature is monitored. 3. The chemical mechanical polishing system of claim 2, wherein the change in temperature difference indicates a change in the material polished from the substrate. 2. The chemical mechanical polishing system of claim 1, further comprising an endpoint signal processor, wherein the endpoint signal processor is configured to receive sensing signals from each of the first and second sensors. 5. A chemical mechanical polishing system according to claim 4, wherein during the polishing of the substrate, the received signal is processed to monitor the temperature difference between the OUT and IN temperatures. 5. The chemical mechanical polishing system according to claim 4, wherein the change in temperature difference is indicative of a change in material to be polished from the substrate. 2. The chemical mechanical polishing system of claim 1, wherein each of the first and second sensors is an infrared sensor. 2. The chemical mechanical polishing system according to claim 1, wherein the first and second sensors are arranged at a separation distance between approximately 1 mm and approximately 250 mm from the polishing pad. 5. The chemical mechanical polishing system of claim 4, wherein the endpoint signal processor further comprises a multichannel digitization circuit, the multichannel digitization circuit configured to process sense signals from the first and second sensors. 10. The chemical mechanical polishing system of claim 9, further comprising a graphical user interface (GUI) display coupled to the endpoint processor, wherein the GUI display is configured to show the endpoint monitoring status. The apparatus of claim 1, further comprising an array of sensor pairs, the array of sensor pairs comprising a first sensor and a second sensor, wherein each pair of sensor pair arrays is arranged and polished And a temperature difference associated with the chemical mechanical polishing system. 2. The chemical mechanical polishing system of claim 1, wherein the substrate is one of a semiconductor wafer and a data storage disk. Providing a polishing pad belt configured to move linearly, In order to remove the first layer of material from the wafer, the wafer is applied to the polishing pad belt at the polishing position, Before the polishing position, linearly detect the first temperature of the polishing pad belt at the IN position, After the polishing position, the second temperature of the polishing pad belt is linearly detected at the OUT position, Calculate a temperature difference between the second temperature and the first temperature, Monitoring a change in temperature difference indicating an indication of removal of the first layer from the wafer. 14. The method of claim 13, further comprising generating a temperature difference table, the temperature difference table comprising a plurality of temperature differences, each associated with a type of material polished from the wafer. How to. 15. The method of claim 14, wherein the change in temperature difference indicates a change in removal of the first layer of first type material relative to another layer of the second type material. 16. The method of claim 15, wherein the first type of material is a metallized material and the second type of material is a barrier material. 16. The method of claim 15, wherein the first type of material is a diffusion barrier material and the second type of material is a dielectric material. The method of claim 13, wherein the sensing comprises infrared temperature sensing. 14. The method of claim 13, further detecting a plurality of additional location pairs, each further location pair comprising a first point before the polishing location and a second point after the polishing location. 20. The method of claim 19, wherein each additional pair of locations is configured to provide endpoint detection over an associated plurality of regions of the wafer. Providing a polishing pad configured to move linearly, Applying the wafer to the polishing pad at the polishing location to remove a layer of material from the wafer, Detecting a first temperature of the polishing pad at a first position before the polishing position, Detecting a second temperature of the polishing pad at a second position after the polishing position, Calculating a temperature difference between the second temperature and the first temperature, the method for monitoring the process status of the wafer surface for the purpose of switching to another wafer preparation phase or terminating the chemical mechanical planarization process. 22. The method of claim 21, further comprising monitoring a change in temperature difference indicating removal of the layer from the wafer. 23. The method of claim 22, wherein the change in temperature difference further indicates a change in removal of the layer of material of the first type relative to another layer of material of the second type. Providing a polishing pad, Applying the wafer to the polishing pad at the polishing location to remove the first layer of material from the wafer, Detect the first temperature of the polishing pad at the IN position before the polishing position, Detect the second temperature of the polishing pad at the OUT position after the polishing position, Calculate a temperature difference between the second temperature and the first temperature, Monitoring a change in temperature difference indicating removal of the first layer from the wafer. 25. The method of claim 24, wherein the pad is one of a belt pad, a table pad, a rotary pad, and a tracked pad.