KR200303153Y1 - Socket for semiconductor device test with ground plate - Google Patents
Socket for semiconductor device test with ground plate Download PDFInfo
- Publication number
- KR200303153Y1 KR200303153Y1 KR2019980004898U KR19980004898U KR200303153Y1 KR 200303153 Y1 KR200303153 Y1 KR 200303153Y1 KR 2019980004898 U KR2019980004898 U KR 2019980004898U KR 19980004898 U KR19980004898 U KR 19980004898U KR 200303153 Y1 KR200303153 Y1 KR 200303153Y1
- Authority
- KR
- South Korea
- Prior art keywords
- socket
- ground plate
- semiconductor device
- coaxial cable
- pin
- Prior art date
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Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
- G01R1/0433—Sockets for IC's or transistors
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
본 고안은 반도체장치 테스트를 위한 소켓에 관한 것으로서, 특히, 소켓의 몸체 내측으로 형성된 설치홈에 설치되고, 상,하측으로 각각 돌출된 상,하측핀부를 갖는 접속핀과; 상기 접속핀의 외주면을 감싸듯이 부착되는 동축케이블과; 상기 동축케이블의 외측면에 접촉되면서 다수의 접속핀의 외측으로 설치되는 접지판으로 구성된 접지판을 갖는 반도체장치 테스트용 소켓인 바, 동축케이블에 접지판을 외주면에서 접촉하여 전기적인 접지가 이루어지도록 하여 접속핀의 임피던스가 변화하는 것을 방지하여 안정적인 테스트가 이루어지도록 하는 매우 유용하고 효과적인 고안이다.The present invention relates to a socket for testing a semiconductor device, and in particular, is installed in the installation groove formed inside the body of the socket, the connection pins having upper and lower pin portions respectively protruding upward and downward; A coaxial cable attached to surround the outer circumferential surface of the connection pin; It is a socket for a semiconductor device test having a ground plate composed of a ground plate installed on the outside of the plurality of connection pins while being in contact with the outer surface of the coaxial cable. This is a very useful and effective design that prevents the impedance of the connection pins from changing and enables stable testing.
Description
본 고안은 반도체장치를 테스트하기 위한 소켓에 관한 것으로, 특히, 소켓의 접속핀이 외주면에 동축케이블을 감싸듯이 하여 각각의 접속핀의 동축케이블에 접지판을 외주면에서 접촉하여 전기적인 접지가 이루어지도록 하여 접속핀의 임피던스가 변화하는 것을 방지하여 안정적인 테스트가 이루어지도록 하는 접지판을 갖는 반도체장치 테스트용 소켓에 관한 것이다.The present invention relates to a socket for testing a semiconductor device, and in particular, so that the connection pin of the socket surrounds the coaxial cable on the outer circumferential surface such that the ground plate contacts the coaxial cable of each connection pin on the outer circumferential surface so that electrical grounding is achieved. The present invention relates to a socket for testing a semiconductor device having a ground plate which prevents the impedance of the connection pin from changing so that a stable test is performed.
일반적으로, 웨이퍼는 규소를 얇은 박판으로 형성한 것으로서, 규소(Si)를 고순도로 정제하여 결정시킨 후에 얇게 잘라내어서 반도체소자를 만드는 기본재료로 사용하게 된다. 웨이퍼는 통상적으로 여러 가지의 반도체 공정을 통하여 상부면에 무수한 패턴을 형성하고, 이 패턴이 형성된 웨이퍼의 칩을 척(Chuck)에 안치된 상태에서 제조가 제대로 이루어졌는지 여부를 테스트공정시에 미세하고 정교한 다수의 니이들(Needle)을 웨이퍼칩의 패턴에 도전시켜 각종의 전기적 특성을 측정하여 웨이퍼의 불량여부를 판정하게 된다.In general, a wafer is formed of a thin thin plate of silicon, and is used as a base material for making a semiconductor device by thinly cutting silicon (Si) after crystallization with high purity. The wafer is typically formed with a myriad of patterns on the upper surface through various semiconductor processes, and it is fine to test whether or not the wafer is manufactured properly with the chip of the wafer on which the pattern is formed on the chuck. A plurality of elaborate needles are conducted to the wafer chip pattern to measure various electrical characteristics to determine whether the wafer is defective.
이와 같이, 상기한 니이들을 갖는 소켓(Socket)은 DUT보드(Device Under Testing Board)에 납땜으로 고정된 상태로 소켓의 접속핀에 도전부위를 연결하게 되고, 이 접속핀을 통하여 원하는 측정이 이루어지게 되는 것이다.In this way, the socket having the needle is connected to the conductive portion of the socket connecting pin in the state fixed by soldering to the DUT board (Device Under Testing Board), through this connecting pin to make a desired measurement Will be.
그런데, 종래에는 측정용 소켓에 형성되는 소켓의 접속핀의 간격이 점차적으로 좁아짐으로 인하여 전기적인 신호가 고속으로 전달될 때 접속핀간에 전기적으로 혹은 물리적인 파형 자체를 변형시키게 되어 신호들의 지연 현상이 발생되는 경우가 있었으며, 각 접속핀의 순간적인 임피던스의 증가로 신호가 장치에 정확하게 전달되지 못하여 테스트하고자 하는 측정치에 정확성을 기여하지 못하는 문제점을 지니고 있었다.However, in the related art, when the interval between the connection pins of the sockets formed in the measuring socket is gradually narrowed, the electrical or physical waveforms are deformed between the connection pins when the electrical signals are transmitted at high speed, thereby causing delays in the signals. In some cases, the instantaneous increase in the impedance of each connection pin prevented the signal from being accurately transmitted to the device, which did not contribute to the accuracy of the measurement.
본 고안은 이러한 점을 감안하여 안출한 것으로서, 소켓의 접속핀이 외주면에 동축케이블을 감싸듯이하여 각각의 접속핀의 동축케이블에 접지판을 외주면에서 접촉하여 전기적인 접지가 이루어지도록 하여 접속핀의 임피던스가 변화하는 것을 방지하여 안정적인 테스트가 이루어지도록 하는 것이 목적이다.The present invention has been devised in view of this point, and the connection pin of the socket wraps around the coaxial cable on the outer circumferential surface of the socket so that the ground plate is brought into contact with the coaxial cable of each connection pin on the outer circumferential surface to make electrical ground. The goal is to prevent impedance changes and ensure stable testing.
도 1은 본 고안에 따른 소켓의 외관 사시 상태를 보인 도면1 is a view showing an appearance perspective state of a socket according to the present invention
도 2는 본 고안에 따른 접속핀에 접지판이 접촉된 상태를 보인 사시 상태도.Figure 2 is a perspective view showing a state in which the ground plate is in contact with the connecting pin according to the present invention.
도 3은 본 고안에 따른 접속핀을 보인 도면.3 is a view showing a connection pin according to the present invention.
도 4는 본 고안에 따른 접속핀이 소켓의 몸체에 설치되고 접지판이 분리된 상태를 보인 도면.Figure 4 is a view showing a state in which the connection pin is installed on the body of the socket and the ground plate is separated according to the present invention.
-도면의 주요부분에 대한 부호의 설명-Explanation of symbols on the main parts of the drawing
10 : 소켓 12 : 몸체10: socket 12: body
14 : 설치홈 20 : 접속핀14: installation groove 20: connection pin
22 : 상측핀부 24 : 하측핀부22: upper pin portion 24: lower pin portion
25 : 동축케이블 30 : 접지판25: coaxial cable 30: ground plate
이러한 목적은 반도체장치를 테스트하기 위한 소켓에서, 이 소켓의 몸체 내측으로 형성된 설치홈에 설치되고, 상,하측으로 각각 돌출된 상,하측핀부를 갖는 접속핀과; 상기 접속핀의 외주면을 감싸듯이 부착되는 동축케이블과; 상기 동축케이블의 외측면에 접촉되면서 다수의 접속핀의 외측으로 설치되는 접지판으로 구성된 접지판을 갖는 반도체장치 테스트용 소켓을 제공함으로써 달성된다.This purpose is to provide a socket for testing a semiconductor device, the connecting pin having an upper and a lower pin portion which is installed in an installation groove formed inside the body of the socket and protrudes upward and downward, respectively; A coaxial cable attached to surround the outer circumferential surface of the connection pin; It is achieved by providing a socket for a semiconductor device test having a ground plate composed of a ground plate installed on the outside of the plurality of connecting pins while being in contact with the outer surface of the coaxial cable.
이하, 첨부한 도면에 의거하여 본 고안의 구성에 대하여 상세히 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail the configuration of the present invention.
우선, 도 1 내지 도 4에 도시된 바와 같이, 본 고안인 접지판을 갖는 반도체장치 테스트용 소켓의 구성을 살펴 보면, 반도체장치를 테스트하기 위한 소켓(10)에서, 상기 소켓(10)의 몸체(12) 내측으로 형성된 설치홈(14)에 설치되고, 상하측으로 각각 돌출된 상,하측핀부(22)(24)를 갖는 접속핀(20)과; 상기 접속핀(20)의 외주면을 감싸듯이 부착되는 동축케이블(25)과; 상기 동축케이블(25)의 외측면에 접촉되면서 다수의 접속핀(20)의 외측으로 설치되는 접지판(30)으로 구성된 것이다.First, as shown in Figures 1 to 4, when looking at the configuration of the socket for a semiconductor device test having a ground plate of the present invention, in the socket 10 for testing a semiconductor device, the body of the socket 10 (12) a connection pin 20 installed in the installation groove 14 formed inwardly and having upper and lower pin portions 22 and 24 protruding upward and downward, respectively; A coaxial cable 25 attached to surround the outer circumferential surface of the connection pin 20; While contacting the outer surface of the coaxial cable 25 is composed of a ground plate 30 installed to the outside of the plurality of connection pins (20).
그리고, 상기 접속핀(20)의 외주면에 감싸듯이 형성되는 설치되는 동축케이블(25)은 각 접속핀(20)마다 형성되어지며, 상측핀부(22)와 하측핀부(24)가 노출되는 상태로 형성되어진다.Then, the coaxial cable 25 is formed to wrap around the outer peripheral surface of the connecting pin 20 is formed for each connecting pin 20, the upper pin portion 22 and the lower pin portion 24 is exposed. Is formed.
그리고, 본 소켓(10)은 SOJ타입의 경우를 보인 것이며, 이외에도 미도시되었지만 TSOP타입의 소켓등에도 동일하게 적용되어진다.In addition, the socket 10 is shown in the case of the SOJ type, but not shown in addition, but also applied to the socket of the TSOP type, and the like.
이와 같이 구성된 본 소켓(10)은 도 3에 도시된 바와 같이, 접속핀(20)의 상측핀부(22)와 하측핀부(24)를 제외한 중심부위에 접지를 위한 동축케이블(25)을 부착하듯이 설치한다.As shown in FIG. 3, the socket 10 configured as described above attaches a coaxial cable 25 for grounding on the center except for the upper pin part 22 and the lower pin part 24 of the connecting pin 20. Install.
그리고, 상기 동축케이블(25)이 감싸듯이 형성된 접속핀(20)을 도 1에 도시된 소켓(10) 몸체(12)의 설치홈(14)내에 삽입하여 설치하도록 한다.Then, the connecting pin 20 is formed so as to surround the coaxial cable 25 to be inserted into the installation groove 14 of the body 12 of the socket 10 shown in FIG.
또한, 상기 동축케이블(25)이 설치된 접속핀(20)의 외주면에는 접지력이 좋은 구리박판과 같은 금속박막을 접속핀(20)의 전체 길이만큼으로 형성시켜 접촉시켜 접속핀(20)으로 전기적인 흐름이 이루어질 때 동축케이블(25)을 통하여 접지판(30)에서 불필요한 전기적인 신호를 접지시키므로 본 소켓(10)을 사용하여 반도체장치의 테스트를 수행하는 경우에는 전기적인 신호가 안정되어진 상태로 측정이 이루어지게 된다.In addition, the outer circumferential surface of the connecting pin 20 provided with the coaxial cable 25 is formed by contacting by forming a metal thin film such as a copper foil having good grounding force by the entire length of the connecting pin 20 to be electrically connected to the connecting pin 20. Unnecessary electrical signals are grounded at the ground plate 30 through the coaxial cable 25 when the flow is made. When the semiconductor device is tested using the socket 10, the electrical signals are measured in a stable state. This is done.
따라서, 상기한 바와 같이 본 고안에 따른 접지판을 갖는 반도체장치 테스트용 소켓을 사용하게 되면, 소켓의 접속핀이 외주면에 동축케이블을 감싸듯이하여 각각 접속핀의 동축케이블에 접지판을 외주면에서 접촉하여 전기적인 접지가 이루어지도록 하여 접속핀의 임피던스가 변화하는 하는 것을 방지하여 안정적인 테스트가 이루어지도록 하는 매우 유용하고 효과적인 고안이다.Therefore, when using a semiconductor device test socket having a ground plate according to the present invention as described above, the contact pin of the socket wraps the coaxial cable on the outer circumferential surface so that the ground plate contacts the coaxial cable of the connecting pin on the outer circumferential surface It is a very useful and effective design to make stable test by preventing the change of the impedance of the connection pin by making the electrical ground.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019980004898U KR200303153Y1 (en) | 1998-03-31 | 1998-03-31 | Socket for semiconductor device test with ground plate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019980004898U KR200303153Y1 (en) | 1998-03-31 | 1998-03-31 | Socket for semiconductor device test with ground plate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR19990038759U KR19990038759U (en) | 1999-10-25 |
| KR200303153Y1 true KR200303153Y1 (en) | 2003-03-17 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019980004898U KR200303153Y1 (en) | 1998-03-31 | 1998-03-31 | Socket for semiconductor device test with ground plate |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR200303153Y1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20110118003A (en) | 2010-04-22 | 2011-10-28 | 삼성전자주식회사 | Semiconductor package and test socket inserted the same |
-
1998
- 1998-03-31 KR KR2019980004898U patent/KR200303153Y1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR19990038759U (en) | 1999-10-25 |
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