KR20030083136A - Nano device utilizing nano hole and method thereof - Google Patents

Abstract

PURPOSE: A nano device using nano holes and a manufacturing method thereof are provided to improve the luminescence efficiency by uniformly distributing nano holes and adjusting the size and density of the nano holes. CONSTITUTION: A metal layer is deposited on an upper surface of a substrate(13). Nano holes(30), each of which has a nano size, are formed by oxidizing the metal layer through anodic oxidation method. A nano frame is formed with a metal oxide in which the nano holes(30) are distributed. An epi-structure of a nano device is formed by growing a material layer within an inner of each nano hole(30). A lower electrode(11) is formed on a lower of the substrate(13). An upper electrode(17) is formed on upper surfaces of the epi-structure and the nano frame.

Description

Nano device utilizing nano hole and method for manufacturing the same

The present invention relates to a nano device and a method for manufacturing the same, and more particularly, to a nano device using a nano hole and a method for manufacturing the same.

Recently, researches are being actively conducted to develop nanoscale nano devices in laser diodes (LDs), photodiodes, transistors, far infrared detectors, solar cells, and optical modulators. The nano-sized nano-devices exhibit superior characteristics compared to the conventional devices because the number of bound electrons varies according to the nano-sizes, and only a few electrons can be driven compared to the conventional electronic devices. For example, in the case of LD, when the nano-size is used, the threshold current is lowered, so that the low voltage can be driven, and the low voltage can easily induce a high output.

In order to take advantage of such an excellent effect of the nano-size quantum well (QW; 1979) structure was used as the active layer of the LD. When the quantum well is used as the active layer of the LD, it is driven by the threshold current significantly lower than the threshold current in the bulk active layer due to the charge confinement effect and the density of state of the quantum structure. It is possible to control the wavelength of the light emitted by appropriately adjusting the thickness of the quantum well structure.

The advantage of the LD of the quantum well structure can be maximized when forming a quantum dot in the active layer. Arakawa and Sakaki predicted that the use of quantum dots as the active layer would greatly improve the critical current, temperature dependence and high temperature operating characteristics of LD. Accordingly, research has been conducted to form high quality uniform quantum dots.

In the early stages of quantum dot formation, electron beam lithography and dry etching were used, but problems such as surface recombination due to the large surface area of nano-sized particles and surface damage occurring in the device fabrication process Due to this, it is difficult to realize improvement of device characteristics. To solve this problem, we developed the quantum dot formation technology using self-assembled phenomenon and the cladding layer formation technology to solve the surface recombination problem. It was.

In the case of nano devices using current quantum dots, a method of artificially growing a lattice mismatch having heterogeneous lattice constants and forming a few nm size quantum dots by stress generated in the lattice mismatch is mainly used.

FIG. 1A is a view illustrating LD in which a quantum dot using a conventional stress is formed.

Referring to FIG. 1A, a conventional LD includes a substrate 1 formed of 6H-SiC (0001), a buffer layer 3 formed of Al _0.24 GaN formed on an upper surface of the substrate 1, and the buffer layer 3. A cladding layer 5 formed of Al _0.12 GaN on the top surface, an active layer 7 formed of In _x Ga _1-x N having a quantum dot formed on the cladding layer 5, and an upper surface of the active layer 7 The cap layer 9 formed of GaN is laminated one by one.

Here, the quantum dot is formed by the stress generated in the lattice mismatch between the substrate 1 and the cladding layer 5 to be stacked on top of the substrate, but the stress induces instability of the crystal structure again, so in the prior art The buffer layer 3 is interposed between the substrate 1 and the cladding layer 5. However, the buffer layer 3 of the flat thin film structure has a limitation in compensating the lattice mismatch, and the stress caused by the lattice mismatch causes lattice defects, thereby degrading the performance of the semiconductor device.

FIG. 1B is a SEM photograph showing quantum dots formed on the active layer 7 of In _0.38 Ga _0.62 N without the GaN cap layer 9 in the LD structure shown in FIG. 1A. As shown, it can be seen that in the structure of the conventional LD using stress, the quantum dots are formed unevenly.

As another example, FIG. 1C shows that the density, size, and spacing of quantum dots formed by SEM photographs showing quantum dots formed on an active layer made of InAs are non-uniform.

The conventional method of forming a quantum dot using stress is not easy to control the density, size, and spacing of the quantum dot, and it is difficult to mass-produce nano devices due to poor reproducibility. In order to solve this problem, in the conventional method of manufacturing a nano device, a material to generate a constant stress must be selected, which adds a limitation to the selection of materials, causing another disadvantage that the nano device cannot be manufactured from various materials. .

In addition, in the conventional nano-device thus formed, there is a disadvantage in that the residual stress latent inside the nano-device causes defects in the crystal structure due to heat generated by driving the nano-device, thereby degrading the reliability of the nano-device.

The present invention is designed to solve the above-mentioned problems of the prior art, it is possible to form a quantum dot without using a stress, it is possible to easily control the size, density, spacing, etc. nano devices that can be mass-produced at low cost It is to provide a manufacturing method and a reliable nano device using the manufacturing method.

Figure 1a is a perspective view briefly showing a conventional semiconductor laser diode,

1B and 1C are SEM images showing quantum dots of a conventional semiconductor laser diode,

2 is a perspective view showing a semiconductor laser diode as a nano device according to an embodiment of the present invention,

3A to 3C are cross-sectional views illustrating a semiconductor laser diode as a nano device according to an embodiment of the present invention;

4 is a cross-sectional view showing an LED as a nano device according to an embodiment of the present invention,

5a to 5h is a process chart showing a method of manufacturing a nano device according to an embodiment of the present invention,

6A and 6B are SEM photographs showing before and after electrolytic polishing in a method of manufacturing nanodevices according to an embodiment of the present invention;

7A and 7B are SEM photographs of a plan view and a cross-sectional view of a nanodevice manufactured according to a nanodevice manufacturing method according to an embodiment of the present invention, respectively.

<Code Description of Main Parts of Drawing>

10; Lower mirror reflecting layers 11, 21; Bottom electrode

12; Lower clad layer 13; Board

14; Active layers 15 and 25; Metal oxide layer

16; Upper clad layers 17, 27; Upper electrode

18; Upper mirror reflecting layer 19; Epistructure

20; Buffer layer 22; p-type (n-type) layer

24; n-type (p-type) layer 30; Nano hole

In order to achieve the above technical problem, the present invention, by depositing a predetermined metal layer on the upper surface of the substrate, and then anodizing to oxidize the metal layer to form a nano-scale nano hole, the nano hole is a metal oxide is distributed Forming a nano-frame; and forming an epi-structure of the nano-device by growing a predetermined material layer inside the nano-hole; And an electrode forming step of forming an upper electrode on the lower electrode and the epi structure and the nano-frame on the lower portion of the substrate.

The nano-frame forming step,

A metal layer deposition step of depositing a predetermined metal layer on an upper surface of the substrate;

A nano hole forming step of performing the anodization to oxidize the metal layer to form the nano hole of a nano size; And

And a barrier layer removing step of removing, using an acid solution, a barrier layer formed of a reaction by-product between the bottom surface of the nano-frame in which the nano-holes are distributed and the surface of the substrate.

In the metal layer deposition step, the metal layer is deposited on the upper surface of the substrate, and then treated with an electrolyte to adjust the surface roughness.

The nanohole forming step,

Performing a first anodization process to oxidize the metal layer to form nanoholes with a predetermined depth;

An oxide etching step of etching and removing oxide of the metal layer forming the nano hole; and

And oxidizing the metal layer again to extend the depth of the nanohole to the surface of the substrate.

After the electrode forming step,

The nano-frame removing step of removing the nano-frame using a predetermined acid solution or an alkali solution reacting with the nano-frame may further include.

After the nanoframe removal step,

The nano-frame replacement step of filling the empty space of the nano-frame with a predetermined material may be further included.

Here, the epi structure may be formed of an LD epi structure composed of a lower mirror surface reflective layer, a lower clad layer, an active layer, an upper clad layer, and an upper mirror surface reflective layer.

When the epi structure is formed of an epi structure of LD consisting of a lower clad layer, an active layer, and an upper clad layer, between the epi structure forming step and the electrode forming step,

The method may further include forming a lower mirror reflecting layer between the substrate and the lower cladding layer, and forming an upper mirror reflecting layer between the upper cladding layer and the upper electrode.

When the epi structure is formed of an active layer, between the epi structure forming step and the electrode forming step,

And forming a lower mirror surface reflecting layer and a lower cladding layer in order between the substrate and the active layer, and forming an upper cladding layer and an upper mirror reflecting layer in order between the active layer and the upper electrode. It is desirable to.

When the substrate is an n-type semiconductor substrate, the epi structure is formed of an LED epi structure in which the n-type semiconductor layer and the p-type semiconductor layer are stacked in order,

When the substrate is a p-type semiconductor substrate, the epi structure may be formed as an LED epi structure in which a p-type semiconductor layer and an n-type semiconductor layer are sequentially stacked.

Preferably, the metal layer may be any one of aluminum, tantalum, zirconium, and hafnium.

In order to achieve the above technical problem, the present invention also provides a substrate; and a nano-frame made of a metal oxide in which a nano-scale nano hole is disposed on the upper surface of the substrate; and a predetermined material layer is arranged inside the nano hole. A predetermined epitaxial structure; and a lower electrode disposed on a bottom surface of the substrate; And an upper electrode positioned on the epi structure and the nano-frame.

Here, the metal oxide may be any one of an oxide of aluminum oxide, tantalum oxide, zirconium oxide, and hafnium.

In order to achieve the above technical problem, the present invention also provides an epitaxial structure in which a predetermined layer of material is formed in a substrate and a nanohole distributed on an upper surface of the substrate; and a lower electrode disposed on a bottom surface of the substrate; And an upper electrode positioned on an upper portion of the epi structure.

Here, the epi structure may be an epi structure of the LED consisting of a lower mirror surface reflective layer, a lower clad layer, an active layer, an upper clad layer, and an upper mirror surface reflective layer.

When the epi structure is an epi structure of LD composed of a lower clad layer, an active layer and an upper clad layer, a lower mirror surface reflecting layer is arranged between the substrate and the epi structure, and an upper mirror between the epi structure and the upper electrode. It is preferable that the surface reflecting layer is arranged.

When the epi structure is an active layer of LD, a lower mirror surface reflecting layer and a lower clad layer are sequentially arranged between the substrate and the epi structure, and an upper clad layer and an upper mirror are disposed between the epi structure and the upper electrode. It is preferable that the surface reflecting layers are arranged in order.

When the substrate is an n-type semiconductor substrate, the epi structure is an epi structure of an LED in which the n-type semiconductor layer and the p-type semiconductor layer are laminated in order,

When the substrate is a p-type semiconductor substrate, the epi structure may be an epi structure of an LED in which a p-type semiconductor layer and an n-type semiconductor layer are sequentially stacked.

Preferably, a buffer layer is further provided between the substrate and the epi structure.

The present invention forms nanometer-scale hollow nano-frames such as Anodic Aluminum Oxide (AAO) on substrates (Si, GaAs, InP) required to fabricate various electronic devices or photovoltaic devices. The present invention relates to a method for fabricating a nanoscale device by growing a structure inside a nanohole by using a selective growth method, followed by metal bonding, and a nanoscale device structure. The present invention has the advantage that it is easy to control the size, density, spacing, etc. of nano-holes and has good reproducibility to mass-produce nanodevices at low cost.

Hereinafter, a nano device and a method of manufacturing the same according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. Here, the thickness and width of each material layer constituting the epi structure shown in each drawing is exaggerated for the purpose of explanation, in all drawings illustrating the present invention reference numerals of the nanohole and the nano-frame is shown in Figure 5f Note that it is used the same as the reference numeral.

2 is a perspective view showing a nano device according to an embodiment of the present invention.

For example, when the nanodevice shown in the drawing is LD, reference numeral 11 is a lower electrode, 13 is a substrate, 20 is a buffer layer, 10 is a lower mirror reflecting layer, 12 is a bottom clad layer, 14 is an active layer, and 15 is a metal oxide. Layer, 16 is an upper clad layer, 18 is an upper mirror reflecting layer, 17 is an upper electrode, and 30 is a nanohole.

Referring to the drawings, the lower electrode 11, the substrate 13, and the buffer layer 20 are stacked in this order, and the metal oxide layer 15 in which the nano holes 30 are regularly distributed on the upper surface of the buffer layer 20. ) Is arranged in a columnar shape to form a nanoframe, and the epi structure of the laser diode is stacked in order in the nanohole 30.

3A is a cross-sectional view of a nano device showing a structure of an LD according to an embodiment of the present invention.

Referring to FIG. 3A, unlike the LD shown in FIG. 2, the lower mirror surface reflecting layer 10 and the upper mirror surface reflecting layer 18 are formed outside the nanohole 30.

That is, as the most basic structure of LD, epi structures of the upper and lower clad layers 12 and 16 surrounding the active layer 14 are formed in the nanohole 30, and the upper clad layer 16 and the upper electrode are formed. The lower mirror surface reflecting layer 18 is arranged between the upper mirror surface reflecting layer 18 and the lower cladding layer 12 and the substrate 13. The lower electrode 11 is positioned on the bottom surface of the substrate 13, and the upper electrode 17 is positioned on the upper surface of the upper mirror surface reflection layer 18, respectively.

Unlike FIG. 2, in FIG. 3A, the nano-frame consisting of the metal oxide layer 15 in which the nano-holes 30 are aligned is removed. In FIG. 3A, the space 15c in which the metal oxide layer 15 was located may be filled with another material (eg, PMMA or polymide) according to the function of the nano device.

In the structure shown in FIG. 3A, in the structure of FIG. 2, 10 may be a second lower clad layer, not a lower mirror reflecting layer, and 18 may be a second upper clad layer, not an upper mirror reflecting layer. That is, the functions of the active layer 12 and the layers 10, 12 and 18 except for the upper and lower clad layers 12 and 16 may vary depending on the epitaxial structure of the desired LD.

3B is a cross-sectional view illustrating an LD according to an embodiment of the present invention in which the upper clad layer 16 is grown on the upper surface of the epi structure instead of the inside of the nano hole 30, unlike the LD shown in FIG. 3A.

Referring to FIG. 3B, the substrate 13 positioned on the upper surface of the lower electrode 11 and the metal oxide layer 15 in which the nano holes 30 are regularly distributed are disposed on the upper surface of the substrate 13, and the nano holes The lower clad layer 12 and the active layer 14 are deposited in order in the inside of the 30, and the upper clad layer 16 is stacked on the upper surfaces of the metal oxide layer 15 and the active layer 14.

The lower mirror surface reflecting layer 10 and the upper mirror surface reflecting layer 18 are arranged between the lower cladding layer 12 and the substrate 13 and between the upper cladding layer 16 and the upper electrode 17. The upper electrode 17 is positioned on the upper surface of the upper mirror surface reflecting layer 18.

3C is a cross-sectional view of an LD in which only the active layer 14 of the nano device is positioned inside the nano hole 30, unlike the LD shown in FIGS. 3A and 3B.

Referring to the drawings, the substrate 13 positioned on the upper surface of the lower electrode 11, the lower mirror surface reflecting layer 10 and the cladding layer 12 are sequentially stacked on the upper surface of the substrate 13. The metal oxide layer 15 in which the nano-holes 30 are arranged at periodic intervals is positioned, and the active layer 14 deposited inside the nano-hole 30 is alternately aligned with the metal oxide layer 15 in order. The upper cladding layer 16 formed on the upper surface of the active layer 14 and the metal oxide layer 15, the upper mirror surface reflecting layer 18 on the upper surface thereof, and the upper electrode 17 on the upper surface thereof are arranged in this order. have.

Hereinafter, a material for forming each layer of LD shown as an example of a nanodevice according to an embodiment of the present invention shown in FIGS. 2 to 3C will be described.

The nano frame 32 made of the metal oxide 15 having the nano hole 30 formed of a metal oxide such as alumina (Al ₂ O ₃ ) formed by oxidizing a metal such as aluminum by anodization. In addition to aluminum, tantalum (Ta), hafnium (Hf), or zirconium (Zr) may be used as the metal.

An n-type compound semiconductor substrate such as GaAs or InP may be used as the substrate 13, and an n-type multilayer thin film of AlGaAs, InGaAsP and InGaAlAs series may be used as the lower mirror reflecting layer 10 on the upper surface thereof. As the upper mirror reflecting layer 18, AlGaAs, InGaAsP, and InGaAlAs series p-type multilayer thin films may be used. An n-type compound such as AlGaAs may be used as the lower clad layer 12, or a P-type compound such as AlGaAs may be used as the upper clad layer 16.

As the active layer 14, an AlGaAs, InGaAsP, or InGaAlAs-based multi quantum well (MQW) active layer may be used. The MQW active layer is used for the purpose of improving the threshold characteristics of semiconductor lasers by the change of the band structure of the crystal due to quantum effects, and utilizes the fact that the current injected into the semiconductor laser is efficiently converted into light of specific energy. . The MQW active layer has been recently used in semiconductor laser diodes because it can lower the oscillation limit compared to the bulk active layer.

For example, in FIG. 2, when the illustrated nanodevice is a mass-type semiconductor laser diode, the substrate 13 may be stacked on the upper surface of the lower electrode 11, and the buffer layer 20 may or may not be stacked. Lower cladding layers 10 and 12 are formed on an upper surface thereof, an active layer 14 and an upper cladding layer 16 are stacked on an upper surface of lower cladding layers 10 and 12, and laser light is concentrated on the upper surface thereof. The light shielding structure 18 may be formed so as to horizontally shield the laser light, and then, after the contact layer is deposited thereon, the upper electrode 17 may be finally formed.

In the structure of LD, electrons and holes injected from the lower electrode 11 and the upper electrode 17 are injected into the active layer 14 as a carrier and emit laser light.

In the LD according to the embodiment of the present invention, since the energy barrier of the metal oxide layer 15 is higher than that of the active layer 14 positioned inside the nanohole 30, the lateral diffusion of carriers is prevented. As a result, the carriers are concentrated in the active layer 14, which results in very high photon efficiency and luminous efficiency and significantly lowers the threshold current.

In particular, the LD using the nano-frame according to the embodiment of the present invention, the nano-hole 30 can be distributed regularly and easy to control the size and density, mass production is easy and the advantage of improving the performance of the device There is this.

4 is a diagram illustrating a case in which a nano device according to an embodiment of the present invention is a light emitting diode (LED).

Referring to FIG. 4, reference numeral 25 is a metal oxide layer having a nanohole 26 formed therein, 21 is a lower electrode, 23 is an n-type (p-type) semiconductor substrate, 22 is an n-type (p-type) semiconductor layer, 24 Represents a p-type (n-type) semiconductor layer, and is stacked in order inside the nano-hole 26 to form an epi structure of the LED.

Similar to the LD described above, the LED according to the embodiment of the present invention has the advantage of lowering the threshold current and increasing photon efficiency and luminous efficiency due to the characteristics derived from the nano-size of the nanohole 30. In addition, the spacing and density of the nano hole 30 can be adjusted uniformly, and various semiconductors can be used, which is advantageous for mass production.

Hereinafter, a method of manufacturing a nano device according to an exemplary embodiment of the present invention will be described with reference to FIGS. 5A to 5H.

First, as shown in FIG. 5A, a metal such as aluminum 15 ′ is deposited on the upper surface of the substrate 13 by 5 to 10 μm. Then, as shown in Figure 5b, the surface roughness (roughness) is adjusted to 3 ~ 5nm or less through the electropolishing process.

6A shows an SEM photograph of electrolytic polishing before the pure aluminum substrate 13, and FIG. 6B is an SEM photograph showing the aluminum substrate 13 whose surface roughness is controlled by performing electropolishing for 1 minute.

Here, electrolytic polishing is using an electrolytic agent composed of perchloric acid and ethanol, and the voltage of about 5 to 30V and a current density of 10 to 100 A / dm ² at room temperature to about 90 degrees. The process is run for seconds to 10 minutes. As shown, it can be seen that the surface roughness of FIG. 6B is improved compared to FIG. 6A. In order to form a uniform nano hole 30, the electropolishing process is performed before performing the anodization process to form the nano hole (30).

Next, a nano hole 30 having a radius of a predetermined size is performed by performing a first anodization step as shown in FIG. 5C, an etching step as shown in FIG. 5D, and a second anodization step as shown in FIG. 5E. ) Fabricates a nano-frame 32 made of metal oxides regularly distributed. Uniform nanoholes 30 may be obtained by performing anodization over a second time, and in particular cases, anodization may be performed only once.

First, as shown in FIG. 5C, when the first anodization is performed, a part of the aluminum layer 15 ′ is changed into alumina (Al ₂ O ₃ ; 15 ″) in contact with the electrolyte and has a predetermined depth. A hole 30 'is formed.

Next, when the alumina 15 ″ generated by primary anodization is removed by performing an etching process as shown in FIG. 5D, only aluminum 15 ′ remains on the top surface of the substrate 13 as shown. .

Next, as shown in FIG. 5E, when the second anodization step is performed again, the aluminum 15 ′ is changed into the alumina 15. In this process, the nanoholes 30 have a depth close to the surface of the substrate 13 and widen. The depth of the nano hole 30 is close to the substrate 13, and in this process, a barrier layer 33 made of by-products formed during anodization is formed between the nano hole 30 and the substrate 13.

When the barrier layer 33 is removed using an acid solution, the nano-frame 32 on which the nano-hole 30 is formed as shown in FIG. 5F is completed.

The nano frame 32 may be removed using a suitable acid or alkaline solution capable of removing metal oxides depending on the structure of the desired nano device. When the CrO ₃ (solid) is reacted at 60 ° C. with a solution of H ₃ PO ₄ mixed in a mass ratio of 1.8: 6, nanoframes can be removed.

When performing the anodization process, the temperature ranges from -30 ° C to room temperature, and a voltage of about 25 to 50V and a current density of 10 to 100 A / dm ² are added. Oxylic acid is used as an electrolytic agent, and the concentration of the electrolyte is adjusted to 0.3-0.5M, and the time is about 1 minute to 48 hours.

7A and 7B show an ESEM image of a nanodot of alumina subjected to anodization in plan view.

FIG. 7A shows that the primary anodization process is 5 hours, the etching process is 3 hours, and the secondary anodization process is performed for 1 hour using the temperature of about 3 ° C., the voltage of about 40V, and the oxyl acid of 0.5M as an electrolyte. In one case, a plan view showing the nano-hole 30 is formed while the metal layer 15 'is oxidized, Figure 7b is a photograph showing the cross-sectional view. In the above-described experiment, the unit cell size d1 is about 90 ± 3 nm, and the radius d2 of the nanohole 30 is about 25 ± 5 nm.

After the nano-holes 30 are regularly aligned, the nano-frames 32 are prepared, and then, as shown in FIG. 5G, chemical vapor deposition (CVD) and LPE (Liquid) are formed inside the nano-holes 30. Phase epitaxy), VPE (Vapor Phase Epitaxy), and MBE (Molecular Beam Epitaxy) are used to grow epitaxial structures of desired nanodevices. Since the nano frame 32 is made of a metal oxide such as alumina, and thus the semiconductor is not deposited, the growth parameters are optimized so that the epitaxial growth of the semiconductor is sequentially performed from the substrate 13 without deposition on the wall of the nano hole 30. can do.

The epitaxial growth structure illustrated in FIG. 5G relates to a semiconductor LD, and includes a lower mirror reflecting layer 10, a lower clad layer 12, and an active layer 14 in a nanohole 30 positioned on an upper surface of a substrate 13. The process of growing the upper cladding layer 16 and the upper mirror surface reflecting layer 18 in order is shown.

When the upper electrode 17 and the lower electrode 11 are respectively formed on the upper and lower portions of the epi structure and the nano-frame 32 shown in Figure 5g, LD is completed as shown in Figure 5h. The epitaxial growth shown in FIGS. 5G and 5H is only an embodiment and a nano device having a desired structure may be freely grown inside the nanohole 30.

Nano device using the nano-frame according to an embodiment of the present invention and a method for manufacturing the same, can be mass-produced in a low-cost mass production of various electronic devices or optoelectronic devices of nano-sized without constraints on the semiconductor material, it is possible to form a variety of structures There is an advantage.

In addition, since a device using a uniformly distributed quantum dot can be manufactured, a semiconductor laser has a low threshold current and a high luminous efficiency due to a change in the density of state due to the low dimensional bond structure. The device is easy to manufacture and is particularly suitable for manufacturing surface emitting semiconductor lasers.

In addition, the present invention can control the size of the nano hole, so that the device having a variety of band gaps can be easily changed the oscillation wavelength. Due to the increase in quantum efficiency in LED manufacturing, it is possible to manufacture a device having very high luminous efficiency.

While many details are set forth in the foregoing description, they should be construed as illustrative of preferred embodiments, rather than to limit the scope of the invention. Therefore, the scope of the present invention should not be defined by the described embodiments, but should be determined by the technical spirit described in the claims.

As described above, an advantage of the nano-device using the nano-frame according to the present invention is that the light emitting device can be driven with a low threshold current due to the change in the state function density due to the low dimensional bond structure and can exhibit high luminous efficiency. Is there.

In addition, an advantage of the method of manufacturing a nano device using a nano-frame according to the present invention is that the formation of nano holes to have a quantum dot of uniform size and the control of the size of the nano hole is possible to manufacture a device having a variety of band gaps It is possible to change the wavelength easily.

Claims (25)

Depositing a predetermined metal layer on an upper surface of the substrate, and performing anodization to oxidize the metal layer to form nanoscale nanoholes, and forming nanoscales of metal oxides in which the nanoholes are distributed; Forming an epi structure of the nano device by growing a predetermined material layer inside the nano hole; And And an electrode forming step of forming an upper electrode on the lower electrode and the epi structure and the nano-frame on the lower portion of the substrate. The method of claim 1, wherein the nano-frame forming step, A metal layer deposition step of depositing a predetermined metal layer on an upper surface of the substrate; A nano hole forming step of performing the anodization to oxidize the metal layer to form the nano hole of a nano size; And And a barrier layer removing step of removing, using an acid solution, a barrier layer formed of reaction by-products between the bottom surface of the nano-holes in which the nano-holes are distributed and the surface of the substrate. According to claim 2, In the metal layer deposition step, And depositing the metal layer on the upper surface of the substrate, and then treating the metal layer with an electrolyte to adjust surface roughness. The method of claim 2, wherein the nanohole forming step, Performing a first anodization process to oxidize the metal layer to form nanoholes with a predetermined depth; An oxide etching step of etching and removing oxide of the metal layer forming the nano hole; And And oxidizing the metal layer again to extend the depth of the nanoholes to the surface of the substrate. According to claim 1, After the electrode forming step, And a nano-frame removing step of removing the nano-frame using a predetermined acid solution or alkaline solution reacting with the nano-frame. According to claim 5, After the nano-frame removal step, The nano-device manufacturing method comprising the step of replacing the nano-frame filling the empty space of the nano-frame with a predetermined material. The method of claim 1, The epi-structure is a nano-device manufacturing method characterized in that formed in the epi structure of the LD consisting of a lower mirror surface reflective layer, a lower clad layer, an active layer, an upper clad layer and an upper mirror surface reflective layer. The method of claim 1, The epi-structure is a nano device manufacturing method, characterized in that formed by the epi structure of the LD consisting of a lower clad layer, an active layer, and an upper clad layer. The method of claim 8, wherein between the epi structure forming step and the electrode forming step, Forming a lower mirror surface reflecting layer between the substrate and the lower cladding layer, and forming a mirror surface reflecting layer between the upper cladding layer and the upper electrode further comprises a nano-device manufacturing step Way. The method of claim 1, The nano-device manufacturing method characterized in that to form the epi structure as an active layer. The method of claim 10, wherein between the epi structure forming step and the electrode forming step, And forming a lower mirror surface reflecting layer and a lower cladding layer in order between the substrate and the active layer, and forming an upper cladding layer and an upper mirror reflecting layer in order between the active layer and the upper electrode. Nano device manufacturing method characterized in that. The method of claim 1, If the substrate is an n-type semiconductor substrate, the epi-structure is a nano-device manufacturing method, characterized in that to form an LED epi structure in which the n-type semiconductor layer and the p-type semiconductor layer are laminated in order. The method of claim 1, If the substrate is a p-type semiconductor substrate, the epi-structure is a nano device manufacturing method, characterized in that to form a p-type semiconductor layer and the LED epi-structure stacked n-type semiconductor layer in order. The method of claim 1, The predetermined metal layer is a nano device manufacturing method, characterized in that any one of aluminum, tantalum, zirconium and hafnium. Board; Located in the upper surface of the substrate, the nano-frame made of a metal oxide in which nano-scale nano hole is distributed; A predetermined epi structure in which a predetermined material layer is arranged in the nano hole; A lower electrode on a bottom surface of the substrate; And And an upper electrode disposed above the epitaxial structure and the nano-frame. The method of claim 15, The metal oxide is any one of aluminum oxide, tantalum oxide, zirconium oxide and hafnium oxide nano device. Board; An epi structure in which a predetermined material layer is formed, which is formed in the nano hole distributed on the upper surface of the substrate; A lower electrode on a bottom surface of the substrate; And And an upper electrode disposed above the epitaxial structure. The method according to claim 15 or 17, The epi structure is a nano device, characterized in that the epi structure of the LED consisting of a lower mirror surface reflective layer, a lower clad layer, an active layer, an upper clad layer, and an upper mirror surface reflective layer. The method according to claim 15 or 17, The epi structure is a nano device, characterized in that the epi structure of the LD consisting of a lower clad layer, an active layer and an upper clad layer. The method of claim 19, And a lower mirror surface reflecting layer is arranged between the substrate and the epi structure, and an upper mirror surface reflecting layer is arranged between the epi structure and the upper electrode. The method according to claim 15 or 17, The epi structure is nano device, characterized in that the active layer of LD. The method of claim 21, A lower mirror surface reflective layer and a lower cladding layer are sequentially arranged between the substrate and the epi structure, and an upper clad layer and an upper mirror surface reflective layer are arranged in sequence between the epi structure and the upper electrode. Nano device. The method according to claim 15 or 17, When the substrate is an n-type semiconductor substrate, the epi structure is an nano device, characterized in that the epi structure of the LED in which the n-type semiconductor layer and the p-type semiconductor layer is laminated in order. The method according to claim 15 or 17, If the substrate is a p-type semiconductor substrate, the epi structure is a nano-device, characterized in that the epi structure of the LED in which the p-type semiconductor layer and the n-type semiconductor layer is sequentially stacked. The method according to claim 15 or 17, Nanodevice, characterized in that the buffer layer is further provided between the substrate and the epi structure.