KR20030075921A - Liquid crystal display with a passivation layer of a multi-through hole - Google Patents

Abstract

PURPOSE:A liquid crystal display having a porous passivation film is provided to remove spots of an organic insulating film generated by topology of a passivation film in embossing the organic insulating film, thereby improving the yield of a liquid crystal panel. CONSTITUTION:A plurality of pixel parts are formed on a transparent substrate. Gate pad parts are extended from one ends of gate lines connected with the pixel parts. Data pad parts are extended from one ends of data lines connected with the pixel parts. A plurality of switching elements are formed of gate electrodes, source and drain electrodes electrically connected with the gate electrodes. A first passivation film(534) covers the switching elements and has a plurality of via holes(534a-534j), to expose the drain electrodes. A first organic insulating film(536) covers the first passivation film and has a plurality of via holes to expose the drain electrodes. The top of the first organic insulating film is embossed. Pixel electrodes are formed on the first organic insulating film corresponding to the drain electrodes and are electrically connected with the drain electrodes through the plurality of via holes.

Description

Liquid crystal display device having a porous passivation film {LIQUID CRYSTAL DISPLAY WITH A PASSIVATION LAYER OF A MULTI-THROUGH HOLE}

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having a porous passivation film for reducing the occurrence of unevenness of the organic insulating film in a reflective or reflective transparent liquid crystal display device.

In general, a liquid crystal display device includes a projection type liquid crystal display device that displays an image using an external light source, a reflection type liquid crystal display device using natural light instead of an external light source, and a reflection in which the projection type liquid crystal display device and the reflective liquid crystal display device are combined. It may be divided into a transmissive liquid crystal display.

1 is a view for explaining a general reflective liquid crystal display device.

Referring to FIG. 1, a general reflective liquid crystal display device includes a first substrate 110 on which pixels are formed, a second substrate 120 and a first substrate 110 disposed to face the first substrate 110. The liquid crystal layer 130 is formed between the second substrate 120 and the reflective electrode 135 is a pixel electrode formed between the first substrate 110 and the liquid crystal layer 130.

The first substrate 110 includes a first insulating substrate 140 and a thin film transistor (TFT) 145 which is a switching element formed on the first insulating substrate 140. The thin film transistor 145 includes a gate electrode 150, a gate insulating layer 155, a semiconductor layer 160, an ohmic contact layer 165, a source electrode 170, and a drain electrode 175.

A passivation film 177 is formed on the first insulating substrate 140 on which the thin film transistor 145 is formed, and an organic insulating film 180 made of a material such as a resist is stacked on the organic insulating film 180. A contact hole 185 exposing a portion of the drain electrode 175 of the thin film transistor 145 is formed. The contact hole 185 formed at this time is for blocking electrical connection between adjacent thin film transistors.

The reflective electrode 135 is formed on the contact hole 185 and the organic insulating layer 180. The reflective electrode 135 is connected to the drain electrode 175 through the contact hole 185, so that the thin film transistor 145 and the reflective electrode 135 are electrically connected to each other.

A first orientation film 200 is stacked on the reflective electrode 135.

The first substrate 120 facing the first substrate 110 may include a second insulating substrate 205, a color filter 210, a common electrode 215, a second alignment layer 220, a retardation plate 225, and a polarizing plate. 230.

The second insulating substrate 205 is made of the same material as the first insulating substrate 140 is made of glass or ceramic, the retardation plate 225 and the polarizing plate 230 are sequentially on the second insulating substrate 205 Is formed. The color filter 210 is disposed under the second insulating substrate 205, and the common electrode 215 and the second alignment layer 220 are sequentially formed under the color filter 210 to form the second substrate 120. Configure. The second alignment layer 220 performs a function of pretilting the liquid crystal molecules of the liquid crystal layer 130 together with the first alignment layer 200 of the first substrate 110 at a predetermined angle.

Spacers 235 and 236 are interposed between the first substrate 110 and the second substrate 120 to form a predetermined space between the first substrate 110 and the second substrate 120. The liquid crystal layer 130 is formed in the space between the first substrate 110 and the second substrate 120.

2 is a diagram for describing a general reflective / transmissive liquid crystal display device.

Referring to FIG. 2, in a typical reflective / transmissive liquid crystal display, a thin film transistor 320 is performed on a top surface of a first substrate 340 by a thin film transistor manufacturing process. Reference numeral 322 denotes a gate electrode, 328b a source electrode, 328a a drain electrode, and 324,326 an active pattern, and 323 a gate insulating film.

Thereafter, a passivation film 329 is formed on the top surface of the thin film transistor 320 and the gate insulating film 323, and a transparent and thick acrylic organic insulating film 330 is coated to a predetermined thickness. In this case, an irregular concave-convex pattern is formed on the top surface of the organic insulating film 330 to scatter light to improve luminance, and the organic insulating film 330 and the passivation film 329 have a drain electrode 328a of the thin film transistor 320. A contact hole is formed that exposes a portion. The contact hole formed at this time is for blocking electrical connection between adjacent thin film transistors.

Subsequently, transmissive / reflective electrodes 340 and 360 necessary to control the liquid crystal are formed on the upper surface of the acrylic organic insulating layer 330. In this case, the transmission / reflection electrodes 340 and 360 include a transmission electrode 340 that transmits light and a reflection electrode 360 that reflects light, and a portion of the reflection electrode 360 is opened through the opening 365. Allow light to pass through. Here, the ITO or IZO material is used as the transmission electrode 340 of the reflection / transmission electrodes 340 and 360, and aluminum or aluminum-neodymium alloy having excellent reflectance is mainly used as the reflection electrode 360.

Subsequently, the second substrate 390 on which the common electrode 380 is formed is positioned on the upper surface of the first substrate 340, and the liquid crystal 370 is injected therebetween to form a reflective / transmissive liquid crystal display device.

As such, in the manufacturing process of the reflective or reflective / transmissive liquid crystal display device, the process of forming irregularities in the organic insulating layer in a specific form in order to improve the characteristics of the reflective region is the most important process having a direct relationship with the image quality characteristics.

However, the organic insulating film is a material having the same characteristics as the photoresist PR and is greatly affected by the pattern shape according to the exposure degree of the exposure machine. Even as shown in Figs. 3 and 4, there is a problem that spots of unwanted shape are generated in the organic insulating film due to the topology of the lower film, especially the passivation film.

3 and 4 are views for explaining the openings of a general passivation film, in particular, Figure 3 is a view for explaining the opening of the passivation film when the lower film is a single film, Figure 4 is a view illustrating the opening of the passivation film when the lower film is a double film It is for the drawing.

As shown in the drawing, when the passivation films 414 and 424 are largely opened into one, there is a problem in that a stain range of the organic insulating film applied to the periphery of the passivation films 414 and 424 is large. As such, the areas where the staining of the organic insulating layer is severely generated may have a problem that the spots are severely formed at the portions where the stepped portion of the lower layer is largely formed and the portions where the size of the lower layer pattern is large.

Accordingly, the present invention has been made in an effort to solve such a problem, and an object of the present invention is to remove spots during an embossing process of an organic insulating layer which must be applied to improve reflectance in reflective and semi-transmissive liquid crystal display devices. To provide a liquid crystal display device having a porous passivation film for improving the yield of a liquid crystal panel.

1 is a view for explaining a general reflective liquid crystal display device.

2 is a diagram for describing a general reflective / transmissive liquid crystal display device.

3 is a view for explaining the opening of the passivation film when the lower film is a single film.

4 is a view for explaining an opening of a passivation film when the lower film is a double film.

5 and a view for explaining the opening of the porous passivation film for improving the staining of the organic insulating film according to an embodiment of the present invention.

6 is a view for explaining an opening of a porous passivation film for improving the staining of the organic insulating film according to another embodiment of the present invention.

7 is a view for explaining an opening of a porous passivation film for improving the staining of the organic insulating film according to another embodiment of the present invention.

8 is a plan view illustrating an array substrate according to the present invention.

9A to 9G are cross-sectional views illustrating one example of a manufacturing process of an array substrate for a liquid crystal display device according to the present invention.

According to an aspect of the present invention, a liquid crystal display device having a porous passivation film includes a plurality of pixel parts formed on a transparent substrate and one end of a gate line connected to the pixel parts. A gate pad portion formed on the transparent substrate and a data pad portion formed on the transparent substrate extending from one end of a data line connected to the pixel portion,

The pixel portion,

A switching element comprising a gate electrode, a source electrode and a drain electrode electrically connected to the gate electrode; A first passivation layer covering the switching element and having a plurality of via holes to expose the drain electrode; A first organic insulating layer covering the first passivation layer and having a plurality of via holes to expose the drain electrode; And a pixel electrode formed on the first organic insulating layer corresponding to the drain electrode and electrically contacting the drain electrode through the plurality of via holes.

According to the liquid crystal display device having such a porous passivation film, the occurrence of unevenness of the organic insulating film due to the topology of the lower film, particularly the passivation film, which is located below the organic insulating film, can reduce the occurrence of unevenness in the portion where the actual image is displayed. Can be.

Hereinafter, with reference to the accompanying drawings, it will be described in detail the present invention.

5 is a view for explaining the opening of the porous passivation film for improving the staining of the organic insulating film according to an embodiment of the present invention, in particular the view for explaining the opening of the passivation film when the lower film is a single film.

Referring to FIG. 5, the passivation film 514 applied over the lower film 512 having a predetermined area has a plurality of via holes 514a, 514b, and 514c, and has the same area as the lower film 512 thereon. The upper electrode 516, such as ITO, is stacked. The via holes 514a, 514b, and 514c formed at this time are opened to expose the lower layer 512.

According to one embodiment of the present invention described above, since the lower film is a single film and a plurality of small sizes are opened when the passivation film is opened, the range of the stain is remarkably small, thereby preventing the occurrence of spots on the portion where the actual image is displayed. have.

6 is a view for explaining the opening of the porous passivation film for improving the staining of the organic insulating film according to another embodiment of the present invention, particularly when the lower film is a double film to explain the opening of the passivation film.

Referring to FIG. 6, the passivation film 524 applied on the lower layer 522 having a predetermined area has a plurality of via holes. In this case, the via hole is formed so that a portion of the applied passivation layer lower layer 522 is exposed, and is formed in the periphery of the lower layer 522 while being in contact with a portion of the lower layer 522. A portion of the formed via hole and the passivation layer is formed. It is laminated by an upper electrode 526 such as ITO.

For example, the first and second via holes 524a formed at the periphery of the lower layer 522 may have a lower layer 522 having a passivation layer 524 and a surface partially opened by the passivation layer 524. It is formed in the liver.

According to another embodiment of the present invention described above, when the lower layer is a double metal, the passivation opening is formed over the lower layer boundary in consideration of the opening of the passivation layer and the step coverage of the lower double metal layer.

However, when the porous passivation opening is applied as described above, the contact resistance may increase as the contact area with the lower layer decreases. With this in mind, an example of preventing the increase in contact resistance by changing the pattern of the lower double metal is proposed.

FIG. 7 is a view for explaining an opening of a porous passivation film for improving staining of an organic insulating film according to another embodiment of the present invention. In particular, FIG. 7 illustrates a layout of a pad for reducing contact resistance, particularly when the lower film is a double metal. .

Referring to FIG. 7, the lower layer 532 has a predetermined opening therein, and a region having no opening has a pattern to be connected. As such, the lower layer 532 having a predetermined opening therein is intended to increase the contact area with the upper electrode. The passivation film 534 is coated on the lower film 532 having a predetermined opening, and a plurality of via holes are formed to expose a portion of the lower film 532 of the applied passivation film 534.

Next, the plurality of via holes exposing the lower film will be described using the respective cut surfaces I-I ', II-II', and III-III 'as an example.

As shown in the cut-away view II ′, the first and second via holes 534a and 534b are formed between the passivation film 534 and the lower film 532 partially opened by the passivation film 534. The third and fourth via holes 532a and 532b are formed on the lower film 532 having a surface opened by the passivation film 534.

In addition, as shown in the cutaway view II-II ', the fifth via hole 534c is formed between the passivation film 534 and the lower film 532 partially opened by the passivation film 534, and the sixth via hole 534c. The via hole 534d is formed in the lower layer 532, which is partially opened by the passivation film 534 and the passivation film 534, and the seventh via hole 534e is partially opened by the passivation film 534. The eighth via hole 534f is formed between the lower film 532 and the passivation film 534, which are partially opened by the passivation film 534.

In addition, as shown in the cutaway view III-III ', the ninth via hole 534g is formed between the passivation film 534 and the lower film 532, which is partially opened by the passivation film 534, and the tenth throughhole. And the eleventh via holes 534h and 534i are formed between the passivation films 534, and the twelfth via holes 534j include the lower film 532 and the passivation film 534 partially opened by the passivation film 534. Is formed in between.

As such, the formed via holes are formed in the periphery of the lower layer 532 while contacting a portion of the lower layer 532. A portion of the formed via hole and the passivation film 534 are stacked by an upper electrode 536 such as ITO.

According to another exemplary embodiment of the present invention described above, an increase in contact resistance can be prevented by changing the pattern of the lower double metal to enlarge the contact area between the opening of the passivation layer and the pixel electrode.

In the above, various embodiments for improving the staining of the organic insulating layer by forming the passivation layer in contact with the lower layer in a porous form have been described. In particular, the pad in contact with the lower layer has been described as an example. Next, a description will be given with reference to the accompanying drawings a manufacturing process of not only a gate pad and a data pad in contact with a lower film, but also a liquid crystal display device having the aforementioned porous passivation film of a TFT element, in particular an array substrate on which the TFT element is arranged.

8 is a plan view illustrating an array substrate according to the present invention, and FIGS. 9A to 9G are cross-sectional views showing one embodiment of a manufacturing process of an array substrate for a liquid crystal display device according to the present invention. In particular, FIG. The manufacturing process of a gate pad, a thin film transistor, and a data pad is shown.

Referring to FIG. 8, the array substrate according to the present invention includes a gate pad part including a plurality of gate pads 600 on the same plane of the transparent substrate 590, and a gate line 610 on the gate pad part 600. The pixel portion 700 includes a plurality of TFT elements connected to each other to form one pixel, and a data pad portion 800 connected to the pixel portion 700 through a data line 810. The array substrate thus manufactured incorporates liquid crystal and is integrated with a color filter engine to display image signals provided from various graphic controllers.

Here, each of the gate pads constituting the gate pad part 600 or each data pad constituting the data pad part 800 is connected to the lower layer through a porous contact hole and the pixel part 700. The drain electrode of the TFT element formed in the is also connected to the lower layer through the porous contact hole. A method of manufacturing such a porous contact hole will be described in more detail with reference to FIGS. 9A to 9G below.

8 and 9A, a thin film transistor is formed as a switching element on a substrate 590 made of a non-conductive material such as glass or ceramic.

In more detail, a metal such as aluminum (Al), molybdenum (Mo), chromium (Cr), tantalum (Ta), titanium (Ti), copper (Cu), or tungsten (W) may be deposited on the substrate 590. Metal layers 611 and 711 are formed. The substrate 590 includes a pixel portion 700 for forming a thin film transistor to display an image, a gate pad portion 600 and a pixel formed in a peripheral region of the pixel portion 700 and connected to a gate side TCP (not shown). And a data pad portion 800 formed in the peripheral area of the portion 700 and connected to the data side TCP (not shown).

The metal layers 611 and 711 are arranged at predetermined intervals along the width direction of the substrate 590 in the pixel portion 700 where the pixels for patterning the images are formed by patterning the metal layers 611 and 711 by a conventional photolithography process. A gate electrode 711 branched from the gate line 610 and the gate line 610 is formed. At the same time, in order to apply an electrical signal to the pixel portion 700, the gate pad portion 600 formed in the peripheral area of the pixel portion 700 extends from the gate line 610 to form the gate pad 611. In this case, the gate pad 611 is preferably formed to have a larger area than the gate electrode 711 and the gate line 610.

In addition, the gate electrode 711, the gate pad 611 and the gate line 610 are each made of an alloy of aluminum-copper (Al-Cu) or an alloy such as aluminum-silicon-copper (Al-Si-Cu). It may be formed.

Subsequently, as illustrated in FIG. 9B, silicon nitride (SixNy) is stacked on the entire surface of the substrate 590 on which the gate pad 611, the gate electrode 711, and the gate line 610 are formed by a plasma chemical vapor deposition method. The insulating films 613, 713, and 813 are formed.

Subsequently, as shown in FIG. 9C, an amorphous silicon film and an n ⁺ amorphous silicon film doped in-situ are sequentially stacked on the gate insulating film 713 by a plasma chemical vapor deposition method. Subsequently, the stacked amorphous silicon film and the n ⁺ amorphous silicon film are patterned to form a semiconductor layer 715 and an ohmic contact layer 716 on an upper portion of the gate insulating film 713 where the gate electrode 711 is located. . At this time, the amorphous silicon film may be irradiated with a laser having a predetermined intensity to convert the semiconductor layer 715 into a polysilicon layer.

Subsequently, a metal layer made of metal such as aluminum, molybdenum, tantalum, titanium, chromium, tungsten, or copper is deposited on the substrate 590 on which the resultant is formed, and then the stacked metal layer is patterned to form a gate line 610. The orthogonal data line 810, the source electrode 717 and the drain electrode 719 branching from the data line 810 are formed. In addition, a data pad 819 is formed at one end of the data line 810. In this case, the data pad 819 is preferably formed to have a larger area than the data line 810.

Accordingly, a thin film transistor including a gate electrode 711, a semiconductor layer 715, an ohmic contact layer 716, a source electrode 717, and a drain electrode 719 is formed in the pixel portion 700 of the substrate 590. Is completed. In addition, a gate pad 611 and a data pad 819 are formed in the gate pad 600 and the data pad 800, respectively. In this case, gate insulating layers 613, 713, and 813 are interposed between the data line 810 and the gate line 610 to prevent an electrical short circuit between the data line 810 and the gate line 610.

Subsequently, as illustrated in FIG. 9D, the first to third passivation films 621, 721, and 821 are coated on the entire surface of the gate pad part 600, the pixel part 700, and the data pad part 800. . Of course, the first to third passivation films 621, 721, and 821 may be coated with the same material at the same time, but in the description of the present invention, the gate pad part 600, the pixel part 700, and the data pad part 800 are described. It is applied to different areas of the to give a separate reference numeral.

Subsequently, as shown in FIG. 9E, a plurality of via holes 623a, 623b, and 623c are formed in the upper portion of the gate pad 611, and the plurality of via holes 623a, 623b and 623c are formed in the upper portion of the pixel portion 700, preferably in the upper portion of the drain electrode. Four via holes 723a and 723b, and a plurality of via holes 823a, 823b and 823c are formed on the data pad 800. In particular, the via holes 623a, 623b, and 623c formed in the gate pad part 600 further perform an etching process to expose the gate insulating layer 613 stacked on the gate pad 611.

Subsequently, as shown in FIG. 9F, a photosensitive organic resist is coated on the entire surface of the pixel portion 700, the gate pad 600, and the data pad 800 of the substrate 590 by spin coating. First to third passivation layers 624, 724, and 824 are formed. Here, it is preferable that the first to third passivation layers 624, 724, and 824 are made of an organic insulating material formed of bisbenzocyclobutene (BCB), perfluorocyclobutene (PFCB), or the like. .

Subsequently, a mask for exposing the gate pad 611, the drain electrode of the pixel portion 700, and the data pad 821 is positioned on the first to third passivation layers 624, 724, and 824, and then a predetermined mask is exposed. The full exposure process is performed at the exposure amount, and the first to third protective films 624, 724, and 824 are partially removed through the development process.

Through this process, a portion of the gate pad 611 is exposed to the plurality of via holes 625a, 625b, and 625c, and a part of the drain electrode of the thin film transistor provided in the pixel part 700 includes a plurality of via holes 725a, 725b), and a portion of the data pad 821 is exposed to a plurality of via holes 825a, 825b, 825c.

Subsequently, as illustrated in FIG. 9G, a pixel electrode 730 is formed on the second passivation film 724 to receive an image signal from the thin film transistor and generate an electric field together with the electrodes of the upper plate (that is, the color filter). The pixel electrode 730 is made of a metal material such as aluminum and a transparent conductive material such as ITO or IZO. The pixel electrode 730 is physically and electrically connected to the drain electrode 719 through a plurality of contact holes 730a and 730b to provide an image signal. I receive it.

Meanwhile, a first conductive layer 630 is formed on the first passivation layer 624 corresponding to the gate pad 611 and the gate pad 611 exposed through the plurality of via holes 625a, 625b, and 625c. The first conductive layer 630 forms a plurality of contact holes 630a, 630b, and 630c. In addition, a second conductive layer 830 is formed on the data pad 251 exposed through the third passivation layer 824 and the plurality of via holes 823a, 823b, and 823c corresponding to the data pad 821. The second conductive layer 830 forms a plurality of contact holes 830a, 830b, and 830c.

Here, the first and second conductive layers 630 and 830 are made of a metal material such as aluminum and a transparent conductive material such as ITO or IZO. In this case, the first and second conductive layers 630 and 830 may include gates and data exposed by the first and third passivation layers 624 and 824 and the plurality of via holes 630a, 630b, 630c, 830a, 830b, and 830c. It is evenly applied on the pads 611 and 821.

Of course, although not shown in FIGS. 9A to 9G, the upper part of the second passivation layer 724 coated on the upper part of the pixel part is embossed on the upper part of the pixel part to improve reflection characteristics, Or a pixel electrode), and the formed reflective electrode may be connected to the drain electrode through a predetermined contact hole, thereby implementing a reflective liquid crystal display.

In addition, after the embossing process is performed on the upper portion of the second passivation layer 724 coated on the upper portion of the pixel portion to improve the reflection characteristic, a reflective electrode (or a pixel electrode) is formed on a part of the embossed surface, and the formed reflective electrode The reflective transmissive liquid crystal display device may be realized by connecting to the drain electrode through a predetermined contact hole.

In addition, in the embodiment of the present invention, an example in which the passivation film and the organic insulating film applied on the passivation film are identically opened with a plurality of via holes is described. However, the opening of the passivation film is increased, and the organic insulating film applied on the passivation film is enlarged. The opening of may be divided into small openings.

Although described above with reference to the embodiments, those skilled in the art can be variously modified and changed within the scope of the present invention without departing from the spirit and scope of the invention described in the claims below. I can understand.

As described above, according to the present invention, in order to improve the characteristics of the reflective region during the manufacturing process of the reflective or reflective / transmissive liquid crystal display device, unevenness of the organic insulating film during embossing of the organic insulating film having irregularities formed in a specific shape By removing, the yield of the liquid crystal panel can be improved. That is, since there is a linear correlation between the stain of the organic film and the contact size, the stain area of the organic film can be reduced by reducing the size of the contact.

Claims (5)

A plurality of pixel portions formed on the transparent substrate, a gate pad portion formed on the transparent substrate by extending from one end of a gate line connected to the pixel portion, and extending from one end of a data line connected to the pixel portion, the transparent It comprises a data pad portion formed on the substrate, The pixel portion, A switching element comprising a gate electrode, a source electrode and a drain electrode electrically connected to the gate electrode; A first passivation layer covering the switching element and having a plurality of via holes to expose the drain electrode; A first organic insulating layer covering the first passivation layer and having a plurality of via holes to expose the drain electrode; And And a porous passivation layer formed on the first organic insulating layer corresponding to the drain electrode, the pixel electrode being in electrical contact with the drain electrode through the plurality of via holes. The liquid crystal display of claim 1, wherein an upper portion of the first organic insulating layer is embossed, and the pixel electrode is stacked over the entire upper portion of the embossed first organic insulating layer. The liquid crystal display of claim 1, wherein an upper portion of the first organic insulating layer is embossed, and the pixel electrode is disposed on a portion of the upper portion of the first organic insulating layer that is embossed. The method of claim 1, wherein the gate pad unit, A first pad metal layer formed on the substrate and extending from one end of a gate line connected to the pixel portion, the first pad metal layer having a pad region; A gate insulating layer covering the first pad metal layer; A second passivation film covering the gate insulating film and having a plurality of via holes to expose the gate insulating film; A second organic insulating film covering the second passivation film and having a plurality of via holes to expose the gate insulating film; And And a first conductive layer formed on the second organic insulating layer corresponding to the pad region and electrically contacting the first pad metal layer through the plurality of via holes. Device. The method of claim 1, wherein the data pad unit, A data insulating film formed on the substrate; A second pad metal film extending from one end of the data line connected to the pixel portion and formed on the data insulating film, the second pad metal film having a pad region; A third passivation film covering the second pad metal film and having a plurality of via holes to expose the second pad metal film; A third organic insulating layer covering the third passivation layer and having a plurality of via holes to expose the second pad metal layer; And And a second conductive layer formed on the third organic insulating layer corresponding to the pad region, the second conductive layer being in electrical contact with the second pad metal layer through the plurality of via holes. Device.