KR20030068826A - Method of making a semiconductor device having fuses for repair - Google Patents
Method of making a semiconductor device having fuses for repair Download PDFInfo
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- KR20030068826A KR20030068826A KR1020020008471A KR20020008471A KR20030068826A KR 20030068826 A KR20030068826 A KR 20030068826A KR 1020020008471 A KR1020020008471 A KR 1020020008471A KR 20020008471 A KR20020008471 A KR 20020008471A KR 20030068826 A KR20030068826 A KR 20030068826A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
- H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/22—Connection or disconnection of sub-entities or redundant parts of a device in response to a measurement
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
본 발명은 리페어용 퓨즈를 갖는 반도체 소자 제조 방법에 관한 것으로, 보다 상세하게는, 레이저에 의한 퓨즈 리페어 실시 후 신뢰성 테스트에서의 수분반응을 예방하기 위한 리페어용 퓨즈를 갖는 반도체 소자 제조 방법에 관한 것이다.The present invention relates to a method for manufacturing a semiconductor device having a repair fuse, and more particularly, to a method for manufacturing a semiconductor device having a repair fuse for preventing a water reaction in a reliability test after performing a fuse repair by a laser. .
오늘날 집적회로 산업에서는 각 다이(Die)당 수백 메가비트의 저장능력을 갖는 메모리들이 제작되고 있다. 이러한 밀도를 갖는 집적회로를 제조할 때, 각 다이에 있는 수백만개의 셀(Cell)들 하나 하나가 완벽한 수율을 갖도록 형성하는 것은 불가능하다. 그러므로, 작동이 어렵거나 흠이 있는 셀들이 어레이(Array)로부터 제거되도록 하는 레이저 수리기술과 같은 퓨즈(Fuse) 기술이 사용된다. 이때 리던던트(Redundant) 동작가능한 대체 셀들은 새로이 제거된 작동 불가능한 셀에 대신하여 상기 어레이에 결합될 수 있다. 이러한 메모리 셀 퓨즈들은 일반적으로 도전성 폴리실리콘 레벨과 같은 집적회로의 낮은 레벨에서 형성된다.In today's integrated circuit industry, memories with hundreds of megabits of storage per die are being manufactured. When manufacturing integrated circuits having such a density, it is impossible to form one in millions of cells in each die with perfect yield. Therefore, fuse technology is used, such as laser repair technology, which allows difficult or defective cells to be removed from the array. Redundant operable replacement cells may then be coupled to the array in place of the newly removed inoperable cell. Such memory cell fuses are typically formed at low levels of an integrated circuit, such as at the conductive polysilicon level.
종래의 레이저 퓨즈 셀들은, 셀의 면적이 감소함에 따라 캐패시턴스 개선을 위해 캐패시터 유전막으로 탄탈륨(Ta2O5)을 적용하며, 반도체 소자의 특성확보를 위한 플레이트 전극으로는 티타늄 나이트라이드(TiN)를 적용하고 있다.Conventional laser fuse cells use tantalum (Ta 2 O 5 ) as a capacitor dielectric layer to improve capacitance as the cell area decreases, and titanium nitride (TiN) is used as a plate electrode for the characteristics of semiconductor devices. It is applied.
그에 대한 구체적인 퓨즈 셀들의 구조가 도 1a에 도시되어 있다. 도 1a를 참조하면, 다수의 퓨즈들(10, 12, 14)이 배열되어 있고, 각 퓨즈들 사이에는 상부와 하부에 쌍(雙)으로 각각 가드(Guard, 16a, 16b, 18a, 18b)가 형성되어 있다.The structure of specific fuse cells therefor is shown in FIG. 1A. Referring to FIG. 1A, a plurality of fuses 10, 12, and 14 are arranged, and guards 16a, 16b, 18a, and 18b are arranged in pairs at the top and the bottom of each fuse, respectively. Formed.
플레이트 전극으로 사용되는 티타늄 나이트라이드가 상기 퓨즈의 재료로 사용되고 있으며, 상기한 바와 같이 유전율이 높은 탄탈륨이 캐패시터 유전막으로 사용되면서 프로브 테스트를 수행한 후에 레이저에 의해 어느 하나의 퓨즈(12)를 블로잉(Blowing)할 때, 블로잉 영역(19)에 있는 상기 퓨즈(12)가 절단되는데, 이때 드러난 계면에 의해 향후 실시되는 신뢰성 테스트시 수분이 상기 계면을 통해 침투되어 수분반응에 의해 퓨즈가 손상되는 현상이 발생되었다.Titanium nitride, which is used as a plate electrode, is used as a material of the fuse, and as described above, a tantalum having a high dielectric constant is used as the capacitor dielectric film, and after performing a probe test, one of the fuses 12 is blown by a laser ( When blowing, the fuse 12 in the blowing area 19 is cut, and moisture is penetrated through the interface in the future reliability test by the exposed interface, and the fuse is damaged by the water reaction. Occurred.
이와 같은 현상은 새로이 제작된 반도체 소자를 이루는 각각의 셀들의 기능을 상실하게 하여 수율을 저하시키는 원인으로 작용하게 된다.This phenomenon causes the function of each cell constituting the newly manufactured semiconductor device to serve as a cause of lowering the yield.
즉, 도 1b를 통해 알 수 있듯이, 레이저에 의한 퓨즈 블로잉 이후에 목적하는 퓨즈(12) 영역 주변의 증착계면이 드러나게 된다.That is, as can be seen from Figure 1b, after the fuse blowing by the laser, the deposition interface around the desired fuse 12 area is revealed.
그에 따라, 향후 반도체 소자가 최종 단계인 패키지(Package)로 가공된 상태에서, THB(Temperature Humidity Bias)/HAST(High Acceleration Stress Test) 등의 항목에 대한 신뢰성 테스트시 블로잉된 증착계면에 수분 침투로 인한 반응으로 티타늄 나이트라이드 퓨즈가 소실되어 퓨즈 데이터 변경에 의한 불량이 재현되는 문제점으로 나타난다.As a result, in the future, the semiconductor device is processed into a package, which is the final step, and moisture penetration into the blown deposition interface during the reliability test for items such as the Temperature Humidity Bias (THB) and the High Acceleration Stress Test (HAST). As a result, the titanium nitride fuse is lost and a defect caused by the change of the fuse data is reproduced.
이와 같은 문제점을 해결하기 위한 본 발명의 목적은, 퓨즈 리페어를 실행한 후 드러난 계면에 의해 다른 주변의 퓨즈에 손상이 발생되지 않도록 하는 리페어용 퓨즈를 갖는 반도체 소자 제조 방법을 제공하는 것이다.SUMMARY OF THE INVENTION An object of the present invention for solving such a problem is to provide a method for manufacturing a semiconductor device having a repair fuse that prevents damage to other peripheral fuses due to the interface exposed after the fuse repair.
본 발명의 다른 목적은, 퓨즈와 퓨즈 사이의 영역에 가드를 형성하여 퓨즈 절단후 발생될 수 있는 수분반응에 의한 손상을 예방하도록 하기 위한 리페어용 퓨즈를 갖는 반도체 소자 제조 방법을 제공하는 것이다.Another object of the present invention is to provide a method for manufacturing a semiconductor device having a repair fuse to form a guard in a region between the fuse and the fuse to prevent damage due to water reaction that may occur after the fuse is cut.
도 1a는 종래의 퓨즈 리페어시의 상태를 보여주는 평면도이다.1A is a plan view illustrating a state of a conventional fuse repair.
도 1b는 도 1a의 레이저 블로잉이 이루어진 후의 퓨즈가 소실된 상태를 보여주는 평면도이다.FIG. 1B is a plan view illustrating a state in which the fuse after the laser blowing of FIG. 1A is lost. FIG.
도 2a는 본 발명의 반도체 소자 제조 방법에 의한 실시예의 퓨즈가드가 형성되어 있는 상태를 보여주는 평면도이다.Figure 2a is a plan view showing a state in which the fuse guard of the embodiment according to the semiconductor device manufacturing method of the present invention is formed.
도 2b는 도 2a의 레이저 블로잉이 이루어진 후의 목적하는 퓨즈가 소실된 상태를 보여주는 평면도이다.FIG. 2B is a plan view illustrating a state in which a desired fuse is lost after the laser blowing of FIG. 2A is performed.
* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings
20, 22, 22a, 22b, 24 : 퓨즈26a, 26b, 28a, 28b : 가드20, 22, 22a, 22b, 24: fuse 26a, 26b, 28a, 28b: guard
30, 32 : 퓨즈가드34 : 블로잉 영역30, 32: fuse guard 34: blowing area
상기 목적을 달성하기 위한 본 발명에 의한 리페어용 퓨즈를 갖는 반도체 소자 제조 방법은, 반도체 소자의 제조 방법에 있어서, 일정한 간격을 두고 나란하게형성되는 퓨즈들 사이에, 상기 퓨즈들의 길이방향과 나란하게 퓨즈가드를 형성하는 것을 특징으로 한다.In the semiconductor device manufacturing method having a repair fuse according to the present invention for achieving the above object, in the manufacturing method of the semiconductor device, between the fuses formed side by side at regular intervals, parallel to the longitudinal direction of the fuses It is characterized by forming a fuse guard.
상기 퓨즈가드는 유전율이 높은 막질이 있는 조건에서 사용될 수 있도록 형성될 수 있으며, 이때의 재질은 티타늄 나이트라이드로 이루어질 수 있다.The fuse guard may be formed to be used in a condition having a high dielectric constant film, the material may be made of titanium nitride.
이와 같은 구성에 의한 본 발명은, 목적하는 퓨즈를 레이저 블로잉에 의해 절단하게 되면 퓨즈들 사이에 형성된 가드에 의해 주변의 퓨즈에는 전혀 영향을 미치지 않게 되므로 원하는 부위만 퓨즈 절단이 가능하도록 한 것이다.According to the present invention by the configuration as described above, cutting the desired fuse by laser blowing does not affect the surrounding fuse at all by the guard formed between the fuse so that only the desired portion can be cut fuse.
이하, 본 발명의 실시예에 대한 설명은 첨부된 도면을 참조하여 더욱 상세하게 설명한다. 아래에 기재된 본 발명의 실시예는 본 발명의 기술적 사상을 예시적으로 설명하기 위한 것에 불과한 것으로, 본 발명의 권리범위가 여기에 한정되는 것으로 이해되어서는 안될 것이다. 아래의 실시예로부터 다양한 변형, 변경 및 수정이 가능함은 이 분야의 통상의 지식을 가진 자에게 있어서 명백한 것이다.Hereinafter, an embodiment of the present invention will be described in more detail with reference to the accompanying drawings. The embodiments of the present invention described below are merely for illustrating the technical idea of the present invention by way of example, it should not be understood that the scope of the present invention is limited thereto. Various modifications, changes and variations are possible in the following examples which will be apparent to those of ordinary skill in the art.
도 2a를 참조하면, 본 발명에 의한 실시예는 다수의 퓨즈(20, 22, 24)가 형성되어 있고, 이들 퓨즈들(20, 22, 24) 사이에는 상하로 쌍을 이루는 가드(26a, 26b, 28a, 28b)가 서로 마주보게 형성되어 있다. 그리고, 상기 가드(26a, 26b, 28a, 28b) 사이에는 상기 퓨즈들과 나란한 방향으로 퓨즈가드(30, 32)가 형성되어 있다.Referring to FIG. 2A, in the embodiment of the present invention, a plurality of fuses 20, 22, and 24 are formed, and the pairs of guards 26a and 26b are arranged up and down between the fuses 20, 22, and 24. , 28a, 28b) are formed to face each other. Further, fuse guards 30 and 32 are formed between the guards 26a, 26b, 28a, and 28b in parallel with the fuses.
이와 같이 구성된 본 발명에 의한 실시예는, 원하는 영역의 퓨즈(22)를 절단하고자 하는 경우 레이저에 의한 블로잉을 실시하더라도 그 영향이 근접된 퓨즈(20, 24)에는 미치지 않게 된다.According to the embodiment of the present invention configured as described above, even if blown by a laser when the fuse 22 of the desired area is to be cut, the influence of the fuse 20 and 24 that are close to each other is not reached.
구체적으로, 셀 쉬링크(Cell Shrink)에 따라 캐패시턴스 개선을 위해, 캐패시터 유전막으로 탄탈륨이 적용되며, 특성 확보를 위해 플레이트 전극으로 티타늄 나이트라이드가 적용된다. 플레이트막인 티타늄 나이트라이드로써 리페어용 퓨즈를 형성하게 되며, THB/HAST 등 신뢰성 테스트시 리페어 퓨즈가 수분에 의한 반응에 의해 소실되지 않도록 방지하기 위해 퓨즈와 퓨즈 사이에 가드(30, 32)를 미리 형성하는 것이다.Specifically, tantalum is applied to the capacitor dielectric layer and titanium nitride is applied to the plate electrode in order to secure the capacitance according to the cell shrink. Titanium nitride, which is a plate film, forms a repair fuse, and in order to prevent the repair fuse from being lost due to moisture reaction during the reliability test such as THB / HAST, guards 30 and 32 are formed between the fuses in advance. To form.
레이저 등에 의한 블로잉을 실시할 때 블로잉 영역(32)에 위치하는 퓨즈(22)는, 도 2b에서 볼 수 있듯이, 하이레벨에 연결되어 있는 퓨즈(22a)는 산화된 후 소실되며, 로우레벨에 연결되어 있는 퓨즈(22b)는 그대로 남아 있게 된다. 그리고, 퓨즈(22)의 양측면에 있는 퓨즈들(20, 24)은 퓨즈가드(30, 32)에 의해 블로잉에 의한 영향을 받지 않으므로 그 상태가 정상으로 유지된다.When blown by a laser or the like, the fuse 22 located in the blowing area 32 is, as shown in FIG. 2B, the fuse 22a connected to the high level is oxidized and then burned out and connected to the low level. The fuse 22b is left as it is. In addition, since the fuses 20 and 24 on both sides of the fuse 22 are not affected by the blowing by the fuse guards 30 and 32, the state is maintained as normal.
따라서, 이와 같은 퓨즈구조를 갖는 반도체 소자는 리페어 공정에서 퓨즈 리페어 작업시 목적하는 퓨즈만 절단되므로, 이후의 패키지로 형성된 제품의 신뢰성 테스트시 수분반응에 의한 소자의 소실이 예방되는 것이다.Therefore, since the semiconductor device having such a fuse structure only cuts the target fuse during the fuse repair operation in the repair process, the loss of the device due to moisture reaction is prevented during the reliability test of the product formed in the package.
따라서, 본 발명에 의하면, 퓨즈 리페어를 실행한 후 형성된 계면에 의한 수분침투가 퓨즈가드에 의해 예방되므로 리페어 대상 퓨즈 영역 이외의 퓨즈 영역에는 손상이 가해지지 않아서 신뢰성 테스트시의 수분 반응에 의한 소실이 예방되는 효과가 있다.Therefore, according to the present invention, since moisture penetration due to the interface formed after the fuse repair is prevented by the fuse guard, damage is not applied to the fuse areas other than the repair target fuse area, and the loss due to the moisture reaction during the reliability test is prevented. It has the effect of being prevented.
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| Application Number | Priority Date | Filing Date | Title |
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| KR1020020008471A KR20030068826A (en) | 2002-02-18 | 2002-02-18 | Method of making a semiconductor device having fuses for repair |
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| Application Number | Priority Date | Filing Date | Title |
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| KR1020020008471A KR20030068826A (en) | 2002-02-18 | 2002-02-18 | Method of making a semiconductor device having fuses for repair |
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| KR20030068826A true KR20030068826A (en) | 2003-08-25 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100809708B1 (en) * | 2006-10-17 | 2008-03-06 | 삼성전자주식회사 | Laser alignment monitoring fuse structure and semiconductor device having the same and laser alignment monitoring circuit |
-
2002
- 2002-02-18 KR KR1020020008471A patent/KR20030068826A/en not_active Application Discontinuation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100809708B1 (en) * | 2006-10-17 | 2008-03-06 | 삼성전자주식회사 | Laser alignment monitoring fuse structure and semiconductor device having the same and laser alignment monitoring circuit |
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