KR20030060071A - 메모리의 일부의 할당을 관리하기 위한 방법 및 시스템 - Google Patents

메모리의 일부의 할당을 관리하기 위한 방법 및 시스템 Download PDF

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Publication number
KR20030060071A
KR20030060071A KR10-2003-0000020A KR20030000020A KR20030060071A KR 20030060071 A KR20030060071 A KR 20030060071A KR 20030000020 A KR20030000020 A KR 20030000020A KR 20030060071 A KR20030060071 A KR 20030060071A
Authority
KR
South Korea
Prior art keywords
memory
bus
central processing
processing unit
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR10-2003-0000020A
Other languages
English (en)
Korean (ko)
Inventor
다나카모토
Original Assignee
휴렛-팩커드 컴퍼니(델라웨어주법인)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 휴렛-팩커드 컴퍼니(델라웨어주법인) filed Critical 휴렛-팩커드 컴퍼니(델라웨어주법인)
Publication of KR20030060071A publication Critical patent/KR20030060071A/ko
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
KR10-2003-0000020A 2002-01-03 2003-01-02 메모리의 일부의 할당을 관리하기 위한 방법 및 시스템 Ceased KR20030060071A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/033,778 US6832303B2 (en) 2002-01-03 2002-01-03 Method and system for managing an allocation of a portion of a memory
US10/033,778 2002-01-03

Publications (1)

Publication Number Publication Date
KR20030060071A true KR20030060071A (ko) 2003-07-12

Family

ID=21872383

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2003-0000020A Ceased KR20030060071A (ko) 2002-01-03 2003-01-02 메모리의 일부의 할당을 관리하기 위한 방법 및 시스템

Country Status (4)

Country Link
US (1) US6832303B2 (enExample)
JP (1) JP2003216486A (enExample)
KR (1) KR20030060071A (enExample)
SG (1) SG114582A1 (enExample)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7133972B2 (en) 2002-06-07 2006-11-07 Micron Technology, Inc. Memory hub with internal cache and/or memory access prediction
US7117316B2 (en) 2002-08-05 2006-10-03 Micron Technology, Inc. Memory hub and access method having internal row caching
US6820181B2 (en) 2002-08-29 2004-11-16 Micron Technology, Inc. Method and system for controlling memory accesses to memory modules having a memory hub architecture
US7120727B2 (en) 2003-06-19 2006-10-10 Micron Technology, Inc. Reconfigurable memory module and method
US7260685B2 (en) * 2003-06-20 2007-08-21 Micron Technology, Inc. Memory hub and access method having internal prefetch buffers
US7120743B2 (en) 2003-10-20 2006-10-10 Micron Technology, Inc. Arbitration system and method for memory responses in a hub-based memory system
US7330992B2 (en) 2003-12-29 2008-02-12 Micron Technology, Inc. System and method for read synchronization of memory modules
US8250295B2 (en) 2004-01-05 2012-08-21 Smart Modular Technologies, Inc. Multi-rank memory module that emulates a memory module having a different number of ranks
US7188219B2 (en) 2004-01-30 2007-03-06 Micron Technology, Inc. Buffer control system and method for a memory system having outstanding read and write request buffers
US7916574B1 (en) 2004-03-05 2011-03-29 Netlist, Inc. Circuit providing load isolation and memory domain translation for memory module
US7346401B2 (en) * 2004-05-25 2008-03-18 International Business Machines Corporation Systems and methods for providing constrained optimization using adaptive regulatory control
US7519788B2 (en) 2004-06-04 2009-04-14 Micron Technology, Inc. System and method for an asynchronous data buffer having buffer write and read pointers
US7278006B2 (en) * 2004-12-30 2007-10-02 Intel Corporation Reducing memory fragmentation
US7418568B2 (en) * 2005-01-05 2008-08-26 Sap Ag Memory management technique
WO2006079986A2 (en) * 2005-01-31 2006-08-03 Nxp B.V. Data processing system and method for memory defragmentation
US7516291B2 (en) * 2005-11-21 2009-04-07 Red Hat, Inc. Cooperative mechanism for efficient application memory allocation
US9311227B2 (en) * 2006-10-31 2016-04-12 Hewlett Packard Enterprise Development Lp Memory management
US8787060B2 (en) 2010-11-03 2014-07-22 Netlist, Inc. Method and apparatus for optimizing driver load in a memory package
US8001434B1 (en) 2008-04-14 2011-08-16 Netlist, Inc. Memory board with self-testing capability
US8154901B1 (en) 2008-04-14 2012-04-10 Netlist, Inc. Circuit providing load isolation and noise reduction
US8516185B2 (en) 2009-07-16 2013-08-20 Netlist, Inc. System and method utilizing distributed byte-wise buffers on a memory module
US9251149B2 (en) * 2009-02-03 2016-02-02 Bmc Software, Inc. Data set size tracking and management
US9128632B2 (en) 2009-07-16 2015-09-08 Netlist, Inc. Memory module with distributed data buffers and method of operation
CN110428855B (zh) 2013-07-27 2023-09-22 奈特力斯股份有限公司 具有本地分别同步的内存模块
US11157207B2 (en) 2018-07-31 2021-10-26 SK Hynix Inc. Apparatus and method for engaging plural memory system with each other to store data
US11442628B2 (en) 2018-07-31 2022-09-13 SK Hynix Inc. Apparatus and method for engaging a plurality of memory systems with each other
US11249919B2 (en) * 2018-07-31 2022-02-15 SK Hynix Inc. Apparatus and method for managing meta data for engagement of plural memory system to store data
KR102733351B1 (ko) * 2018-07-31 2024-11-25 에스케이하이닉스 주식회사 데이터를 저장하기 위해 복수의 메모리 시스템을 연동시키는 방법 및 장치

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6334175B1 (en) * 1998-07-22 2001-12-25 Ati Technologies, Inc. Switchable memory system and memory allocation method

Also Published As

Publication number Publication date
US20030126393A1 (en) 2003-07-03
SG114582A1 (en) 2005-09-28
US6832303B2 (en) 2004-12-14
JP2003216486A (ja) 2003-07-31

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