KR20030059472A - Method for forming copper line in semiconductor device - Google Patents
Method for forming copper line in semiconductor device Download PDFInfo
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- KR20030059472A KR20030059472A KR1020010088335A KR20010088335A KR20030059472A KR 20030059472 A KR20030059472 A KR 20030059472A KR 1020010088335 A KR1020010088335 A KR 1020010088335A KR 20010088335 A KR20010088335 A KR 20010088335A KR 20030059472 A KR20030059472 A KR 20030059472A
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- semiconductor device
- abrasive
- slurry
- copper
- surfactant
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- 239000010949 copper Substances 0.000 title claims abstract description 36
- 238000000034 method Methods 0.000 title claims abstract description 29
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 28
- 229910052802 copper Inorganic materials 0.000 title claims abstract description 28
- 239000004065 semiconductor Substances 0.000 title claims abstract description 17
- 239000002002 slurry Substances 0.000 claims abstract description 24
- 239000004094 surface-active agent Substances 0.000 claims abstract description 17
- 230000004888 barrier function Effects 0.000 claims abstract description 9
- 239000000126 substance Substances 0.000 claims abstract description 4
- 238000004140 cleaning Methods 0.000 claims description 3
- 238000007517 polishing process Methods 0.000 claims description 2
- 230000032798 delamination Effects 0.000 abstract description 4
- 230000007547 defect Effects 0.000 abstract description 3
- 229910052751 metal Inorganic materials 0.000 abstract description 3
- 239000002184 metal Substances 0.000 abstract description 3
- 238000005498 polishing Methods 0.000 abstract description 3
- 239000002245 particle Substances 0.000 description 9
- 239000010408 film Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000002209 hydrophobic effect Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000001603 reducing effect Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
- H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
본 발명은 반도체 소자의 구리배선 형성방법에 관한 것으로, 보다 상세하게는 계면 활성제를 이용한 무연마제 슬러리(abrasive free slurry)를 사용하는 반도체 소자의 구리배선 형성방법에 관한 것이다.The present invention relates to a copper wiring forming method of a semiconductor device, and more particularly to a copper wiring forming method of a semiconductor device using an abrasive free slurry using a surfactant.
일반적으로 반도체 소자의 제조에 있어서, 금속배선 물질을 기존의 알루미늄에서 구리로 변경하기 위해선 구리(Cu) CMP 공정 도입이 필수적이다. Cu CMP 공정은 듀얼 다마신(dual damascene) 공정에서 마지막 단계로서 잉여 Cu를 웨이퍼 표면에서 제거시켜 금속배선이 형성되어야 할 트렌치와 비아홀에만 구리를 남게 하는 공정 기술이다.In general, in the manufacture of semiconductor devices, it is necessary to introduce a copper (Cu) CMP process in order to change the metallization material from conventional aluminum to copper. The Cu CMP process is the last step in a dual damascene process, in which excess Cu is removed from the wafer surface, leaving copper only in trenches and via holes where metallization should be formed.
이러한 Cu CMP 공정에 있어서 중요한 소모품중 하나가 슬러리(slurry)이다. 슬러리는 Cu 표면을 산화시킬 수 있는 산화제와 산화된 Cu를 제거하는 연마제 입자(abrasive particle)가 콜로이드(colloid) 상태로 혼합된 물질이다.One of the important consumables in this Cu CMP process is slurry. A slurry is a material in which a oxidant capable of oxidizing a Cu surface and abrasive particles for removing oxidized Cu are mixed in a colloidal state.
특히, 슬러리에 포함된 연마제 입자는 스크래치(scratch), 연마제 입자 잔류물(abrasive particle residue), 침식(erosion), 및 디싱(dishing) 등과 같은 CMP 결함을 증가시키는 주원인중의 하나로 작용한다.In particular, the abrasive particles contained in the slurry act as one of the main causes of increasing CMP defects such as scratches, abrasive particle residues, erosion, and dishing.
이와 같이 슬러리에 포함되어 있는 연마제 입자로 인한 여러 가지 문제점들을 해결하기 위해 최근에는 연마제 입자가 없는 슬러리가 제안되었으며, 또한 상당히 긍정적인 효과를 나타내고 있다.In order to solve various problems caused by the abrasive particles contained in the slurry, a slurry without the abrasive particles has recently been proposed, and also has a considerably positive effect.
그러나, 종래 기술에 따른 반도체 소자의 구리배선 형성방법에 있어서는 다음과 같은 문제점이 있다.However, the copper wiring forming method of the semiconductor device according to the prior art has the following problems.
종래 기술에 있어서 연마제 입자가 없는 슬러리를 사용하는 경우 CMP 공정중 웨이퍼의 연마면과 패드가 직접 접촉함으로써 마찰력이 증가하는 결과를 초래하게 되었다. 이러한 마찰력 증가는 CMP중에 금속막이나 산화막, 특히 저유전율 물질 일부가 웨이퍼 표면에서 떨어져 나오는 현상인 박리(delamination) 현상을 유발하게 되었다.In the prior art, when a slurry without abrasive particles is used, frictional force is increased due to direct contact between the pad of the wafer and the pad during the CMP process. This increase in friction causes delamination, a phenomenon in which a metal film or an oxide film, particularly a low dielectric constant material, is released from the wafer surface during CMP.
상기와 같이 CMP중 마찰력 증가로 인한 박리(delamination) 현상이 발생하게 될 경우 반도체 소자에 치명적인 결함으로 작용하여 수율이 급격하게 감소하는 문제점이 있었다.As described above, when a delamination phenomenon occurs due to an increase in frictional force during CMP, there is a problem in that the yield is drastically reduced due to a fatal defect in the semiconductor device.
이에, 본 발명은 상기 종래 기술의 제반 문제점들을 해결하기 위하여 안출된 것으로, 본 발명의 목적은 무연마제 슬러리(abrasive free slurry)에 계면활성제를 혼합 또는 투입하여 웨이퍼와 패드간의 마찰력 증가를 감소시키는 반도체 소자의 구리배선 형성방법을 제공함에 있다.Accordingly, the present invention has been made to solve the above-mentioned problems of the prior art, an object of the present invention is a semiconductor that reduces or increases the frictional force between the wafer and the pad by mixing or adding a surfactant to an abrasive free slurry (abrasive free slurry) It is to provide a method for forming a copper wiring of the device.
도 1은 본 발명에 따른 반도체 소자의 구리배선 형성방법을 나타내는 공정별 흐름도.1 is a process-specific flow chart showing a method for forming copper wiring of a semiconductor device according to the present invention.
도 2는 본 발명에 따른 반도체 소자의 구리배선 형성방법에 있어서, CMP 공정을 설명하기 위한 단면도.2 is a cross-sectional view for explaining a CMP process in the copper wiring forming method of a semiconductor device according to the present invention.
- 도면의 주요부분에 대한 부호의 설명 --Explanation of symbols for the main parts of the drawings-
10; 웨이퍼20; 패드10; Wafer 20; pad
30; 무연마제 슬러리30; Abrasive-free slurry
상기 목적을 달성하기 위한 본 발명에 따른 반도체 소자의 구리배선 형성방법은, 배리어층 상에 형성된 구리층을 무연마제 슬러리를 사용한 화학기계적 연마공정으로 선택적으로 제거하는 단계; 상기 무연마제 슬러리에 계면활성제를 투입하여 상기 잔류 구리층을 제거하는 단계; 및 상기 배리어층을 제거한 후세정 공정을 포함하는 것을 특징으로 한다.Copper wiring forming method of a semiconductor device according to the present invention for achieving the above object, the step of selectively removing the copper layer formed on the barrier layer by a chemical mechanical polishing process using a slurry of the abrasive; Adding a surfactant to the slurry of the abrasive to remove the residual copper layer; And a post-cleaning step of removing the barrier layer.
이하, 본 발명에 따른 반도체 소자의 구리배선 형성방법을 첨부한 도면을 참조하여 상세히 설명한다.Hereinafter, a method of forming copper wirings of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.
도 1은 본 발명에 따른 반도체 소자의 구리배선 형성방법을 나타내는 공정별 흐름도이고, 도 2는 본 발명에 따른 반도체 소자의 구리배선 형성방법에 있어서, CMP 공정을 설명하기 위한 단면도이다.1 is a flowchart illustrating a process of forming a copper wiring of a semiconductor device according to the present invention, and FIG. 2 is a cross-sectional view illustrating a CMP process in the method of forming a copper wiring of a semiconductor device according to the present invention.
본 발명에 따른 반도체 소자의 구리배선 형성방법은, 도 1에 도시된 바와 같이, 먼저 무연마제 슬러리(abrasive free slurry)를 사용하여 계면활성제를 투입하기 전까지 배리어층 상에 전기도금 등으로 형성된 구리(Cu)를 약 70% 내지 90%정도까지 CMP(chemical mechanical polishing) 공정으로 제거한다.In the method of forming a copper wiring of the semiconductor device according to the present invention, as shown in FIG. 1, first, copper is formed by electroplating or the like on a barrier layer until a surfactant is introduced using an abrasive free slurry. Cu) is removed by a chemical mechanical polishing (CMP) process to about 70% to 90%.
이때, 상기 CMP 공정은, 도 2에 도시된 바와 같이, 상부의 웨이퍼(10)를 하부의 패드(20)에 접촉하게끔 수직 하향 압력을 약 1~6psi으로 하고, 약 30 ~ 600회의 분당회전수(rpm)와 무연마제 슬러리(30)의 유동 속도를 분당 50 ~ 600ml 조건하에서 진행한다.In this case, in the CMP process, as shown in FIG. 2, the vertical downward pressure is about 1 to 6 psi so that the upper wafer 10 contacts the lower pad 20, and about 30 to 600 revolutions per minute. (rpm) and the flow rate of the abrasive-free slurry 30 is carried out under 50 ~ 600ml conditions per minute.
이어서, 무연마제 슬러리가 계속 공급되는 상태에서 계면활성제를 투입하여 배리어층 상에 잔류하는 구리를 제거한다.Subsequently, in the state where the abrasive-free slurry is continuously supplied, a surfactant is added to remove copper remaining on the barrier layer.
계면활성제는 친수성 부분과 소수성 부분으로 이루어져 있는바, 친수성 부분은 물분자를 향하고, 소수성 부분은 웨이퍼 표면이나 입자에 붙어 입자들이 웨이퍼에 흡착되는 것을 방지한다. 따라서, 계면활성제를 무연마제 슬러리와 함께 사용하면 웨이퍼 표면에 계면활성제가 흡착되어 매우 얇은 막을 형성하게 되고 이 막으로 인해 웨이퍼 표면과 패드간의 마찰력이 감소하게 된다.The surfactant consists of a hydrophilic portion and a hydrophobic portion. The hydrophilic portion faces water molecules, and the hydrophobic portion adheres to the wafer surface or particles to prevent the particles from adsorbing on the wafer. Thus, the use of a surfactant with a nonabrasive slurry results in the surfactant adsorbing on the wafer surface to form a very thin film that reduces the friction between the wafer surface and the pad.
특히, 상기 계면활성제는 그 농도가 너무 높으면 슬러리액의 화학반응을 방해하여 연마력을 떨어뜨리고, 그 농도가 너무 낮으면 마찰력 감소 효과가 떨어지게 된다. 따라서, 상기 계면활성제 농도는 약 0.1 ~ 15 중량%를 유지시킨다. 아울러, 상기 계면활성제의 유동 속도를 분당 30 내지 600ml로 한다.In particular, when the concentration is too high, the surfactant hinders the chemical reaction of the slurry liquid, thereby lowering the polishing force, and when the concentration is too low, the friction reducing effect is inferior. Thus, the surfactant concentration is maintained at about 0.1 to 15% by weight. In addition, the flow rate of the surfactant is 30 to 600 ml per minute.
구리가 완전히 제거되면 무연마제 슬러리의 공급을 멈춘다. 그러나, 게면활성제는 웨이퍼가 패드에서 떨어질때까지 계속적으로 공급하여 마찰력이 증가되지 않도록 한다.When copper is completely removed, the supply of the abrasive-free slurry is stopped. However, the surfactant is supplied continuously until the wafer is removed from the pad so that the frictional force is not increased.
웨이퍼가 패드에서 떨어진 후에는 계면활성제 공급을 멈추고 웨이퍼 표면을 1차로 DI 워터(deionized wate)로써 린스(rinse)한다.After the wafer is removed from the pad, the surfactant supply is stopped and the wafer surface is first rinsed with DI water (deionized wate).
이어서, 배리어층을 제거한 다음 후세정(post cleaning) 공정을 진행한다.Subsequently, the barrier layer is removed and then a post cleaning process is performed.
본 발명의 원리와 정신에 위배되지 않는 범위에서 여러 실시예는 당해 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 자명할 뿐만 아니라 용이하게 실시할 수 있다. 따라서, 본원에 첨부된 특허청구범위는 이미 상술된 것에 한정되지 않으며, 하기 특허청구범위는 당해 발명에 내재되어 있는 특허성 있는 신규한 모든 사항을 포함하며, 아울러 당해 발명이 속하는 기술분야에서 통상의 지식을 가진 자에 의해서 균등하게 처리되는 모든 특징을 포함한다.Various embodiments can be easily implemented as well as self-explanatory to those skilled in the art without departing from the principles and spirit of the present invention. Accordingly, the claims appended hereto are not limited to those already described above, and the following claims are intended to cover all of the novel and patented matters inherent in the invention, and are also common in the art to which the invention pertains. Includes all features that are processed evenly by the knowledgeable.
이상에서 살펴본 바와 같이, 본 발명에 따른 반도체 소자의 구리배선 형성방법에 있어서는 다음과 같은 효과가 있다.As described above, the copper wiring forming method of the semiconductor device according to the present invention has the following effects.
본 발명에 있어서는, Cu CMP 공정에서 무연마제 슬러리(abrasive free slurry) 적용으로 발생할 수 있는 금속막이나 산화막의 박리(delamination) 현상을 방지할 수 있으며, CMP 공정중에 계면활성제 성분이 투입되므로 입자로 인한 오염을 줄일 수 있다.In the present invention, it is possible to prevent the delamination of the metal film or the oxide film which may be caused by the application of an abrasive-free slurry in the Cu CMP process, and the surfactant component is introduced during the CMP process. Reduce pollution
따라서, 박리 현상 방지 및 입자 오염 감소로 인해서 제조수율을 향상시킬 수 있는 효과가 있다.Therefore, there is an effect that can improve the manufacturing yield due to the prevention of peeling phenomenon and reduced particle contamination.
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020010088335A KR20030059472A (en) | 2001-12-29 | 2001-12-29 | Method for forming copper line in semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020010088335A KR20030059472A (en) | 2001-12-29 | 2001-12-29 | Method for forming copper line in semiconductor device |
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| Publication Number | Publication Date |
|---|---|
| KR20030059472A true KR20030059472A (en) | 2003-07-10 |
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| Application Number | Title | Priority Date | Filing Date |
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| KR1020010088335A KR20030059472A (en) | 2001-12-29 | 2001-12-29 | Method for forming copper line in semiconductor device |
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| KR (1) | KR20030059472A (en) |
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2001
- 2001-12-29 KR KR1020010088335A patent/KR20030059472A/en not_active Application Discontinuation
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