KR20030058223A - In-Plane Switching Mode Liquid Crystal Display Device - Google Patents

Abstract

PURPOSE: An in-plane switching mode liquid crystal display is provided to prevent a pad metal from oxidizing without an extra ITO process, thereby improving the production yield. CONSTITUTION: A gate electrode is formed on a substrate(100) and a gate pad(154) placed at one end of a gate line including the gate electrode. A gate insulating film(160) is formed on the gate electrode and the gate pad, and has a contact hole(180) exposing a part of the gate pad. A semiconductor layer is formed on the gate insulating film. Source and drain electrodes are formed on the semiconductor layer. A data pad is formed at one end of a data line including the source electrode. A gate pad electrode(178) is connected with the gate pad through the contact hole and is made up of a first gate pad metal layer(178a) forming a lower layer and a second gate pad metal layer(178b) forming an upper layer. The second gate pad metal layer is formed of a conductive antioxidant. A protective layer(184) exposes the upper layers of the data pad and the gate pad electrode partially.

Description

In-Plane Switching Mode Liquid Crystal Display Device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to an in-plane switching mode (IPS) liquid crystal display device.

In general, the driving principle of the liquid crystal display device uses the optical anisotropy and polarization of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Accordingly, when the molecular arrangement of the liquid crystal is adjusted by the optical anisotropy of the liquid crystal, light may be refracted to express image information.

Currently, a thin film transistor (TFT), which is a switching element that opens and closes each pixel, is positioned for each pixel, and the first electrode connected to the thin film transistor is a pixel electrode that is turned on and off in units of pixels. In the second electrode, an active matrix liquid crystal display (AM-LCD) used as a common electrode has been attracting the most attention because of its excellent resolution and ability to implement video.

That is, the liquid crystal display includes a color filter substrate (upper substrate) with a liquid crystal layer interposed therebetween and an array substrate (lower substrate) with pixel electrodes formed thereon, and in such a liquid crystal display, common electrodes disposed to face each other. As the liquid crystal is driven by the vertical electric field applied between the and the pixel electrodes, the characteristics such as transmittance and aperture ratio are excellent. However, when the liquid crystal is driven by the vertical electric field, the long axis of the substrate and the liquid crystal are perpendicular to each other, so that the viewing angle range is narrow.

Recently, in order to improve the viewing angle characteristic of a liquid crystal display, a horizontal electric field type (horizontal electric field type) liquid crystal display has been proposed.

1 is a cross-sectional view showing a cross section of a general transverse electric field type liquid crystal display device, and FIGS. 2A and 2B are cross-sectional views showing operation characteristics in voltage off and on states of a general transverse electric field type liquid crystal display device.

As shown in FIG. 1, in a transverse electric field type liquid crystal display device, an upper substrate 10, which is a color filter substrate, and a lower substrate 20, which is an array substrate, are disposed to face each other, and between the upper and lower substrates 10 and 20. In the structure in which the liquid crystal layer 30 is interposed, both the common electrode 22 and the pixel electrode 24 are provided on the lower substrate 20, thereby generating between the common electrode 22 and the pixel electrode 24. The liquid crystal layer 30 is driven in the horizontal direction by the horizontal electric field 26.

2A and 2B show operating characteristics of the liquid crystal molecules 32 in the voltage off / on states, respectively. As shown in FIG. 2A, no phase change occurs in the liquid crystal molecules 32 when the voltage is off. In FIG. 2B, as the voltage is applied, there is no phase change of the liquid crystal molecules 32a at positions corresponding to the common electrode 22 and the pixel electrode 24, but the common electrode 22 and the pixel electrode 24 are not changed. The liquid crystal molecules 32b disposed in the intervals between the liquid crystal molecules 32b have an operating characteristic arranged in parallel with the substrate by a horizontal electric field 26 generated between the common electrode 22 and the pixel electrode 24.

That is, in the transverse electric field type liquid crystal display device, the liquid crystal moves by the horizontal electric field, so that when the display screen is viewed from the front, it can be seen from about 80 ° to 85 ° in the up / down / left / right directions. It is possible to widen the viewing angle range than the vertical field type liquid crystal display device.

3 is a plan view of a conventional array substrate for a transverse electric field type liquid crystal display device.

As shown, the gate and data lines 52 and 64 cross each other, and the thin film transistor T is formed at the point where the gate and data lines 52 and 64 cross.

The thin film transistor T includes a gate electrode 50 branched from the gate line 52, a semiconductor layer 62 covering the gate electrode 50, and a source electrode 66 branched from the data line 52. And a drain electrode 68 spaced apart from the source electrode 66 by a predetermined distance.

The common electrode 56 is formed in a direction parallel to the gate wiring 52, and a plurality of common wirings 58 are branched from the common electrode 56.

In the lead-out wiring 72 extending from the thin film transistor T, the plurality of pixel electrodes 74 are alternately branched from the common wiring 58 described above.

In addition, gate and data pads 54 and 70 are formed at one ends of the gate and data lines 52 and 64, respectively, for connection with an external circuit (not shown), and gate and data pads 54 and 70. ) And gate and data pad electrodes 82 and 84 which are connected to the gate and data pads 54 and 70 through the gate and data pad contact holes 76 and 78, respectively.

In this case, since the common wiring 58 is disposed between the data wiring 64 and the pixel electrode 74, the electric field generated from the data wiring 64 can be prevented from affecting the pixel electrode 74. It is important.

4A to 4C are cross-sectional views taken along the cutting lines IVa-IVa, IVb-IVb, and IVc-IVc of FIG. 3, wherein FIG. 4A is a thin film transistor portion, FIG. 4B is a gate pad portion, and FIG. 4C is It is sectional drawing about a data pad part.

In FIG. 4A, a gate electrode 50 is formed on the transparent substrate 10, a gate insulating film 60 is formed on the entire surface of the gate electrode 50, and an active layer is formed on the gate insulating film 60. An active layer 62a and an ohmic contact layer 62b are formed in this order to form a semiconductor layer 62. The source and drain electrodes 66 are spaced apart from each other at regular intervals. , 68 is formed, and the active layer 62a is exposed to form a channel ch in the intervals between the source and drain electrodes 66 and 68.

The gate electrode 50, the semiconductor layer 62, the source and drain electrodes 66 and 68 form a thin film transistor (T).

The passivation layer 80 is formed on the entire surface of the thin film transistor T.

Although not shown in the drawings, the horizontal liquid crystal display device arranges liquid crystals by a horizontal electric field applied between the common wiring and the pixel electrode, so that the common wiring and the pixel electrode are separated by using a section between the common wiring and the pixel electrode as an opening region. Since the common wiring is formed of the same material in the same process as the gate electrode 50 and the pixel electrode is formed of the same material in the same process as the source and drain electrodes 66 and 68, It is characterized by not forming a separate drain contact hole on the protective layer 80.

Hereinafter, a gate and a data pad part of a conventional transverse electric field type liquid crystal display array substrate will be described.

In FIG. 4B, a gate pad 54 is formed on the transparent substrate 1, and a gate insulating layer 60 having a gate pad contact hole 76 partially exposing the gate pad 54 is disposed on the gate pad 54. The protective layer 80 is sequentially formed, and the gate pad electrode 82 connected to the gate pad 54 through the gate pad contact hole 76 is formed on the protective layer 80.

In FIG. 4C, a data pad 70 is formed on a substrate on which the gate insulating layer 60 is formed, and a data pad contact hole 78 exposing a part of the data pad 70 is formed on the data pad 70. A protective layer 80 is formed, and a data pad electrode 84 connected to the data pad 70 through the data pad contact hole 78 is formed on the protective layer 80.

As the material forming the gate and data pad electrodes 82 and 84, an indium tin oxide (ITO), which is a transparent conductive material, is used to prevent an increase in contact resistance between an oxide film and an external circuit generated when a metal material is exposed to the air. ) Is used.

An array substrate including such elements is repeatedly subjected to photolithography, including number of masks, including exposure, development, and etching, for a conventional transverse field type liquid crystal display device. The array process required a five mask process of a gate process, an active process, a source and drain process, a contact hole process, and an ITO process.

An object of the present invention is to provide an array substrate for a transverse electric field type liquid crystal display device having improved production yield by a low mask process.

Since the mask process is easy to damage peripheral devices as the physical / chemical process is repeatedly performed, and expensive material costs are consumed, research / development of low mask process technology has been actively conducted in recent years.

As part of this technique, the present invention intends to omit a separate ITO process by continuously depositing a conductive passivation layer or conductive buffer layer on the data metal in the source and drain processes.

1 is a cross-sectional view showing a cross section of a general transverse electric field type liquid crystal display device.

2A and 2B are cross-sectional views showing operation characteristics in voltage off and on states of a general transverse electric field type liquid crystal display device;

3 is a plan view of a conventional array substrate for a transverse electric field type liquid crystal display device.

4a to 4c are cross-sectional views taken along the cut lines IVa-IVa, IVb-IVb, IVc-IVc of FIG. 3;

5 is a plan view of an array substrate for a transverse electric field type liquid crystal display device according to the present invention;

6a to 6c are views showing the cut along the cutting lines VIa-VIa, VIb-VIb, VIc-VIc of FIG.

<Description of the symbols for the main parts of the drawings>

100: transparent substrate 154: gate pad

160: gate insulating film 178: gate pad electrode

178a: first gate pad electrode layer 178b: second gate pad metal layer

180: gate pad contact hole 184: protective layer

In order to achieve the above object, in the present invention, a pixel electrode and a common electrode are formed on the same substrate, and for a transverse electric field type liquid crystal display device which generates an electric field in parallel with the substrate by applying a voltage between the pixel electrode and the common electrode. An array substrate comprising: a gate pad disposed on one end of a gate electrode formed on the substrate and a gate wiring including the gate electrode; A gate insulating layer disposed over the gate electrode and the gate pad and having a contact hole exposing a portion of the gate pad; A semiconductor layer formed on the gate insulating layer; Source and drain electrodes formed on the semiconductor layer; A data pad positioned at one end of the data line including the source electrode and having an upper layer formed of at least two metal materials selected from a conductive antioxidant material; A gate pad electrode connected to the gate pad through a contact hole formed in the gate insulating layer and made of the same material as the data pad; An array substrate for a transverse electric field liquid crystal display device including a protective layer exposing a portion of an upper layer of the data pad and the gate pad electrode is provided.

The source and drain electrodes and the data line may be made of the same material as the data pad, wherein the conductive antioxidant material is a transparent conductive material, and the transparent conductive material is indium tin oxide (ITO).

The metal material constituting the lower layer of the data pad is any one of molybdenum (Mo), aluminum (Al), neodymium (Nd), chromium (Cr), copper (Cu), titanium (Ti), an alloy containing these metals, It is characterized in that it is selected from any one of a multilayer material consisting of these metallic materials.

The common electrode is made of the same material in the same process as the gate wiring, the pixel electrode is connected to the drain electrode, and is made of the same material in the same process as the drain electrode. It is characterized in that the batch made of a metal material and the lower portion.

The material forming the conductive anti-oxidation film is ITO, the material forming the lower metal material is molybdenum (Mo), and the etchant for batch etching of ITO and molybdenum is nitrate-based etchant.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 5 is a plan view of an array substrate for a transverse electric field type liquid crystal display device according to an exemplary embodiment of the present invention. FIG.

As shown, the gate wiring 152 is formed in the first direction, the data wiring 164 is formed in the second direction crossing the first direction, and the gate and the data wirings 152 and 164 intersect. The thin film transistor (T) is formed at the point.

The thin film transistor T includes a gate electrode 150 branched from the gate line 152, a semiconductor layer 162 covering the gate electrode 150, and a source electrode 166 branched from the data line 164. And a drain electrode 168 spaced apart from the source electrode 166 by a predetermined distance.

The common electrode 156 is formed in a direction parallel to the gate wiring 152, and a plurality of common wirings 58 are branched from the common electrode 156.

In the lead-out line 172 extending from the thin film transistor T, the plurality of pixel electrodes 174 are alternately branched from the common line 158 described above.

In addition, gate and data pads 154 and 170 are formed at one end of the gate and data lines 152 and 164, respectively, for connection with an external circuit (not shown).

In this case, the data pad 170 includes a first data pad metal layer 170a forming a lower layer and a second data pad metal layer 170b forming an upper layer, and the second data pad metal layer 170b serves as a data pad electrode. Do it.

The gate pad electrode 178 covering the gate pad 154 includes a first gate pad metal layer 178a constituting a lower layer and a second gate pad metal layer 178b constituting an upper layer, and substantially a second gate pad. The metal layer 178b serves as a conventional gate pad electrode, and the first gate pad metal layer 178a is configured because the first and second gate pad metal layers 178a and 178b are patterned in the same process. According to the gate pad metal layer 178a, the pad portion may be provided with a sense of thickness, thereby making it possible to more stably perform a tab bonding process with an external circuit.

In this case, the gate and data pad contact holes 180 and 182 formed in the gate and data pad portions may expose portions of the second gate pad metal layer 178b and the second data pad metal layer 170b to the outside, respectively. It acts as a contact hole for connection.

In the present invention, the source and drain electrodes 166 and 168 patterned by the same mask in the source and drain processes, the data wiring 164, the data pad 170, the lead wiring 172, and the pixel electrode 174 are formed. The material is selected from at least a double layer structure metal having the upper layer as a conductive antioxidant film.

In addition, according to the manufacturing process, the data pad unit does not form a separate pad electrode, and the upper layer of the data pad is used as the pad electrode, and the gate pad unit is selected from the same material as the data pad as the gate pad electrode. In the pad part according to the low mask process according to the present invention, the conductive oxide film forming the pad electrode is exposed to the outside through a contact hole formed in the protective layer.

According to the present invention, a material capable of preventing oxidation of the metal pads in the gate and data pad portions may be connected to the upper portion of the metal pads without adding a mask process.

<Example 1>

Example 1 relates to a cross-sectional structure of main elements formed by a method of sequentially depositing source and drain metals and transparent conductive materials or conductive antioxidant materials in a source and drain process, and then batch etching them.

6A to 6C are views illustrating a cut surface according to the cutting lines VIa-VIa, VIb-VIb, and VIc-VIc of FIG. 5, wherein FIG. 6A is a thin film transistor portion, FIG. 6B is a gate pad portion, and FIG. 6C is It is sectional drawing about a data pad part.

In FIG. 6A, a gate electrode 150 is formed on the transparent substrate 100, a gate insulating layer 160 is formed on the entire surface of the gate electrode 150, and an active layer is formed on the gate insulating layer 160. The active layer and the ohmic contact layer 162b are formed in this order to form the semiconductor layer 162. The source and drain electrodes 166 are spaced apart from each other at regular intervals. 168 is formed, and the active layer 162a is exposed to form a channel CH in a spaced interval between the source and drain electrodes 166 and 168.

In this case, the source and drain electrodes 166 and 168 may include a first source and drain metal layer 166a and 168a forming a lower layer, and a second source and drain metal layer 166b and 168b forming an upper layer. And the material forming the drain metal layers 166a and 168a may be any one of molybdenum (Mo), aluminum (Al), neodymium (Nd), chromium (Cr), copper (Cu), and titanium (Ti), or these metals. It also includes an alloy or a bilayer or triple layer structure of these metals.

The material constituting the second source and drain metal layers 166b and 168b is selected from a conductive antioxidant material, and preferably from a transparent conductive material.

Examples of the transparent conductive material include indium tin oxide (ITO), indium tin zinc oxide (ITZO), and indium zinc oxide (IZO). Among them, ITO is most preferable.

In this case, the transparent conductive material does not serve as a transparent electrode, but serves to prevent a drop in contact resistance even when exposed to air, and thus may be replaced with another type of ceramic or metal material. In addition, the ITO may have a composition ratio with low resistance and low resistance.

The thin film transistor T forms the gate electrode 150, the semiconductor layer 162, and the source and drain electrodes 166 and 168.

A passivation layer 180 is formed on the entire surface of the thin film transistor T.

Hereinafter, the cross-sectional structure of the gate and data pad section according to the present invention will be described.

In FIG. 6B, a main gate pad 154 is formed on the transparent substrate 100, and a gate insulating layer 180 having a gate pad contact hole 180 exposing a portion of the gate pad 154 on the gate pad 154. 160 is formed, and a gate pad electrode 178 connected to the gate pad 154 through the gate pad contact hole 180 is formed on the gate insulating layer 160.

A protective layer 184 is formed on the gate pad electrode 178 to expose the gate pad electrode 178 at a position corresponding to the gate pad contact hole 180 described above.

In this case, the gate pad electrode 178 is composed of a first gate pad metal layer 178a forming a lower layer and a second gate pad metal layer 178b forming an upper layer, of which the first gate pad metal layer 178a is formed. The first source and drain metal layers 166a and 168a of FIG. 6A are selected from the same material, and the second gate pad metal layer 178b is formed from the second source and drain metal layers 166b and 168b of FIG. 6A. It is characterized in that it is selected from the same material.

In FIG. 6C, the data pad 170 is formed on the substrate on which the gate insulating layer 160 is formed, and the data pad contact hole 182 partially exposes the data pad 170 on the data pad 170. The protective layer 184 is formed.

The data pad 170 includes a first data pad metal layer 170a constituting a lower layer and a second data pad metal layer 170b constituting an upper layer, wherein the first data pad metal layer 170a is the first data pad metal layer 170a described above. Selected from the same material as the source and drain metal layers (166a and 168a of FIG. 6A), and the second data pad metal layer 170b is selected from the same material as the aforementioned second source and drain metal layers (166b and 168b of FIG. 6A). It is characterized by.

In this case, even when the second gate pad metal layer 178b and the second data pad metal layer 170b are exposed by the gate and the data pad contact holes 180 and 182, the materials are selected from the conductive antioxidant material. Since the metal can be prevented from being oxidized, an increase in contact resistance due to oxidation of the metal material does not occur.

That is, in the gate and data pad unit according to the present invention, instead of forming a separate pad electrode, a metal material constituting the pad electrode may be formed of an upper layer metal of the pad metal, thereby preventing oxidation of the pad metal by a low mask process. It is characterized by having a structure.

For example, in the source and drain process according to the present invention, when the material forming the source and drain metal layers is made of molybdenum and the material forming the conductive antioxidant film is made of ITO, the two materials are collectively formed using a nitrate-based etchant. It can be etched.

When the two metal layers are collectively etched, when the etching rate of the conductive oxide film is faster than that of the source and drain metal layers, the conductive oxide film may be partially positioned or thinner than the source and drain metal layers.

However, it can be said that it is a feature of the present invention that the conductive anti-oxidation film is basically exposed to or under the protective layer to have a structure for preventing oxidation of the pad metal.

However, it is not limited to the said embodiment of this invention, It can implement in various changes within the range which does not deviate from the meaning of this invention.

As described above, according to the transverse electric field type liquid crystal display device according to the four mask process according to the present invention, the conductive oxide film is formed of the upper layer metal on the source and drain metals in the source and drain processes, so that a separate ITO process is omitted. A liquid crystal display device having an improved production yield capable of preventing oxidation of a pad metal by a mask process can be provided.

Claims (8)

In an array substrate for a transverse electric field type liquid crystal display device having a pixel electrode and a common electrode formed on the same substrate and generating an electric field in parallel with the substrate by applying a voltage between the pixel electrode and the common electrode, A gate pad positioned on one end of a gate electrode formed on the substrate and a gate wiring including the gate electrode; A gate insulating layer disposed over the gate electrode and the gate pad and having a contact hole exposing a portion of the gate pad; A semiconductor layer formed on the gate insulating layer; Source and drain electrodes formed on the semiconductor layer; A data pad positioned at one end of the data line including the source electrode and having an upper layer formed of at least two metal materials selected from a conductive antioxidant material; A gate pad electrode connected to the gate pad through a contact hole formed in the gate insulating layer and made of the same material as the data pad; A protective layer partially exposing the upper layers of the data pad and the gate pad electrode Array substrate for a transverse electric field type liquid crystal display device comprising a. The method of claim 1, And the source and drain electrodes and the data line are made of the same material as the data pad. The method of claim 1, And the conductive antioxidant is a transparent conductive material. The method of claim 3, wherein The transparent conductive material is indium tin oxide (ITO) array substrate for a transverse electric field type liquid crystal display device. The method of claim 1, The metal material constituting the lower layer of the data pad is any one of molybdenum (Mo), aluminum (Al), neodymium (Nd), chromium (Cr), copper (Cu), titanium (Ti), an alloy containing these metals, An array substrate for a transverse electric field type liquid crystal display device selected from any one of a plurality of layers of these metal materials. The method of claim 1, And the common electrode is made of the same material in the same process as the gate wiring, and the pixel electrode is connected to the drain electrode and is made of the same material in the same process as the drain electrode. The method of claim 1, The conductive anti-oxidation film is an array substrate for a transverse electric field liquid crystal display device is formed by collectively etching the lower metal material connected to the junction. The method of claim 7, wherein The conductive anti-oxidation layer is made of ITO, the lower metal is made of molybdenum (Mo), and the etchant for batch etching of the ITO and molybdenum is a nitrate-based etchant array. Board.