KR20030050983A - Liquid Crystal Display Device and Fabricating Method Thereof - Google Patents

Liquid Crystal Display Device and Fabricating Method Thereof Download PDF

Info

Publication number
KR20030050983A
KR20030050983A KR1020010081773A KR20010081773A KR20030050983A KR 20030050983 A KR20030050983 A KR 20030050983A KR 1020010081773 A KR1020010081773 A KR 1020010081773A KR 20010081773 A KR20010081773 A KR 20010081773A KR 20030050983 A KR20030050983 A KR 20030050983A
Authority
KR
South Korea
Prior art keywords
electrode
liquid crystal
gate
storage electrode
crystal display
Prior art date
Application number
KR1020010081773A
Other languages
Korean (ko)
Other versions
KR100485625B1 (en
Inventor
김민주
김삼열
Original Assignee
엘지.필립스 엘시디 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘지.필립스 엘시디 주식회사 filed Critical 엘지.필립스 엘시디 주식회사
Priority to KR10-2001-0081773A priority Critical patent/KR100485625B1/en
Publication of KR20030050983A publication Critical patent/KR20030050983A/en
Application granted granted Critical
Publication of KR100485625B1 publication Critical patent/KR100485625B1/en

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133345Insulating layers
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134363Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509Filters, e.g. light shielding masks
    • G02F1/133514Colour filters
    • G02F1/133519Overcoatings
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)
  • Geometry (AREA)

Abstract

PURPOSE: A liquid crystal display and a method for fabricating the liquid crystal display are provided to form a storage electrode using an organic conductive material to improve aperture rate. CONSTITUTION: A liquid crystal display includes a gate line(32) formed on a substrate(31), a gate insulating layer(42) formed on the gate line, and a storage electrode(54) formed of a transparent organic conductive material on the gate insulating layer. The liquid crystal display further includes a passivation layer(48) that is formed on the storage electrode and gate insulating layer and has a contact hole(56), and a pixel electrode(52) formed on the passivation layer and electrically connected to the storage electrode through the contact hole.

Description

액정표시소자 및 그 제조방법{Liquid Crystal Display Device and Fabricating Method Thereof}Liquid crystal display device and its manufacturing method {Liquid Crystal Display Device and Fabricating Method Thereof}

본 발명은 액정표시소자에 관한 것으로, 특히 개구율을 높일 수 있는 액정표시소자 및 그 제조방법에 관한 것이다.The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a method of manufacturing the same that can increase the aperture ratio.

통상의 액정표시소자는 전계를 이용하여 액정의 광투과율을 조절함으로써 화상을 표시하게 된다. 이를 위하여, 액정표시소자는 액정셀들이 매트릭스 형태로 배열되어진 액정패널과, 이 액정패널을 구동하기 위한 구동회로를 구비하게 된다. 액정패널에는 액정셀들 각각에 전계를 인가하기 위한 화소전극들과 공통전극이 마련되게 된다. 통상, 화소전극은 하부기판 상에 액정셀별로 형성되는 반면 공통전극은 상부기판의 전면에 일체화되어 형성되게 된다. 화소전극들 각각은 스위치 소자로 사용되는 박막 트랜지스터(Thin Film Transistor; 이하 "TFT"라 함)에 접속되게 된다. 화소전극은 TFT를 통해 공급되는 데이터신호에 따라 공통전극과 함께 액정셀을 구동한다.Conventional liquid crystal display devices display an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the liquid crystal display device includes a liquid crystal panel in which liquid crystal cells are arranged in a matrix, and a driving circuit for driving the liquid crystal panel. The liquid crystal panel is provided with pixel electrodes and a common electrode for applying an electric field to each of the liquid crystal cells. In general, the pixel electrode is formed for each liquid crystal cell on the lower substrate, while the common electrode is integrally formed on the front surface of the upper substrate. Each of the pixel electrodes is connected to a thin film transistor (hereinafter referred to as "TFT") used as a switch element. The pixel electrode drives the liquid crystal cell together with the common electrode according to the data signal supplied through the TFT.

도 1 및 도 2를 참조하면, 액정표시장치의 하부기판(1)은 데이터라인(4)과 게이트라인(2)의 교차부에 위치하는 TFT부(TP)와, TFT(TP)의 드레인전극(10)에 접속되는 화소전극(22)과, 화소전극(22)과 게이트라인(2)과의 중첩부분에 위치하는 스토리지 캐패시터부(SP)를 구비한다.1 and 2, the lower substrate 1 of the liquid crystal display device includes a TFT part TP positioned at an intersection of the data line 4 and the gate line 2, and a drain electrode of the TFT TP. A pixel electrode 22 connected to the pixel 10 and a storage capacitor part SP positioned at an overlapping portion of the pixel electrode 22 and the gate line 2 are provided.

TFT부(TP)는 게이트라인(2)에 접속된 게이트전극(6), 데이터라인(4)에 접속된 소스전극(8) 및 드레인접촉홀(20)을 통해 화소전극(22)에 접속된 드레인전극(10)으로 이루어진다. 또한, TFT부(TP)는 게이트전극(6)에 공급되는 게이트전압에 의해 소스전극(8)과 드레인전극(10)간에 채널을 형성하기 위한 반도체층(14,16)을 더 구비한다. 이러한 TFT부(TP)는 게이트라인(2)으로부터의 게이트신호에 응답하여 데이터라인(4)으로부터의 데이터신호를 선택적으로 화소전극(22)에 공급한다.The TFT portion TP is connected to the pixel electrode 22 through the gate electrode 6 connected to the gate line 2, the source electrode 8 connected to the data line 4, and the drain contact hole 20. The drain electrode 10 is formed. The TFT portion TP further includes semiconductor layers 14 and 16 for forming a channel between the source electrode 8 and the drain electrode 10 by the gate voltage supplied to the gate electrode 6. The TFT portion TP selectively supplies the data signal from the data line 4 to the pixel electrode 22 in response to the gate signal from the gate line 2.

화소전극(22)은 데이터라인(4)과 게이트라인(2)에 의해 분할된 셀 영역에 위치하며 광투과율이 높은 투명무기도전물질로 이루어진다. 이 화소전극(22)은 드레인접촉홀(20)을 경유하여 공급되는 데이터신호에 의해 상부기판(도시하지 않음)에 형성되는 공통전극(도시하지 않음)과 전위차를 발생시키게 된다. 이 전위차에 의해 하부기판(1)과 상부기판(도시하지 않음) 사이에 위치하는 액정은 유전율이방성에 의해 회전하게 된다. 이에 따라, 광원으로부터 화소전극(22)을 경유하여 공급되는 광을 상부기판 쪽으로 투과되게 한다.The pixel electrode 22 is formed in a cell region divided by the data line 4 and the gate line 2 and is made of a transparent inorganic electroconductive material having high light transmittance. The pixel electrode 22 generates a potential difference from a common electrode (not shown) formed on an upper substrate (not shown) by a data signal supplied through the drain contact hole 20. Due to this potential difference, the liquid crystal located between the lower substrate 1 and the upper substrate (not shown) is rotated by the dielectric anisotropy. Accordingly, the light supplied from the light source via the pixel electrode 22 is transmitted to the upper substrate.

스토리지 캐패시터부(SP)는 화소전극(22)의 전압변동을 억제하는 역할을 하게 된다. 이러한 스토리지 캐패시터부(SP)는 게이트라인(2)과, 게이트절연막(12)을 사이에 두고 스토리지전극(24)으로 형성된다. 이 스토리지전극(24)은 보호막(18) 상에 형성된 스토리지접촉홀(26)을 통해 화소전극(22)과 전기적으로 접속된다.The storage capacitor part SP plays a role of suppressing a voltage variation of the pixel electrode 22. The storage capacitor part SP is formed of the storage electrode 24 with the gate line 2 and the gate insulating layer 12 interposed therebetween. The storage electrode 24 is electrically connected to the pixel electrode 22 through the storage contact hole 26 formed on the passivation layer 18.

이러한 액정표시소자의 제조방법은 도 3a 내지 도 3e를 결부하여 설명하기로 한다.The method of manufacturing the liquid crystal display device will be described with reference to FIGS. 3A to 3E.

먼저, 하부기판(1) 상에 게이트금속층을 증착한 후 패터닝함으로써 도 3a에 도시된 바와 같이 게이트라인(2) 및 게이트전극(6)이 형성된다. 게이트라인(2) 및 게이트전극(6)이 형성된 하부기판(1) 상에 제1 절연물질을 증착하여 게이트절연막(12)이 형성된다. 이 게이트절연막(12) 상에 제1 및 제2 반도체물질을 증착한 후 패터닝함으로써 도 3b에 도시된 바와 같이 활성층(14) 및 오믹접촉층(16)이 형성된다. 그런 다음, 게이트절연막(12) 상에 데이터금속층을 증착한 후 패터닝함으로써 도 3c에 도시된 바와 같이 스토리지전극(24), 소스전극(8) 및 드레인전극(10)이 형성된다. 이후, 제2 절연물질을 증착하여 도 3d에 도시된 바와 같이 보호층(18)을 형성한 후, 보호층(18)을 관통하는 드레인접촉홀(20) 및 스토리지접촉홀(26)이 형성된다. 보호층(18)이 형성된 하부기판(1) 상에 무기투명전도성물질을 증착한 후 패터닝함으로써 도 3e에 도시된 바와 같이 화소전극(22)이 형성된다.First, the gate line 2 and the gate electrode 6 are formed by depositing a gate metal layer on the lower substrate 1 and then patterning the same, as shown in FIG. 3A. The gate insulating layer 12 is formed by depositing a first insulating material on the lower substrate 1 on which the gate line 2 and the gate electrode 6 are formed. By depositing and patterning the first and second semiconductor materials on the gate insulating film 12, the active layer 14 and the ohmic contact layer 16 are formed as shown in FIG. 3B. Then, by depositing and patterning the data metal layer on the gate insulating film 12, the storage electrode 24, the source electrode 8 and the drain electrode 10, as shown in Figure 3c is formed. Thereafter, after the second insulating material is deposited to form the protective layer 18 as illustrated in FIG. 3D, the drain contact hole 20 and the storage contact hole 26 penetrating the protective layer 18 are formed. . The pixel electrode 22 is formed as shown in FIG. 3E by depositing and patterning an inorganic transparent conductive material on the lower substrate 1 on which the protective layer 18 is formed.

이러한 액정표시소자가 대형화되어 갈수록 화소전압을 안정적으로 유지하기 위한 스토리지 캐패시터값(Cst)은 더 증대되어야 한다. 그러나, 스토리지 캐패시터값(Cst)을 증대시키기 위해서 스토리지 캐패시터값(Cst)에 비례하는 스토리지전극(24)의 면적을 넓히게 되면 화소전극(22)과 스토리지전극(24)의 중첩영역이 표시영역까지 넓어진다. 이 표시영역까지 금속으로 형성되는 스토리지전극(24)에 의해표시영역과 스토리지전극(24)의 중첩영역(H)에서 빛이 투과되지 않으므로 개구율이 감소하는 문제점이 있다.As the liquid crystal display device increases in size, the storage capacitor value Cst for stably maintaining the pixel voltage should increase. However, when the area of the storage electrode 24 is increased in proportion to the storage capacitor value Cst to increase the storage capacitor value Cst, the overlapping area of the pixel electrode 22 and the storage electrode 24 becomes wider to the display area. All. Since the light is not transmitted through the overlapping area H between the display area and the storage electrode 24 by the storage electrode 24 formed of metal up to the display area, there is a problem that the aperture ratio decreases.

이를 해결하기 위해, 스토리지전극(24)을 화소전극(22)과 동일한 투명무기도전물질인 ITO,TZO,ITZO 등으로 형성하게 된다. 그러나, 게이트절연막(12) 상에 무기물인 투명무기도전물질을 증착하기 위해서는 스퍼터(sputter)와 같은 고가의 진공장비가 필요로 하는 문제점이 있다.To solve this problem, the storage electrode 24 is formed of ITO, TZO, ITZO, or the like, which is the same transparent inorganic material as the pixel electrode 22. However, there is a problem in that expensive vacuum equipment such as a sputter is required to deposit an inorganic transparent inorganic electroconductive material on the gate insulating layer 12.

따라서, 본 발명의 목적은 개구율을 높일 수 있는 액정표시소자 및 그 제조방법을 제공하는 데 있다.Accordingly, it is an object of the present invention to provide a liquid crystal display device and a method of manufacturing the same which can increase the aperture ratio.

도 1은 종래의 액정표시소자를 나타내는 평면도.1 is a plan view showing a conventional liquid crystal display device.

도 2는 도 1에서 선 "A-A'"를 따라 절취한 액정표시소자를 나타내는 단면도.FIG. 2 is a cross-sectional view of the liquid crystal display taken along the line "A-A '" in FIG.

도 3a 내지 도 3e는 도 2에 도시된 액정표시소자의 제조방법을 단계적으로 나타내는 단면도.3A through 3E are cross-sectional views illustrating a method of manufacturing the liquid crystal display device illustrated in FIG. 2.

도 4는 본 발명에 따른 액정표시소자를 나타내는 평면도.4 is a plan view showing a liquid crystal display device according to the present invention.

도 5는 도 4에서 선 "B-B'"를 따라 절취한 액정표시소자를 나타내는 단면도.FIG. 5 is a cross-sectional view illustrating a liquid crystal display taken along the line “B-B ′” in FIG. 4.

도 6은 도 6에 도시된 스토리지전극의 형성하는 물질을 나타내는 도면.FIG. 6 is a view illustrating a material for forming the storage electrode illustrated in FIG. 6.

도 7a 내지 도 7e는 도 5에 도시된 액정표시소자의 제조방법을 단계적으로 나타내는 단면도.7A to 7E are cross-sectional views illustrating a method of manufacturing the liquid crystal display shown in FIG. 5 in stages.

<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>

1,31 : 하부기판2,32 : 게이트라인1,31: Lower substrate 2,32: Gate line

4,34 : 데이터라인6,36 : 게이트전극4,34 data line 6,36 gate electrode

8,38 : 소스전극10,40 : 드레인전극8,38 source electrode 10,40 drain electrode

12,42 : 게이트절연막14,44 : 활성층12,42 gate insulating film 14,44 active layer

16,46 : 오믹접촉층18,48 : 보호층16,46: ohmic contact layer 18,48: protective layer

20,26,50,56 : 접촉홀22,52 : 화소전극20, 26, 50, 56: contact hole 22, 52: pixel electrode

상기 목적들을 달성하기 위하여, 본 발명에 따른 액정표시소자는 기판 상에 형성되는 게이트라인과, 게이트라인 상에 형성되는 게이트절연막과, 게이트절연막 상에 투명유기도전물질로 형성되는 스토리지전극과, 스토리지전극과 게이트절연막 상에 형성되는 보호층과, 보호층 상에 접촉홀을 형성하여 스토리지전극과 전기적으로 접촉되게 형성되는 화소전극을 구비한다.In order to achieve the above objects, the liquid crystal display device according to the present invention comprises a gate line formed on a substrate, a gate insulating film formed on the gate line, a storage electrode formed of a transparent organic conductive material on the gate insulating film, and storage A protective layer formed on the electrode and the gate insulating film, and a pixel electrode formed in contact with the storage electrode by forming a contact hole on the protective layer.

상기 투명유기도전물질은 폴리에틸렌디옥시티오펜(Poly(3,4-ethylenedioxythiophene), 폴리아세틸렌(Polyacetylene), 폴리피롤(Polypyrrole), 폴리티오펜(Polythiophene), 폴리페니렌 설피드(Polyphenylene sulfide), 폴리페니렌 바이닐렌(Polyphenylene vinylene), 폴리아줄렌(polyazulene), 폴리페닐렌(polyphenylene), 폴리아닐린(polyaniline), 폴리푸란(polyfuran), 폴리이스티아나펜틸렌(polyisothianaphthene) 및 폴리틸렌 바이닐렌(Polythienylene vinylene) 중 적어도 어느 하나인 것을 특징으로 한다.The transparent organic conductive material is polyethylene dioxythiophene (Poly (3,4-ethylenedioxythiophene), polyacetylene (Polyacetylene), polypyrrole (Polypyrrole), polythiophene, polyphenylene sulfide (Polyphenylene sulfide), polypheny Among polyphenylene vinylene, polyazulene, polyphenylene, polyaniline, polyfuran, polyisothianaphthene and polythienylene vinylene It is characterized by at least one.

상기 액정표시소자는 게이트라인과 접속되는 게이트전극과, 스토리지전극과 동일물질로 형성되는 소스 및 드레인전극을 추가로 구비하는 것을 특징으로 한다.The liquid crystal display device further includes a gate electrode connected to the gate line, and a source and a drain electrode formed of the same material as the storage electrode.

상기 목적을 달성하기 위하여, 본 발명에 따른 액정표시소자의 제조방법은 기판 상에 게이트라인을 형성하는 단계와, 기판 상에 게이트절연막을 형성하는 단계와, 게이트절연막 상에 투명유기도전물질을 스핀코팅으로 증착한 후 패터닝하여 스토리지전극을 형성하는 단계와, 스토리지전극을 덮도록 보호층을 증착하고 패터닝하여 접촉홀을 형성하는 단계와, 보호층 상에 접촉홀을 통해 스토리지전극과 전기적으로 접속되는 화소전극을 형성하는 단계를 포함한다.In order to achieve the above object, a method of manufacturing a liquid crystal display device according to the present invention comprises the steps of forming a gate line on a substrate, forming a gate insulating film on the substrate, spin the transparent organic electroconductive material on the gate insulating film Depositing and patterning the coating to form a storage electrode, depositing and patterning a protective layer to cover the storage electrode to form a contact hole, and electrically connected to the storage electrode through the contact hole on the protective layer. Forming a pixel electrode.

상기 액정표시소자의 제조방법은 기판 상에 게이트라인에 접속되는 게이트전극을 형성하는 단계와, 게이트절연막 상에 반도체층을 형성하는 단계와, 스토리지전극과 동일물질로 소스 및 드레인전극을 형성하는 단계를 포함하는 것을 특징으로 한다.The manufacturing method of the liquid crystal display device includes forming a gate electrode connected to a gate line on a substrate, forming a semiconductor layer on the gate insulating layer, and forming a source and a drain electrode from the same material as the storage electrode. Characterized in that it comprises a.

상기 목적 외에 본 발명의 다른 목적 및 특징들은 첨부도면을 참조한 실시 예에 대한 설명을 통하여 명백하게 드러나게 될 것이다.Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

이하, 도 4 내지 도 7e을 참조하여 본 발명의 바람직한 실시 예에 대하여 설명하기로 한다.Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 7E.

도 4 및 도 5를 참조하면, 액정표시소자의 하부기판(31)은 데이터라인(34)과 게이트라인(32)의 교차부에 위치하는 TFT부(TP)와, TFT부(TP)의 드레인전극(40)에 접속되는 화소전극(52)과, 화소전극(52)과 이전단의 게이트라인(32)과 중첩부분에 위치하는 스토리지 캐패시터부(SP)를 구비한다.4 and 5, the lower substrate 31 of the liquid crystal display device includes a TFT part TP positioned at an intersection of the data line 34 and the gate line 32, and a drain of the TFT part TP. A pixel electrode 52 connected to the electrode 40 and a storage capacitor part SP positioned at an overlapping portion with the pixel electrode 52 and the gate line 32 of the previous stage are provided.

TFT부(TP)는 게이트라인(32)에 접속된 게이트전극(36), 데이터라인(34)에 접속된 소스전극(38) 및 드레인접촉홀(50)을 통해 화소전극(52)에 접속된 드레인전극(40)으로 이루어진다. 또한, TFT부(TP)는 게이트전극(36)에 공급되는 게이트전압에 의해 소스전극(38)과 드레인전극(40)간에 채널을 형성하기 위한 반도체층(44,46)을 더 구비한다. 이러한 TFT부(TP)는 게이트라인(32)으로부터의 게이트신호에 응답하여 데이터라인(34)으로부터의 데이터신호를 선택적으로 화소전극(52)에 공급한다.The TFT portion TP is connected to the pixel electrode 52 through the gate electrode 36 connected to the gate line 32, the source electrode 38 connected to the data line 34, and the drain contact hole 50. The drain electrode 40 is formed. The TFT portion TP further includes semiconductor layers 44 and 46 for forming a channel between the source electrode 38 and the drain electrode 40 by the gate voltage supplied to the gate electrode 36. The TFT portion TP selectively supplies the data signal from the data line 34 to the pixel electrode 52 in response to the gate signal from the gate line 32.

화소전극(52)은 데이터라인(34)과 게이트라인(32)에 의해 분할된 셀 영역에 위치하며 광투과율이 높은 투명무기도전물질로 이루어진다. 이 화소전극(52)은 드레인접촉홀(50)을 경유하여 공급되는 데이터신호에 의해 상부기판(도시하지 않음)에 형성되는 공통전극(도시하지 않음)과 전위차를 발생시키게 된다. 이 전위차에 의해 하부기판(31)과 상부기판(도시하지 않음) 사이에 위치하는 액정은 유전율이방성에 의해 회전하게 된다. 이에 따라, 광원으로부터 화소전극(52)을 경유하여 공급되는 광을 상부기판 쪽으로 투과되게 한다.The pixel electrode 52 is formed in a cell region divided by the data line 34 and the gate line 32 and is made of a transparent inorganic electroconductive material having high light transmittance. The pixel electrode 52 generates a potential difference from a common electrode (not shown) formed on the upper substrate (not shown) by the data signal supplied through the drain contact hole 50. Due to this potential difference, the liquid crystal located between the lower substrate 31 and the upper substrate (not shown) is rotated by the dielectric anisotropy. Accordingly, the light supplied from the light source via the pixel electrode 52 is transmitted to the upper substrate.

스토리지 캐패시터부(SP)는 화소전극(52)의 전압변동을 억제하는 역할을 하게 된다. 이러한 스토리지 캐패시터부(SP)는 게이트라인(32)과, 게이트절연막(42)을 사이에 두고 게이트라인(32)과 중첩되게 형성되는 스토리지전극(54)으로 이루어진다. 스토리지전극(54)은 보호막(48)에 형성된 스토리지접촉홀(56)을 통해 화소전극(52)과 전기적으로 접촉된다. 이러한 스토리지전극(54)은 도 6에 도시된 투명유기도전물질로 형성된다. 바람직하게는 폴리에틸렌디옥시티오펜(poly(3,4-ethylenedioxythiophene)으로 형성된다.The storage capacitor part SP plays a role of suppressing a voltage variation of the pixel electrode 52. The storage capacitor part SP includes a storage electrode 54 formed to overlap the gate line 32 with the gate line 32 and the gate insulating layer 42 therebetween. The storage electrode 54 is in electrical contact with the pixel electrode 52 through the storage contact hole 56 formed in the passivation layer 48. The storage electrode 54 is formed of a transparent organic electroconductive material shown in FIG. Preferably, it is formed of poly (3,4-ethylenedioxythiophene).

이러한 투명유기도전물질은 게이트절연막(42) 상에 스핀코팅방식으로 증착한 후 패터닝함으로써 형성된다. 이에 따라, 고가의 진공장비가 불필요한다. 또한, 종래의 빛이 투과되지 못한 표시영역과 스토리지전극(54)의 중첩영역에서 스토리전극을 투명유기도전물질로 형성함으로써 빛이 투과되어 개구율을 높일 수 있다.The transparent organic electroconductive material is formed by depositing a pattern on the gate insulating film 42 by spin coating. Accordingly, expensive vacuum equipment is unnecessary. In addition, since the story electrode is formed of a transparent organic conductive material in the overlapping region of the display region where the light does not pass through and the storage electrode 54, light may be transmitted to increase the aperture ratio.

도 7a 내지 도 7e는 도 5에 도시된 액정표시소자의 제조방법을 단계적으로 나타내는 단면도이다.7A to 7E are cross-sectional views sequentially illustrating a method of manufacturing the liquid crystal display device illustrated in FIG. 5.

도 7a를 참조하면, 하부기판(31) 상에 스퍼터링(sputtering) 등의 증착방법으로 게이트금속층이 증착된다. 게이트금속층으로는 알루미늄(Al) 또는 구리(Cu) 등이 형성된다. 이어서, 게이트금속층을 식각공정을 포함하는 포토리쏘그래피 공정으로 패터닝함으로써 게이트라인(32) 및 게이트전극(36)이 형성된다.Referring to FIG. 7A, a gate metal layer is deposited on the lower substrate 31 by a deposition method such as sputtering. Aluminum (Al), copper (Cu), or the like is formed as the gate metal layer. Subsequently, the gate line 32 and the gate electrode 36 are formed by patterning the gate metal layer by a photolithography process including an etching process.

도 7b를 참조하면, 게이트라인(32) 및 게이트전극(36)이 형성된 기판(31) 상에 게이트절연막(42)이 형성된다. 게이트절연막(42)은 무기절연물질인 산화실리콘(SiOx) 또는 질화실리콘(SiNx)이 사용된다. 게이트절연막(42)상에는 제1 및 제2 반도체층이 화학기상증착(Chemical Vapor Deposition) 방법으로 연속 증착된다. 제1 반도체층은 불순물이 도핑되지 않은 비정질실리콘으로 형성되며, 제2반도체층은 N형 또는 P형의 불순물이 도핑된 비정질실리콘으로 형성된다. 이어서, 제1 및 제2 반도체층이 건식식각(Dry Etching) 공정을 포함하는 포토리쏘그래피 방법으로 패터닝됨으로써 활성층(44) 및 오믹접촉층(46)이 형성된다.Referring to FIG. 7B, a gate insulating layer 42 is formed on the substrate 31 on which the gate line 32 and the gate electrode 36 are formed. The gate insulating layer 42 is formed of an inorganic insulating material, silicon oxide (SiOx) or silicon nitride (SiNx). First and second semiconductor layers are successively deposited on the gate insulating layer 42 by a chemical vapor deposition method. The first semiconductor layer is formed of amorphous silicon that is not doped with impurities, and the second semiconductor layer is formed of amorphous silicon that is doped with N-type or P-type impurities. Subsequently, the first and second semiconductor layers are patterned by a photolithography method including a dry etching process to form an active layer 44 and an ohmic contact layer 46.

도 7c를 참조하면, 활성층(44) 및 오믹접촉층(46)이 형성된 게이트절연막(32) 상에 스핀코팅으로 데이터금속층이 증착된다. 데이터금속층은 도 6에 도시된 투명유기도전물질로 이루어진다. 이어서, 데이터금속층은 식각 공정을 포함하는 포토리쏘그래피 공정으로 패터닝됨으로써 스토리지전극(54)과 소스전극(38) 및 드레인전극(40)이 형성된다. 그 다음, 소스전극(38)과 드레인전극(40) 사이로 노출된 오믹접촉층(46)이 건식식각 공정으로 제거되어 소스전극(38)과 드레인전극(40)을 분리시킨다. 오믹접촉층(46)이 일부 제거됨으로써 활성층(44)에서 소스 및 드레인전극(38,40)사이의 게이트전극(36)과 대응하는 부분은 채널이 된다.Referring to FIG. 7C, a data metal layer is deposited by spin coating on the gate insulating layer 32 on which the active layer 44 and the ohmic contact layer 46 are formed. The data metal layer is made of a transparent organic electroconductive material shown in FIG. Subsequently, the data metal layer is patterned by a photolithography process including an etching process to form the storage electrode 54, the source electrode 38, and the drain electrode 40. Next, the ohmic contact layer 46 exposed between the source electrode 38 and the drain electrode 40 is removed by a dry etching process to separate the source electrode 38 and the drain electrode 40. By partially removing the ohmic contact layer 46, the portion of the active layer 44 corresponding to the gate electrode 36 between the source and drain electrodes 38 and 40 becomes a channel.

도 7d를 참조하면, 스토리지전극(54), 소스 및 드레인전극(38,40)이 형성된 기판(31) 상에 보호막(48)이 형성된다. 보호막(48)의 재질로는 아크릴(Acryl)계 유기화합물, BCB(benzocyclobutene), PFCB(perfluorocyclobutane) 등의 유기 절연물질 또는 질화실리콘(SiNx), 산화실리콘(SiOx)등의 무기 절연물질 등이 이용된다. 보호막(48)이 건식식각 공정을 포함하는 포토리쏘그래피 공정으로 패터닝됨으로써 드레인전극(40)을 노출시키는 드레인접촉홀(50)과 스토리지전극(54)을 노출시키는 스토리지접촉홀(56)이 형성된다.Referring to FIG. 7D, a passivation layer 48 is formed on the substrate 31 on which the storage electrodes 54, the source and drain electrodes 38 and 40 are formed. As the material of the protective film 48, an organic insulating material such as an acryl-based organic compound, a benzocyclobutene (BCB), a perfluorocyclobutane (PFCB), or an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx) may be used. do. The protective layer 48 is patterned by a photolithography process including a dry etching process to form a drain contact hole 50 exposing the drain electrode 40 and a storage contact hole 56 exposing the storage electrode 54. .

도 7e를 참조하면, 보호막(48) 상에 스터퍼링(sputtering) 등과 같은 증착방법으로 투명전극층이 형성된다. 투명전극층의 재질로는 인듐-틴-옥사이드(Indium-Tin-Oxide : ITO), 인듐-징크-옥사이드(Indium-Zinc-Oxide : IZO) 또는 인듐-틴-징크-옥사이드(Indium-Tin-Zinc-Oxide : ITZO)으로 사용된다. 이어서, 투명전극층이 식각공정을 포함하는 포토리쏘그래피 공정으로 패터닝됨으로써 화소전극(52)이 형성된다. 화소전극(52)은 보호막(48) 상에 형성된 드레인접촉홀(50)을 통해 드레인전극(40)과 접속되며, 스토리지접촉홀(56)을 통해 스토리지전극(54)과 접속된다.Referring to FIG. 7E, the transparent electrode layer is formed on the passivation layer 48 by a deposition method such as sputtering. The material of the transparent electrode layer is Indium-Tin-Oxide (ITO), Indium-Zinc-Oxide (IZO) or Indium-Tin-Zinc- Oxide: ITZO). Subsequently, the pixel electrode 52 is formed by patterning the transparent electrode layer by a photolithography process including an etching process. The pixel electrode 52 is connected to the drain electrode 40 through the drain contact hole 50 formed on the passivation layer 48, and is connected to the storage electrode 54 through the storage contact hole 56.

상술한 바와 같이, 본 발명에 따른 액정표시소자 및 그 제조방법은 유기도전물질로 스토리지전극을 형성하게 된다. 유기도전물질로 형성된 스토리지전극과 중첩되는 화소전극에서 빛이 투과되므로 이 중첩영역까지 개구면적이 넓어져 개구율이 높아진다. 또한, 스토리지전극의 재료인 유기도전물질을 스핀코팅으로 증착함으로써 종래의 고가의 진공장비가 불필요하다.As described above, the liquid crystal display device and the method of manufacturing the same according to the present invention form a storage electrode with an organic conductive material. Since light is transmitted from the pixel electrode overlapping the storage electrode formed of the organic conductive material, the opening area is widened to the overlapping area, thereby increasing the aperture ratio. In addition, by depositing an organic conductive material which is a material of the storage electrode by spin coating, conventional expensive vacuum equipment is unnecessary.

이상 설명한 내용을 통해 당업자라면 본 발명의 기술사상을 일탈하지 아니하는 범위에서 다양한 변경 및 수정이 가능함을 알 수 있을 것이다. 따라서, 본 발명의 기술적 범위는 명세서의 상세한 설명에 기재된 내용으로 한정되는 것이 아니라 특허 청구의 범위에 의해 정하여져야만 할 것이다.Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (6)

기판 상에 형성되는 게이트라인과,A gate line formed on the substrate, 상기 게이트라인 상에 형성되는 게이트절연막과,A gate insulating film formed on the gate line; 상기 게이트절연막 상에 투명유기도전물질로 형성되는 스토리지전극과,A storage electrode formed of a transparent organic conductive material on the gate insulating layer; 상기 스토리지전극과 게이트절연막 상에 형성되는 보호층과,A protective layer formed on the storage electrode and the gate insulating layer; 상기 보호층에 접촉홀을 형성하여 상기 스토리지전극과 전기적으로 접촉되게 형성되는 화소전극을 구비하는 것을 특징으로 하는 액정표시소자.And a pixel electrode formed in contact with the storage electrode by forming a contact hole in the protective layer. 제 1 항에 있어서,The method of claim 1, 상기 투명유기도전물질은 폴리에틸렌디옥시티오펜(Poly(3,4-ethylenedioxythiophene), 폴리아세틸렌(Polyacetylene), 폴리피롤(Polypyrrole), 폴리티오펜(Polythiophene), 폴리페니렌 설피드(Polyphenylene sulfide), 폴리페니렌 바이닐렌(Polyphenylene vinylene), 폴리아줄렌(polyazulene), 폴리페닐렌(polyphenylene), 폴리아닐린(polyaniline), 폴리푸란(polyfuran), 폴리이스티아나펜틸렌(polyisothianaphthene) 및 폴리틸렌 바이닐렌(Polythienylene vinylene) 중 적어도 어느 하나인 것을 특징으로 하는 액정표시소자.The transparent organic conductive material is polyethylene dioxythiophene (Poly (3,4-ethylenedioxythiophene), polyacetylene (Polyacetylene), polypyrrole (Polypyrrole), polythiophene, polyphenylene sulfide (Polyphenylene sulfide), polypheny Among polyphenylene vinylene, polyazulene, polyphenylene, polyaniline, polyfuran, polyisothianaphthene and polythienylene vinylene At least one liquid crystal display device characterized in that. 제 1 항에 있어서,The method of claim 1, 상기 게이트라인과 접속되는 게이트전극과,A gate electrode connected to the gate line; 상기 스토리지전극과 동일물질로 형성되는 소스 및 드레인전극을 추가로 구비하는 것을 특징으로 하는 액정표시소자.And a source and a drain electrode formed of the same material as the storage electrode. 기판 상에 게이트라인을 형성하는 단계와,Forming a gate line on the substrate; 상기 기판 상에 게이트절연막을 형성하는 단계와,Forming a gate insulating film on the substrate; 상기 게이트절연막 상에 투명유기도전물질을 스핀코팅으로 증착한 후 패터닝하여 스토리지전극을 형성하는 단계와,Depositing a transparent organic electroconductive material on the gate insulating layer by spin coating and patterning to form a storage electrode; 상기 스토리지전극을 덮도록 보호층을 증착하고 패터닝하여 접촉홀을 형성하는 단계와,Depositing and patterning a protective layer to cover the storage electrode to form a contact hole; 상기 보호층 상에 상기 접촉홀을 통해 상기 스토리지전극과 전기적으로 접속되는 화소전극을 형성하는 단계를 포함하는 것을 특징으로 하는 액정표시소자의 제조방법.And forming a pixel electrode electrically connected to the storage electrode through the contact hole on the protective layer. 제 4 항에 있어서,The method of claim 4, wherein 상기 투명유기도전물질은 폴리에틸렌디옥시티오펜(Poly(3,4-ethylenedioxythiophene), 폴리아세틸렌(Polyacetylene), 폴리피롤(Polypyrrole), 폴리티오펜(Polythiophene), 폴리페니렌 설피드(Polyphenylene sulfide), 폴리페니렌 바이닐렌(Polyphenylene vinylene), 폴리아줄렌(polyazulene), 폴리페닐렌(polyphenylene), 폴리아닐린(polyaniline), 폴리푸란(polyfuran), 폴리이스티아나펜틸렌(polyisothianaphthene) 및 폴리틸렌 바이닐렌(Polythienylenevinylene) 중 적어도 어느 하나인 것을 특징으로 하는 액정표시소자의 제조방법.The transparent organic conductive material is polyethylene dioxythiophene (Poly (3,4-ethylenedioxythiophene), polyacetylene (Polyacetylene), polypyrrole (Polypyrrole), polythiophene, polyphenylene sulfide (Polyphenylene sulfide), polypheny At least of polyphenylene vinylene, polyazulene, polyphenylene, polyaniline, polyfuran, polyisothianaphthene and polythienylenevinylene A method for manufacturing a liquid crystal display device, characterized in that any one. 제 4 항에 있어서,The method of claim 4, wherein 상기 기판 상에 게이트라인에 접속되는 게이트전극을 형성하는 단계와,Forming a gate electrode connected to the gate line on the substrate; 상기 게이트절연막 상에 반도체층을 형성하는 단계와,Forming a semiconductor layer on the gate insulating film; 상기 스토리지전극과 동일물질로 소스 및 드레인전극을 형성하는 단계를 포함하는 것을 특징으로 하는 액정표시소자의 제조방법.And forming a source and a drain electrode from the same material as the storage electrode.
KR10-2001-0081773A 2001-12-20 2001-12-20 Liquid Crystal Display Device and Fabricating Method Thereof KR100485625B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR10-2001-0081773A KR100485625B1 (en) 2001-12-20 2001-12-20 Liquid Crystal Display Device and Fabricating Method Thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR10-2001-0081773A KR100485625B1 (en) 2001-12-20 2001-12-20 Liquid Crystal Display Device and Fabricating Method Thereof

Publications (2)

Publication Number Publication Date
KR20030050983A true KR20030050983A (en) 2003-06-25
KR100485625B1 KR100485625B1 (en) 2005-04-27

Family

ID=29576798

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2001-0081773A KR100485625B1 (en) 2001-12-20 2001-12-20 Liquid Crystal Display Device and Fabricating Method Thereof

Country Status (1)

Country Link
KR (1) KR100485625B1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101023718B1 (en) * 2003-12-29 2011-03-25 엘지디스플레이 주식회사 Liquid Crystal Display Device and method for fabricating the same
US8368856B2 (en) 2005-09-09 2013-02-05 Lg Display Co., Ltd. Transflective liquid crystal display device and method of fabricating the same
US8723770B2 (en) 2010-12-23 2014-05-13 Samsung Display Co., Ltd. Flat panel display apparatus

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5796121A (en) * 1997-03-25 1998-08-18 International Business Machines Corporation Thin film transistors fabricated on plastic substrates
KR19990003712A (en) * 1997-06-26 1999-01-15 김영환 Ultra high aperture liquid crystal display device and manufacturing method thereof
KR100262404B1 (en) * 1997-06-26 2000-08-01 김영환 Super high aperture lcd and method for fabricating the same
DE19754784B4 (en) * 1997-12-10 2004-02-12 Robert Bosch Gmbh Process for producing a matrix from thin-film transistors with storage capacities

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101023718B1 (en) * 2003-12-29 2011-03-25 엘지디스플레이 주식회사 Liquid Crystal Display Device and method for fabricating the same
US8368856B2 (en) 2005-09-09 2013-02-05 Lg Display Co., Ltd. Transflective liquid crystal display device and method of fabricating the same
US8723770B2 (en) 2010-12-23 2014-05-13 Samsung Display Co., Ltd. Flat panel display apparatus

Also Published As

Publication number Publication date
KR100485625B1 (en) 2005-04-27

Similar Documents

Publication Publication Date Title
KR100620847B1 (en) Array Substrate of Liquid Crystal Display and Fabricating Method Thereof
KR100456137B1 (en) Array Substrate of Liquid Crystal Display and Fabricating Method Thereof
CN101944535B (en) Array substrate for liquid crystal display device and methode of fabricating the same
CN100523970C (en) Array substrate for liquid crystal display device using organic semiconductor material and method of fabricating the same
US7170571B2 (en) Liquid crystal display device with double metal layer source and drain electrodes and fabricating method thereof
US7907228B2 (en) TFT LCD structure and the manufacturing method thereof
KR20030082651A (en) Thin film transistor array substrate and method of manufacturing the same
JP2007294851A (en) Array substrate for liquid crystal display utilizing organic semiconductor substance, and its manufacturing method
US20020085134A1 (en) Liquid crystal display device and fabricating method thereof
KR100886241B1 (en) Method Of Fabricating Liquid Crystal Display Device
KR100673331B1 (en) Liquid crystal display and method for fabricating the same
US8785264B2 (en) Organic TFT array substrate and manufacture method thereof
KR100799463B1 (en) Liquid Crystal Display Device and Fabricating Method Thereof
US6862051B2 (en) Liquid crystal display device and method of manufacturing the same
KR20050060963A (en) Thin film transistor array substrate and fabricating method thereof
KR100485625B1 (en) Liquid Crystal Display Device and Fabricating Method Thereof
US20040070698A1 (en) Liquid crystal display device and method of fabricating the same
KR100443829B1 (en) Array Substrate of Liquid Crystal Display Device and Fabricating Method Thereof
KR100512623B1 (en) array circuit board of LCD and fabrication method of thereof
KR101274695B1 (en) Thin Film Transistor Array Substrate
KR101097675B1 (en) Thin film transistor and fabricating method thereof
KR20060104146A (en) Method for manufacturing of poly-si tft array substrate
KR100397672B1 (en) an array panel for liquid crystal display and manufacturing method thereof
KR20080048606A (en) Thin film transistor substrate and manufacturing method thereof
KR100733876B1 (en) Liquid Crystal Display Device and Fabricating Method Thereof

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20120330

Year of fee payment: 8

FPAY Annual fee payment

Payment date: 20130329

Year of fee payment: 9

FPAY Annual fee payment

Payment date: 20160329

Year of fee payment: 12

FPAY Annual fee payment

Payment date: 20170320

Year of fee payment: 13

LAPS Lapse due to unpaid annual fee