KR20030043172A - Heat sink and semiconductor chip package comprising the same - Google Patents

Heat sink and semiconductor chip package comprising the same Download PDF

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Publication number
KR20030043172A
KR20030043172A KR1020010074209A KR20010074209A KR20030043172A KR 20030043172 A KR20030043172 A KR 20030043172A KR 1020010074209 A KR1020010074209 A KR 1020010074209A KR 20010074209 A KR20010074209 A KR 20010074209A KR 20030043172 A KR20030043172 A KR 20030043172A
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KR
South Korea
Prior art keywords
semiconductor chip
heat sink
holes
fins
substrate
Prior art date
Application number
KR1020010074209A
Other languages
Korean (ko)
Inventor
쉬에웬로
후앙닝
첸후이핀
치앙화웬
창추앙밍
투펭창
후앙푸유
창흐슈앙주이
후치아치에
레우웬-롱
Original Assignee
오리엔트 세미컨덕터 일렉트로닉스 리미티드
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Priority to KR1020010074209A priority Critical patent/KR20030043172A/en
Publication of KR20030043172A publication Critical patent/KR20030043172A/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Abstract

PURPOSE: A heat sink and a semiconductor chip package having the same are provided to be capable of keeping a predetermined interval between the heat sink and a semiconductor chip, and connecting the heat sink to the ground part. CONSTITUTION: A heat sink(15) includes a concave portion formed at the lower portion of the heat sink for enclosing at least one semiconductor chip(11) and a plurality of pins(151) prolonged from the edge portion of the lower surface of the heat sink. At this time, each pin includes a neck part(154), an enlarged head part(153), and an opening slot(152) for dividing the pin into the parts. Preferably, a substrate(14) having a plurality of through holes(142), is located at the lower portion of the heat sink. At this time, a ground circuit is connected with the substrate through the holes.

Description

방열판 및 그를 구비한 반도체 칩 패키지{Heat sink and semiconductor chip package comprising the same}Heat sink and semiconductor chip package comprising the same

본 발명은 방열판 및 그를 구비한 반도체 칩 패키지(semiconductor chip package)에 관한 것으로, 특히 동작 중 발생한 열을 신속하게 반도체 칩으로부터 이동시킬 수 있고, 노이즈(noise)를 여과할 수 있으며, 그리고 인덕턴스( inductance)를 감소시킬 수 있는 방열판 및 그를 구비한 반도체 칩 패키지에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heat sink and a semiconductor chip package having the same, and in particular, it is possible to quickly transfer heat generated during operation from a semiconductor chip, to filter noise, and to inductance. The present invention relates to a heat sink and a semiconductor chip package having the same.

도 1에서 나타낸 것처럼, 반도체 칩들을 위한 종래의 열분산 장치는 단순히기판(15') 위의 반도체 칩(1')을 덮고 있는 방열판(13')이다. 두 개의 금속 범프 (metal bump; 11')들은 반도체 칩(1')을 지지하기 위해 기판(15') 위에 배치된다. 열전도성 접착제(12')는 반도체 칩(1')의 상부와 방열판(13') 하부 사이에 채워진다. 방열판(13')의 하부면 가장자리는 접착제에 의해 기판(15')에 부착되어 있다. 도 2는 반도체 칩들을 위한 다른 종래의 열분산 장치를 설명한다. 나타낸 바와 같이, 반도체 칩(2')은 먼저 금와이어(golden wire; 21')들에 의해 기판(25')에 연결되며, 에폭시 수지(epoxy resin; 24')로 봉해지고, 에폭시 수지(24')의 상부에 열전도성 접착제(22')층이 도포되며, 그런 다음 열전도성 접착제(22') 위에 방열판(23')을 부착한다.As shown in Fig. 1, a conventional heat dissipation device for semiconductor chips is simply a heat sink 13 'covering the semiconductor chip 1' on the substrate 15 '. Two metal bumps 11 'are disposed on the substrate 15' to support the semiconductor chip 1 '. The thermally conductive adhesive 12 'is filled between the top of the semiconductor chip 1' and the bottom of the heat sink 13 '. The bottom edge of the heat sink 13 'is attached to the substrate 15' by an adhesive. 2 illustrates another conventional heat dissipation device for semiconductor chips. As shown, the semiconductor chip 2 'is first connected to the substrate 25' by golden wires 21 ', sealed with an epoxy resin 24', and an epoxy resin 24 '. A layer of thermally conductive adhesive 22 'is applied on top of the'), and then a heat sink 23 'is attached onto the thermally conductive adhesive 22'.

따라서, 본 발명은 열분산 효율을 향상시키고, 노이즈를 여과할 수 있으며, 인덕턴스를 감소시킬 수 있는 방열판 및 그를 구비한 반도체 칩 패키지의 제공을 그 목적으로 한다.Accordingly, an object of the present invention is to provide a heat sink capable of improving heat dissipation efficiency, filtering noise, and reducing inductance, and a semiconductor chip package having the same.

본 발명의 주된 목적은 방열판과 반도체 칩 또는 패키지 사이의 간격을 유지할 수 있는 방열판 및 그를 구비한 반도체 칩 패키지를 제공하는 것이다.It is a main object of the present invention to provide a heat sink and a semiconductor chip package having the same that can maintain a gap between the heat sink and the semiconductor chip or package.

본 발명의 또다른 목적은 그라운드(ground)에 연결된 방열판 및 그를 구비한 반도체 칩 패키지를 제공하는 것이다.Another object of the present invention is to provide a heat sink connected to ground and a semiconductor chip package having the same.

도 1은 반도체 칩(semiconductor chip)을 위한 열분산 장치의 첫번째 선행기술을 설명한다.1 illustrates a first prior art of a heat dissipation device for a semiconductor chip.

도 2는 반도체 칩을 위한 열분산 장치의 두번째 선행기술을 설명한다.2 illustrates a second prior art of a heat dissipation device for a semiconductor chip.

도 3a는 본 발명의 전개도이다.3A is an exploded view of the present invention.

도 3b는 본 발명의 조립도이다.3B is an assembly view of the present invention.

도 4는 본 발명과 인쇄 회로기판 사이의 접속을 설명한다.4 illustrates a connection between the present invention and a printed circuit board.

도면, 특히 도 3a 및 도 3b에 있어서, 본 발명은 일반적으로 방열판(15)과 기판(14)을 포함하고 있다. 방열판(15)은 안쪽 하부면에 오목한 부분(160)을 형성함으로 인한 거꾸로 된 U자 형태의 단면과 방열판(5)의 하부면 둘레 가장자리로부터 아래쪽으로 연장된 복수개의 핀(151)들을 가지고 있다. 핀(151)은 목부 (154), 확장 헤드부(153), 및 확장 헤드부(153)와 목부(154)를 두 부분으로 분리하고 있는 개방 슬롯(152)으로 형성되어 있다.In the drawings, in particular in FIGS. 3A and 3B, the invention generally comprises a heat sink 15 and a substrate 14. The heat sink 15 has an inverted U-shaped cross section due to the formation of the concave portion 160 on the inner bottom surface and a plurality of fins 151 extending downward from the peripheral edge of the bottom surface of the heat sink 5. The pin 151 is formed of a neck 154, an extension head 153, and an open slot 152 that separates the extension head 153 and the neck 154 into two parts.

기판(14)은 방열판(15)의 핀(151)들이 맞물릴 수 있는 크기와 위치를 갖는 복수개의 관통홀(142)을 형성하고 있다. 기판(14)은 관통홀(142)들에 연결되는 그라운드 회로를 제공한다. 기판(14)은 반도체 칩(11)들의 지지를 위해 그들 위에 복수개의 금속 범프(12)들을 제공한다. 열전도성 접착제(13)층은 반도체 칩(11)의 상부에 도포된다. 방열판(15)은 관통홀(142)들을 관통하여 연장되어 있는 핀(151)들과 열전도성 접착제(13)에 의해 반도체 칩(11)의 상부에 부착되는 오목 부분 (160)에 의해 기판(14)에 장착된다. 한편, 핀(151)들의 확장 헤드부(153)는 핀 (151)들의 목부(154)가 관통홀(142)들과 맞물려 있도록 하기 위해 관통홀(142)들을 통하여 삽입된다.(도 3a 및 도 3b 참조)The substrate 14 forms a plurality of through holes 142 having a size and a position where the fins 151 of the heat sink 15 may be engaged. The substrate 14 provides a ground circuit connected to the through holes 142. The substrate 14 provides a plurality of metal bumps 12 thereon for the support of the semiconductor chips 11. The layer of thermally conductive adhesive 13 is applied on top of the semiconductor chip 11. The heat sink 15 is formed of a substrate 14 by fins 151 extending through the through holes 142 and a concave portion 160 attached to the upper portion of the semiconductor chip 11 by the thermal conductive adhesive 13. ) Is mounted. On the other hand, the expansion head portion 153 of the pins 151 is inserted through the through holes 142 so that the neck portion 154 of the pins 151 is engaged with the through holes 142 (FIGS. 3A and 3). 3b)

동작 중의 반도체 칩(11)으로부터 발생한 열을 공기에 의해 냉각될 수 있는 방열판(15)으로 이동시키기 위하여 방열판(15)은 알루미늄(aluminum), 구리 또는 그와 비슷한 재료로 만드는 것이 바람직하다. 한편, 반도체 칩(11)으로부터 발생한 열은 관통홀(142)들을 통하여 그라운드 회로(141)로 이동할 것이다. 그라운드 회로(141)는 노이즈 여과와 인덕턴스 감소를 위해서도 사용된다.The heat sink 15 is preferably made of aluminum, copper or the like to transfer heat generated from the semiconductor chip 11 during operation to the heat sink 15 which can be cooled by air. Meanwhile, heat generated from the semiconductor chip 11 may move to the ground circuit 141 through the through holes 142. Ground circuit 141 is also used for noise filtration and inductance reduction.

더구나, 방열판(15)은 기판(14)에 부착되어 있기 때문에 반도체 칩(11)에 대한 뛰어난 압력 제어를 제공할 수 있고, 방열판(15)과 반도체 칩(11) 사이의 간격은 본 발명에 의한 분산 능력 내에서의 확보된 신뢰성에 의하여 고정된 값으로 유지될 것이다.Moreover, since the heat sink 15 is attached to the substrate 14, it is possible to provide excellent pressure control for the semiconductor chip 11, and the spacing between the heat sink 15 and the semiconductor chip 11 is It will be kept at a fixed value by the secured reliability within the dispersion capacity.

도 4에서 나타낸 것처럼, 반도체 칩 패키지(1)는 상부에 전기 회로(21)와 패드(22)들을 포함한 인쇄 회로 기판에 연결될 수도 있다. 설명한 것처럼, 반도체 칩 패키지(1) 하부면의 주석볼(143)들은 솔더링(soldering)에 의해 인쇄 회로 기판(2)의 패드(22)들에 결합된다. 더우기, 방열판(15)의 핀(151)들의 확장 헤드부(153)들은 전체적인 구조를 보강하고 분산 능력을 증가시키기 위하여 솔더링을 통해 인쇄 회로 기판의 패드(22)들에 결합될 수도 있다.As shown in FIG. 4, the semiconductor chip package 1 may be connected to a printed circuit board including an electrical circuit 21 and pads 22 thereon. As described, the tin balls 143 on the bottom surface of the semiconductor chip package 1 are coupled to the pads 22 of the printed circuit board 2 by soldering. Moreover, the expansion head portions 153 of the fins 151 of the heat sink 15 may be coupled to the pads 22 of the printed circuit board through soldering to reinforce the overall structure and increase the dispersing capacity.

이렇게, 본 발명에 의한 방열판 및 그를 구비한 반도체 칩 패키지의 구조에 따르면, 동작 중인 반도체 칩 패키지에서 발생한 열을 외부로 신속히 방출하여 열분산 효율을 향상시킬 수 있으며, 또한 방열판이 기판 상의 그라운드 회로에 연결되어 구성되므로 노이즈를 여과하고 인덕턴스를 감소시킬 수 있는 효과를 기대할 수 있다.Thus, according to the structure of the heat sink and the semiconductor chip package having the same according to the present invention, the heat dissipation efficiency can be improved by quickly dissipating heat generated in the semiconductor chip package in operation to the outside, and the heat sink is further provided to Because it is connected, it can be expected to filter noise and reduce inductance.

Claims (4)

적어도 하나의 반도체 칩을 덮기에 적합한 방열판에 관한 것이며, 상기 방열판은 적어도 하나의 반도체 칩을 덮기에 적합하도록 안쪽 하부면에 오목한 부분을 형성함으로 인한 거꾸로 된 U자 형태의 단면과 상기 하부면의 둘레 가장자리로부터 아래쪽으로 연장된 복수개의 핀들을 가지고 있으며, 상기 각 핀들은 목부, 확장 헤드부, 및 상기 목부와 상기 확장 헤드부를 두 부분으로 분리하는 개방 슬롯으로 형성되는 것을 특징으로 하는 방열판.A heat sink suitable for covering at least one semiconductor chip, wherein the heat sink is an inverted U-shaped cross section and a circumference of the bottom surface by forming a concave portion in the inner bottom surface to be suitable for covering the at least one semiconductor chip. And a plurality of fins extending downward from an edge, wherein each fin is formed of a neck, an extension head, and an open slot separating the neck and the extension head into two parts. 적어도 하나의 반도체 칩을 덮기에 적합하도록 안쪽 하부면에 오목한 부분을 형성함으로 인한 거꾸로 된 U자 형태의 단면과 상기 하부면의 둘레 가장자리로부터 아래쪽으로 연장된 복수개의 핀들을 가지며, 상기 각 핀들은 목부, 확장 헤드부 및 상기 목부와 상기 확장 헤드부를 두 부분으로 분리하고 있는 개방 슬롯으로 형성되는 방열판; 및It has an inverted U-shaped cross section by forming a concave portion in the inner bottom surface suitable for covering at least one semiconductor chip and a plurality of fins extending downward from the circumferential edge of the bottom surface, each of which has a neck portion. A heat dissipation plate formed of an expansion head part and an open slot separating the neck part and the expansion head part into two parts; And 상기 방열판의 상기 핀들이 맞물릴 수 있는 크기와 위치를 갖는 복수개의 관통홀들이 형성되며 반도체 칩의 지지를 위한 복수개의 금속범프들이 제공되는 기판;을 포함하며, 상기 열전도성 접착제가 상기 반도체 칩의 상부에 공급되고, 상기 관통홀들 및 상기 오목한 부분을 통하여 연장된 상기 핀들을 이용하여 상기 기판 위에 장착되는 상기 방열판이 상기 열전도성 접착제에 의해 상기 반도체 칩의 위에 부착되고, 상기 핀들의 상기 확장 헤드부들은 상기 관통홀들에 맞물리는 상기 핀들의 상기 목부들과 함께 상기 관통홀들을 통하여 삽입되는 것을 특징으로 하는 방열판을 구비한 반도체 칩 패키지.And a substrate having a plurality of through holes having a size and a position at which the fins of the heat sink can be engaged and provided with a plurality of metal bumps for supporting the semiconductor chip, wherein the thermally conductive adhesive is formed of the semiconductor chip. The heat dissipation plate, which is supplied to the upper side and mounted on the substrate using the fins extending through the through holes and the concave portion, is attached to the semiconductor chip by the thermally conductive adhesive, and the expansion head of the fins And a portion is inserted through the through holes together with the necks of the fins engaged with the through holes. 제 2 항에 있어서, 상기 기판은 상기 관통홀들에 연결된 그라운드 회로가 제공되는 것을 특징으로 하는 방열판을 구비한 반도체 칩 패키지.The semiconductor chip package of claim 2, wherein the substrate is provided with a ground circuit connected to the through holes. 제 2 항에 있어서, 상부에 전기 회로와 패드들을 포함하는 인쇄 회로 기판;을 더 포함하고, 상기 기판은 솔더링에 의해 상기 인쇄 회로 기판의 상기 패드들에 부착되는 주석볼이 제공된 하부면을 가지며,The printed circuit board of claim 2, further comprising: a printed circuit board including an electrical circuit and pads thereon, the substrate having a bottom surface provided with tin balls attached to the pads of the printed circuit board by soldering; 그리고, 전체적인 구조를 강화하고 분산 능력을 향상시키기 위해 상기 핀들의 상기 확장 헤드부들이 솔더링에 의하여 상기 인쇄 회로 기판의 상기 패드들에 부착되는 것을 특징으로 하는 방열판을 구비한 반도체 칩 패키지.And the expansion head portions of the fins are attached to the pads of the printed circuit board by soldering to reinforce the overall structure and improve the dispersion capability.
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KR100810491B1 (en) * 2007-03-02 2008-03-07 삼성전기주식회사 Electro component package and method for manufacturing thereof
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KR100693920B1 (en) * 2005-07-07 2007-03-12 삼성전자주식회사 Heat spreader, semiconductor package module and memory module having the heat spreader
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