KR20030041468A - Plasma display panel - Google Patents

Abstract

PURPOSE: A plasma display panel is provided to achieve improved luminance and efficiency by reducing damage of phosphor, while lowering a driving voltage. CONSTITUTION: A plasma display panel comprises a closed type barrier rib(56) formed on an upper substrate; a lower substrate opposed to the upper substrate with the closed type barrier rib disposed between the lower substrate and the upper substrate; and a plurality of electrodes formed on the lower substrate, and which cause discharge. The electrodes include the first electrode(52) formed on the lower substrate; and the second electrode(44) and the third electrode(46) which are formed in the direction crossing the first electrode.

Description

Plasma Display Panel

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat panel display, and more particularly, to a plasma display panel capable of improving luminance.

Plasma Display Panel (hereinafter referred to as "PDP") is a display that displays characters or graphics by using light generated by excitation of phosphors by 147 nm ultraviolet rays generated during discharge of He + Xe or Ne + Xe gas. Device. PDPs are attracting attention as next-generation display devices because they are not only thin and large in size, but also have greatly improved image quality due to recent technology development.

1 and 2, a discharge cell of a conventional three-electrode AC surface discharge type PDP includes an upper plate on which sustain electrode pairs 14 and 16, an upper dielectric layer 18, and a protective film 20 are formed, and an address electrode 22. ), The lower dielectric layer 24, the partition wall 26, and the lower plate on which the phosphor layer 28 is formed. The upper plate and the lower plate are spaced in parallel by the partition wall 26.

Each of the sustain electrode pairs 14 and 16 has a relatively wide width and transparent electrodes 14A and 16A made of transparent electrode material (ITO) for transmitting visible light, and a relatively narrow width and transparent electrodes 14A and 16A. In order to compensate for the resistive components of the metal electrodes 14B and 16B. The sustain electrode pairs 14 and 16 are composed of a scan / sustain electrode 14 and a common sustain electrode 16. The scan signal for panel scanning and the sustain signal for discharging sustain are mainly supplied to the scan / sustain electrode 14, and the sustain signal is mainly supplied to the common sustain electrode 16.

The upper dielectric layer 18 and the passivation layer 20 are stacked on the upper substrate 10 having the scan / sustain electrode 14 and the common sustain electrode 16 side by side.

Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 18. The protective film 20 prevents damage to the upper dielectric layer 18 due to sputtering generated during plasma discharge and increases discharge efficiency of secondary electrons. As the protective film 20, magnesium oxide (MgO) is usually used.

The lower dielectric layer 24 and the partition wall 26 are formed on the lower substrate 12 on which the address electrode 22 is formed, and the phosphor layer 28 is coated on the surfaces of the lower dielectric layer 24 and the partition wall 26.

The address electrode 22 is formed in the direction crossing the scan / sustain electrode 14 and the common sustain electrode 16.

The partition wall 26 is formed in parallel with the address electrode 22 to prevent the ultraviolet rays and the visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor 28 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red (R), green (G), and blue (B). Inert gas for gas discharge is injected into the discharge space provided between the upper substrate 10 / lower substrate 12 and the partition wall 26.

The PDP discharge cell of this structure is selected by the counter discharge between the address electrode 22 and the scan / sustain electrode 14, and then sustains the discharge by the surface discharge between the sustain electrode pairs 14 and 16. In the discharge cell, the fluorescent substance 28 emits light by ultraviolet rays generated during sustain discharge, so that visible light is emitted outside the cell to display an image.

Since the phosphor 28 of the conventional PDP is formed on the lower substrate 12, the address period is damaged. In addition, the bus electrodes 14B and 16B constituting the sustain electrode pairs 14 and 16 of the upper substrate 10 generally occupy about 1/5 or more of the discharge cell area seen by the upper substrate 10. Since the bus electrodes 14B and 16B block most of the light incident on the bus electrodes 14B and 16B, there is a problem that the luminance is reduced.

Accordingly, an object of the present invention is to provide a plasma display panel capable of improving the brightness.

1 is a perspective view showing a conventional plasma display panel.

FIG. 2 is a cross-sectional view illustrating the plasma display panel shown in FIG. 1. FIG.

3 is a plan view showing a plasma display panel according to the present invention;

4A and 4B are perspective views respectively showing an upper plate and a lower plate of the plasma display panel shown in FIG. 3.

FIG. 5 is a plan view showing another embodiment of first and second bus lines of the plasma display panel shown in FIG. 3; FIG.

6A to 6F illustrate wall charges formed during the sustaining period of the plasma display panel shown in FIGS. 3 and 5.

7A and 7B are waveform diagrams showing a holding period of a plasma display panel according to the present invention.

<Description of the symbols for the main parts of the drawings>

10,40: upper substrate 12,42: lower substrate

14 scanning / holding electrode 16 common holding electrode

18, 24, 48, 54: dielectric layer 20: protective film

22: address electrode 26, 56: partition wall

28,58: phosphor 44: second electrode

46: third electrode 52: first electrode

In order to achieve the above objects, the plasma display panel according to the present invention is a closed partition formed on the upper substrate, a lower substrate formed opposite the upper substrate with the partition therebetween, is formed on the lower substrate, discharge It is provided with a plurality of electrodes for generating.

The plurality of electrodes may include a first electrode formed on a lower substrate, and second and third electrodes formed in a direction crossing the first electrode.

The plasma display panel further includes a first dielectric layer formed on the lower substrate to cover the first electrode, and a second dielectric layer formed on the first dielectric layer to cover the second and third electrodes. .

A phosphor for generating visible light is formed on the partition.

The closed partition is formed in a hexagonal shape.

The first to third electrodes are formed to alternately correspond to one surface of the partition wall, respectively.

The first to third electrodes are formed of a material having a relatively high conductivity.

Other objects and advantages of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 3 to 7.

3 to 4B, the plasma display panel according to the present invention includes an upper plate UP in which the closed partition 38 is formed, and a lower plate in which the first to third electrodes 32, 44, and 46 are formed. DP). The upper plate UP and the lower plate DP are spaced apart in parallel by the partition wall 38.

The upper plate UP is formed with a partition wall 56 and a phosphor layer 58 on the upper substrate 40.

The partition wall 56 is a closed partition wall, and as shown in FIG. 3, one cell is formed in a hexagonal shape surrounded by six surfaces. In addition, it may be formed in a polygonal shape including a quadrangle.

As a result, the coating area of the phosphor 58 formed on the partition wall 56 is increased, and the reflectance of the partition wall 58 is increased to improve luminance. In addition, a predetermined gap may be formed in each vertex region of the partition wall 56 so as to smoothly exhaust or inject gas. The partition wall 56 prevents ultraviolet rays and visible light generated by the discharge from leaking into the adjacent discharge cells.

The phosphor 58 is formed on the partition wall 56 and the upper substrate 40, and is excited by ultraviolet rays generated during plasma discharge to display visible light of any one of red (R), green (G), and blue (B). Will occur. Since the phosphor 58 is formed on the upper plate UP, the loss of the phosphor 58 by plasma is prevented.

As such, since the conventional sustain electrode pair, the upper dielectric layer, and the protective layer are not formed on the upper substrate 40, visible light generated during discharge may pass through the upper substrate 40 without light loss.

The lower plate DP includes a first bus line BL1 formed on the lower substrate 42 and second and third bus lines BL2 and BL3 formed to intersect the first bus line BL1. .

The first to third electrodes 52, 44, and 46 protrude from the first to third bus lines BL1, BL2, and BL3 so as to correspond to one surface of the hexagonal partition wall 56 formed on the upper substrate 40. Is formed. Since the first to third electrodes 52, 44, and 46 are all formed on the lower substrate 42, the conductivity is low, and thus the bus electrodes are formed of high conductivity instead of transparent electrodes, which decrease the uniformity of the panel. .

The first and second bus lines BL1 and BL2 may be formed in a zigzag form along the partition wall 56 as shown in FIG. 5.

Between the first bus line BL1 and the second and third bus lines BL2 and BL3 for electrical insulation between the first bus line BL1 and the second and third bus lines BL2 and BL3, One dielectric layer 48 is formed. The second dielectric layer 54 is formed on the second and third bus lines BL2 and BL3. The second dielectric layer 54 together with the first dielectric layer 48 serves to accumulate wall charges during discharge.

Inert gas for gas discharge is injected into the discharge space provided between the upper substrate 40 / lower substrate 42 and the partition wall 56.

The PDP discharge cell having this structure is selected by opposing discharge between the first electrode 52 and the second electrode 44 or the third electrode 46 and then discharged by the surface discharge between the second and third electrodes 44 and 46. Will be maintained. In the discharge cell, the phosphor 58 emits light by ultraviolet rays generated during sustain discharge, so that visible light is emitted to the outside of the cell via the upper substrate 40 to display an image.

6A to 6F illustrate wall charge distributions formed during sustain discharge.

As shown in FIG. 6A, wall charges of the discharge cells when the power is turned off form positive wall charges on the second and third electrodes 44 and 46, and negative wall charges on the first electrode 52. Is formed. When power is applied to the third electrode 46 in this state, discharge occurs as shown in FIG. 6B. At this time, since the wall voltage is largely formed on the second electrode 44 which discharged due to the pulse in the previous subfield, a strong discharge occurs while the third electrode 46 has the same polarity as the first electrode 52. ) And a third discharge occurs between the third electrode 46.

After the discharge, as shown in FIG. 6C, negative wall charges are formed on the third electrode 46, and positive wall charges are formed on the first and second electrodes 52 and 44.

In detail, a large amount of electrons accumulates quickly in the third electrode 46 having high electron mobility. In addition, although the ions were accumulated in the first electrode 52 even before the voltage was applied to the third electrode 46, the ions accumulated in the discharge generated by the pulse applied to the third electrode 46, resulting in more accumulation of ions. When a pulse is applied to the first electrode 52, a stronger discharge may be generated. In addition, there is an advantage that can further reduce the pulse width. Thereafter, as shown in FIGS. 6D to 6F, the pulse is applied while rotating to stably maintain the discharge.

7A and 7B are waveform diagrams showing driving waveforms during a sustaining period of the plasma display panel according to the present invention.

The PDP is driven by dividing one frame into several subfields having different number of discharge times in order to express gray level of an image. Each subfield is further divided into a reset period for generating discharge uniformly, an address period for selecting a discharge cell, and a sustain period for expressing gradation according to the number of discharges. The reset period is a period for initializing the discharge cells, the address period is a period for causing selective address discharge according to the logic value of the video data, and the sustain period is a period for maintaining discharge in the discharge cells in which the address discharge has occurred. to be.

In the sustain period, as shown in FIG. 7A, the first to third sustain pulses SUSP1, SUSP2, and SUSP3 are alternately supplied to the first to third electrodes 52, 44, and 46 to sustain discharge during the sustain period. The desired gradation is displayed.

Alternatively, as shown in FIG. 7B, after the first sustain pulse SSUS1 is supplied to the first electrode 52, the second sustain pulse is applied to the second electrode 44 so as to overlap the first sustain pulse SSUS1 for a predetermined period of time. Supply (SUSP2). After supplying the second sustain pulse SSUS2, the third sustain pulse SUSP3 is supplied to the third electrode 46 to overlap the second electrode 44 for a predetermined period of time. Accordingly, the sustain discharge is maintained for the sustain period so that the desired gray scale is displayed.

As described above, the plasma display panel according to the present invention can reduce damage to the phosphor by forming three electrodes for discharging on the lower substrate, thereby improving luminance and efficiency. In addition, since all three electrodes can be used in the sustaining period, the ion wall charge formation time that is slower than that of the former can be increased. As a result, the wall voltage is increased to lower the driving voltage and the efficiency is increased.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (7)

A closed partition wall formed on the upper substrate, A lower substrate formed to face the upper substrate with the partition therebetween; And a plurality of electrodes formed on the lower substrate and configured to generate a discharge. The method of claim 1, The plurality of electrodes A first electrode formed on the lower substrate; And second and third electrodes formed in a direction crossing the first electrode. The method of claim 2, A first dielectric layer formed on the lower substrate to cover the first electrode; And a second dielectric layer formed on the first dielectric layer to cover the second and third electrodes. The method of claim 1, And a phosphor for generating visible light on the partition wall. The method of claim 2, The closed barrier rib is formed in a hexagonal shape plasma display panel. The method of claim 5, And the first to third electrodes are alternately formed on one surface of the partition wall. The method of claim 2, And the first to third electrodes are formed of a material having a relatively high conductivity.