KR20030040952A - Method of observing for oxidation induced stacking fault region - Google Patents

Method of observing for oxidation induced stacking fault region Download PDF

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Publication number
KR20030040952A
KR20030040952A KR1020010071629A KR20010071629A KR20030040952A KR 20030040952 A KR20030040952 A KR 20030040952A KR 1020010071629 A KR1020010071629 A KR 1020010071629A KR 20010071629 A KR20010071629 A KR 20010071629A KR 20030040952 A KR20030040952 A KR 20030040952A
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oxygen
heat treatment
etching
silicon wafer
temperature
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KR1020010071629A
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Korean (ko)
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이순현
허승무
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주식회사 실트론
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Publication of KR20030040952A publication Critical patent/KR20030040952A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Abstract

PURPOSE: A method of observing for oxidation induced stacking fault region is provided to measure correctly the oxidation induced stacking fault region by etching selectively a heat-treated wafer. CONSTITUTION: A thermal process is performed under the low temperature in order to form oxygen-precipitation nuclei. The thermal process is performed under a high temperature in order to grow the oxygen-precipitation nuclei. A silicon wafer etch process is performed during a predetermined time. An etching different between a silicon wafer and an oxidation induced stacking fault(10) is generated by etching the silicon wafer. A low temperature thermal process is performed during 1 to 10 hours within a furnace with the temperature of 500 to 900 degrees centigrade. A high temperature thermal process is performed during 10 to 24 hours within the furnace with the temperature of 1000 to 1100 degrees centigrade.

Description

산소적층결함 영역을 측정하는 방법{Method of observing for oxidation induced stacking fault region}Method of observing for oxidation induced stacking fault region

본 발명은 실리콘 웨이퍼의 산소적층결함 영역을 조사하는 방법에 관한 것으로서, 특히 웨이퍼 내에 형성된 산소적층결함 영역을 고가의 측정장비 없이 화학적인 식각으로도 산소적층결함 영역을 확인하는 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for investigating an oxygen lamination defect region of a silicon wafer, and more particularly, to a method for identifying an oxygen lamination defect region formed by chemical chemical etching of an oxygen lamination defect region formed in a wafer without expensive measuring equipment.

일반적으로 실리콘 단결정 잉곳은 초크랄스키(Czochralski. CZ) 방법으로 성장시킨다. 초크랄스키 방법은 실리콘 다결정 원자재를 용융하여 실리콘 융액을 형성하고, 종결정(Seed)을 실리콘 융액에 담근 후 종결정을 일정한 속도로 당겨 실리콘 단결정 잉곳을 성장시킨다.Silicon single crystal ingots are generally grown by the Czochralski (CZ) method. The Czochralski method melts a silicon polycrystalline raw material to form a silicon melt, soaks a seed crystal into the silicon melt, and pulls the seed crystal at a constant rate to grow a silicon single crystal ingot.

이때 실리콘 단결정 잉곳 내부에는 각종 성장결함이 형성된다. 이러한 성장 결함들은 실리콘 잉곳 성장시 주어지는 실리콘 융액의 온도, 실리콘 단결정 잉곳을 성장시키는 속도 및 실리콘 단결정 잉곳을 성장시키는 장치등과 같은 실리콘 단결정 잉곳을 성장시키는 성장 조건의 변화에 따라 실리콘 단결정 잉곳 내부에 형성되는 내부 결함들의 분포도 변화하게 된다.At this time, various growth defects are formed in the silicon single crystal ingot. These growth defects are formed inside the silicon single crystal ingot according to the change of growth conditions for growing the silicon single crystal ingot, such as the temperature of the silicon melt given during the silicon ingot growth, the speed of growing the silicon single crystal ingot, and the device for growing the silicon single crystal ingot. The distribution of internal defects that occur is also changed.

즉, 실리콘 단결정 잉곳을 성장시키는 인상 속도를 느리게 하거나 성장계면의 온도구배를 크게할 수록 산소적층결함 영역이 잉곳의 중심쪽으로 수축되어 형성된다.That is, as the pulling rate of growing the silicon single crystal ingot is slowed down or the temperature gradient of the growth interface is increased, the oxygen deposition defect region is contracted toward the center of the ingot.

이러한 성장조건 변화에 따라 산소적층결함 영역의 반경이 변하는 것은 격자간 실리콘이나 공공등의 점결함 분포변화에도 관련이 된다.The change in the radius of the oxygen lamination defect due to the change of growth conditions is related to the change in the point defect distribution of silicon or vacancy between lattice.

이와같은 결함들은 산소적층결함 영역의 위치를 기준으로 산소적층결함 영역의 내, 외부 영역에서의 미세 성장 결함 분포가 완전히 다른 양상을 보이게 되는데 산소적층결함 영역의 내부는 공공(vacancy)결함이 분포하고 산소적층결함 영역의 외부는 격자간(interstitial) 결함이 분포된다.These defects show a completely different distribution of micro growth defects in the inner and outer regions of the oxygen deposition defect region based on the position of the oxygen deposition defect region. Outside of the oxygen lamination defect region, interstitial defects are distributed.

따라서, 산소적층결함 영역의 제어는 성장결함제어와 관련해서도 중요한 의미를 가지므로 산소적층결함 영역을 확인하기 위한 여러 가지 방법들이 개발되었다. 산소 적층결함 영역을 확인하는 방법으로 실리콘 웨이퍼에 산소석출물(oxygen Precipitates) 및 산소적층결함 영역을 열처리로 형성시킨 뒤 엑스레이(X-Ray)나 라이프타임맵(lifetime map) 측정 장비를 통해 확인하였다.Therefore, since the control of the oxygen deposition defect region has an important meaning in relation to the growth defect control, various methods for identifying the oxygen deposition defect region have been developed. Oxygen precipitates and oxygen deposition defect regions were formed by heat treatment on the silicon wafer as a method of confirming the oxygen deposition defect regions, and then confirmed through X-ray or a life map measurement equipment.

그러나 이들 장치들은 고가의 장비이고 산소적층결함 영역을 측정하는데 필요한 시간이 8시간이상으로 장시간인 문제점이 있었다.However, these devices are expensive equipment and have a problem that the time required to measure the oxygen deposition defect area is longer than 8 hours.

도1은 미세 산소석출핵을 형성하고 성장시키는 열처리 온도구배를 도시한 그래프이고 도 2는 종래 기술에 따라 산소적층결함 영역이 측정된 사진이다.1 is a graph showing a heat treatment temperature gradient for forming and growing fine oxygen precipitation nuclei, and FIG. 2 is a photograph in which an oxygen deposition defect region is measured according to the prior art.

도2는 도1에서와 같이 실리콘 웨이퍼를 열처리하여 산소석출물 및 산소 적층결함을 형성한 뒤에 μ-PCD 라이프타임 맵을 이용하여 실리콘 웨이퍼의 산소적층결함 영역을 측정한 결과이다. 도2에서 라이프 타임이 높게 나타나는 영역(붉은 색으로 표시)이 산소적층결함 영역을 나타낸다.FIG. 2 is a result of measuring an oxygen deposition defect region of a silicon wafer by using a μ-PCD life map after forming an oxygen precipitate and an oxygen deposition defect by heat treating the silicon wafer as shown in FIG. 1. In FIG. 2, the region where the life time is high (marked in red) represents the oxygen lamination defect region.

따라서, 본 발명은 이와 같은 문제점을 해결하기 위한 것으로 고가의 장비를 이용하여 장시간에 걸쳐서 산소적층 결함 영역을 확인하지 않고 육안으로도 용이하게 확인할 수 있도록 함을 목적으로 한다.Accordingly, an object of the present invention is to solve such problems and to make it easy to visually check the oxygen deposition defect region for a long time using expensive equipment.

상기한 목적을 달성하기 위한 본 발명에 따른 산소적층결함 영역을 측정하는 방법은 실리콘 웨이퍼에 산소석출의 핵을 형성시키는 저온 열처리 단계와, 상기 산소 석출핵을 성장시키는 고온 열처리 단계와, 상기 저온 및 고온 열처리된 웨이퍼를 소정시간 식각하여 실리콘 웨이퍼의 실리콘과 산소적층결함 영역의 식각차를 발생시키는 식각 단계를 포함하여 이루어진다.According to the present invention, there is provided a method for measuring an oxygen deposition defect region according to the present invention, including a low temperature heat treatment step of forming an oxygen precipitation nucleus on a silicon wafer, a high temperature heat treatment step of growing the oxygen precipitation nucleus, and the low temperature and An etching step of etching the hot-heat-treated wafer for a predetermined time to generate an etching difference between the silicon and the oxygen lamination defect region of the silicon wafer.

상기 저온 열처리 단계 열처리는 열처리로의 온도를 500~900℃의 범위로 유지하며 1~10시간 동안 열처리하며, 고온 열처리 단계 열처리는 열처리로의 온도를 1000~1100℃의 범위로 유지하며 10~24시간 동안 열처리하는 것이 바람직하다.The low temperature heat treatment step heat treatment maintains the temperature of the heat treatment furnace in the range of 500 ~ 900 ℃ and heat treatment for 1 to 10 hours, the high temperature heat treatment step heat treatment maintains the temperature of the heat treatment furnace in the range of 1000 ~ 1100 ℃ and 10 ~ 24 It is preferable to heat-treat for time.

또한, 상기 식각은 30분 ~ 400분의 범위로 실시하는 것이 바람직하다.In addition, the etching is preferably carried out in the range of 30 minutes to 400 minutes.

도 1은 산소석출핵을 형성하고 성장시키는 열처리 온도구배를 도시한 그래프.1 is a graph showing a heat treatment temperature gradient for forming and growing oxygen precipitate nuclei.

도 2는 종래 기술에 따라 산소적층결함 영역이 측정된 사진.Figure 2 is a photograph of the oxygen lamination defect area is measured according to the prior art.

도 3은 본 발명에 따른 식각 시간에 따른 산소적층결함 영역이 측정된 사진.Figure 3 is a photograph of the oxygen laminated defect region measured according to the etching time in accordance with the present invention.

*도면의 주요부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *

10 : 산소적층결함 띠(Ring-OiSF) 12 : 가는 홈 물결무늬(Striation Pattern)10: Ring-OiSF 12: Thinning Strip Pattern

본 발명은 실리콘 웨이퍼에 산소석출 핵을 형성시키는 저온 열처리 단계와, 상기 산소 석출 핵을 성장시키는 고온 열처리 단계와, 상기 저온 및 고온 열처리된 웨이퍼를 소정시간 식각하여 실리콘 웨이퍼의 실리콘과 산소적층결함의 식각차를 발생시키는 식각 단계를 포함하여 이루어진다.The present invention provides a low temperature heat treatment step of forming an oxygen precipitation nucleus on a silicon wafer, a high temperature heat treatment step of growing the oxygen precipitation nuclei, and etching the low temperature and high temperature heat treated wafers for a predetermined time to eliminate silicon and oxygen deposition defects of the silicon wafer. And an etching step of generating an etching difference.

이하, 첨부된 도면을 참조하여 상세히 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail.

먼저 초크랄스키(CZ) 방법 또는 플래트존(FZ) 방법으로 실리콘 단결정 잉곳을 성장시킨다. 성장된 실리콘 단결정 잉곳을 슬라이싱한 후 래핑, 에칭등과 같은 각종 성형 공정을 실시한다.First, silicon single crystal ingots are grown by the Czochralski (CZ) method or the PlatZon (FZ) method. After slicing the grown silicon single crystal ingot, various molding processes such as lapping and etching are performed.

그리고 성형 공정이 완료된 웨이퍼를 폴리싱하여 반도체 디바이스가 형성될 웨이퍼 표면을 경면화한다. 마지막으로 폴리싱이 완료된 웨이퍼를 세정하여 각각의 과정으로부터 발생되는 불순물들을 제거하여 실리콘 웨이퍼를 형성한다.The wafer on which the molding process is completed is polished to mirror the surface of the wafer on which the semiconductor device is to be formed. Finally, the polished wafer is cleaned to remove impurities from each process to form a silicon wafer.

이와같이 형성된 실리콘 웨이퍼의 산소적층결함 영역을 측정하기 위해서 도1에서와 같이 실리콘 웨이퍼에 고온 열처리 및 저온 열처리의 2단계 열처리를 진행한다.In order to measure the oxygen lamination defect region of the silicon wafer thus formed, two-step heat treatment of high temperature heat treatment and low temperature heat treatment is performed on the silicon wafer as shown in FIG. 1.

2단계 열처리 중 우선, 실리콘 웨이퍼에 저온 열처리를 실시하여 산소 석출핵을 형성한다. 저온 열처리는 열처리 로의 온도를 500~900℃의 낮은 온도범위로 유지하며 1~10시간 동안 실시한다. 이때 산소석출핵은 계속 형성되어 밀도가 증가하지만 산소적층결함의 핵은 더 이상 형성되지 않으므로 상대적으로 산소석출핵에 비해 산소적층결함의 핵의 밀도가 더 낮다.During the two-step heat treatment, the silicon wafer is first subjected to low temperature heat treatment to form an oxygen precipitation nucleus. Low temperature heat treatment is carried out for 1 to 10 hours while maintaining the temperature of the heat treatment furnace in the low temperature range of 500 ~ 900 ℃. At this time, the oxygen precipitation nuclei continue to form and increase in density, but since the nuclei of oxygen deposition defects are no longer formed, the density of the nuclei of oxygen deposition defects is relatively lower than that of oxygen deposition defects.

이후 고온 열처리를 실시하여 산소 석출핵을 성장시켜 산소 석출물을 형성시킨다. 고온 열처리는 열처리로의 온도를 1000~1100℃의 높은 온도범위에서 10~24시간동안열처리한다.Thereafter, high temperature heat treatment is performed to grow oxygen precipitate nuclei to form oxygen precipitates. The high temperature heat treatment heats the temperature of the furnace for 10 to 24 hours at a high temperature range of 1000 to 1100 ° C.

고온 열처리 및 저온 열처리가 끝난 웨이퍼에 선택적 식각을 30분 이상 진행한다. 바람직하게는 세코식각(secco etching) 이나 라이트 식각(wright etching)을 실시한다.Selective etching is performed on the wafer after high temperature and low temperature heat treatment for 30 minutes or more. Preferably, secco etching or light etching is performed.

세코 식각은 플루오르화수소(HF), 중크롬산칼륨(1/2Cr2O3) 및 탈이온수로 이루어진 식각액에 담궈 식각되도록 하는 방법이다.Saeco etching is a method for etching by dipping in an etchant consisting of hydrogen fluoride (HF), potassium dichromate (1 / 2Cr 2 O 3 ) and deionized water.

도3은 본 발명에 따른 식각시간에 따른 산소적층결함 영역을 도시한 사진으로 도3a에서와 같이 식각을 30분 이하로 실시할 경우 식각률에 의한 식각차가 아직 미미하여 산소적층결함 영역(10)확인할 수 없으므로 최소한 30분은 식각을 실시한다.FIG. 3 is a photograph showing an oxygen deposition defect region according to an etching time according to the present invention. When etching is performed for 30 minutes or less, as shown in FIG. 3A, an etching difference due to an etching rate is still insignificant, and thus an oxygen deposition defect region 10 may be identified. As a result, etch for at least 30 minutes.

따라서, 도3b 내지 도 3c에서와 같이 식각 시간이 30분 이하(non-etching)에서 30분(도3b), 100분(도3c), 200분(도3d)으로 길어질수록 산소적층결함 영역은 시간과 비례하여 선명하게 나타나므로 식각은 30분 ~400분 사이의 범위에서 실시하여 산소적층결함(10)영역과 가는 홈 물결무늬(12)를 육안으로 구분할 수 있다.Therefore, as shown in FIGS. 3B to 3C, as the etching time increases from 30 minutes (FIG. 3B), 100 minutes (FIG. 3C), and 200 minutes (FIG. 3D) to 30 minutes (non-etching), Since it appears clearly in proportion to time, etching may be performed in a range of 30 minutes to 400 minutes to distinguish the oxygen lamination defect 10 region and the thin groove wave pattern 12 with the naked eye.

또한, 본 발명에 따른 검출법으로 확인된 산소적층결함 영역은 도2의 종래의 라이프타임 측정기를 이용하여 측정한 것과 일치함을 알 수 있다.In addition, it can be seen that the oxygen lamination defect region identified by the detection method according to the present invention is consistent with that measured using the conventional lifetime meter of FIG. 2.

이와 같은 방법으로 산소적층결함 영역을 확인할 수 있는 것은 실리콘 웨이퍼에 선택적 식각을 실시하면 실리콘 웨이퍼내의 실리콘과 산소석출물간의 식각율 차이에 의해 미세한 함몰성 결함이 형성된다.In this way, the oxygen lamination defect region can be identified by the selective etching of the silicon wafer, the fine recessed defects are formed by the difference in the etching rate between the silicon and the oxygen precipitates in the silicon wafer.

이런 미세한 함몰성 결함은 식각 시간이 증가하여도 제거되지 않고 계속 잔존하며, 이미 형성된 미세 산소석출물과 함께 공존함으로써 식각 시간이 점점 증가할수록 산소석출물의 밀도가 계속해서 증가하게 되고, 따라서 상대적으로 밀도가 낮은 산소적층결함 영역은 산소석출물의 밀도가 증가하는 영역과 구분되게 된다.These fine recessive defects remain unremoved even with increasing etching time, and coexist with the already formed fine oxygen precipitates, and as the etching time increases, the density of the oxygen precipitates continues to increase, so that the density is relatively low. The low oxygen lamination region is distinguished from the region where the density of oxygen precipitates increases.

따라서, 화학적 식각을 통해 미세 산소석출물의 결함 밀도를 높여주어 상대적으로 밀도가 낮은 산소적층결함 영역을 기타 장비 없이 육안으로 간단하게 확인할 수 있다.Therefore, by increasing the defect density of the fine oxygen precipitates through chemical etching, the relatively low density of the oxygen deposition defects can be easily identified with the naked eye without any other equipment.

종래에 산소적층결함 영역의 확인을 위해 라이프타임 측정기나 엑스레이등의 고가의 장비를 이용하여 측정하여 시간이 8시간 정도의 긴 시간이 필요하였으나 본 발명에 따른 열처리 된 실리콘 웨이퍼를 선택적 식각함으로써 고가의 장비를 사용하지 않아도 더욱 선명하고, 정확하게 측정할 수 있으며 산소적층결함 영역을 측정하기 위해 필요한 시간과 비용을 확실히 줄여주는 효과를 갖는다.Conventionally, a long time of about 8 hours is required by using an expensive equipment such as a life-time measuring instrument or X-ray to confirm the oxygen deposition defect area, but it is expensive by selectively etching the heat-treated silicon wafer according to the present invention. Clearer, more accurate measurements can be made without the use of equipment, and the effect is to significantly reduce the time and cost required to measure oxygen deposition defects.

즉, 화학적 식각을 통한 산소석출물, 가는 홈 물결무늬(Striation Pattern) 및 산소적층결함 영역등의 서로 다른 결함영역을 육안으로 관찰할 수 있다.That is, different defect regions such as oxygen precipitates, thin groove pattern, and oxygen stacked defect regions through chemical etching can be visually observed.

Claims (4)

실리콘 웨이퍼에 산소 석출핵을 형성시키는 저온 열처리 단계와,A low temperature heat treatment step of forming oxygen precipitation nuclei on the silicon wafer, 상기 산소 석출핵을 성장시키는 고온 열처리 단계와,A high temperature heat treatment step of growing the oxygen precipitation nuclei, 상기 저온 및 고온 열처리된 웨이퍼를 소정시간 식각하여 실리콘 웨이퍼의 실리콘과 산소적층결함의 식각차를 발생시키는 식각 단계를 포함하는 것을 특징으로 하는 산소적층결함 영역을 측정하는 방법.And etching the low-temperature and high-temperature heat-treated wafers for a predetermined time so as to generate an etching difference between silicon and oxygen lamination defects of the silicon wafer. 제1항에 있어서,The method of claim 1, 상기 저온 열처리 단계 열처리는 열처리로의 온도를 500~900℃의 범위로 유지하며 1~10시간 동안 열처리하는 것을 특징으로 하는 산소적층결함 영역을 측정하는 방법.The low temperature heat treatment step heat treatment is a method for measuring the oxygen deposition defect region, characterized in that the heat treatment for 1 to 10 hours while maintaining the temperature of the heat treatment furnace in the range of 500 ~ 900 ℃. 제 1항에 있어서,The method of claim 1, 상기 고온 열처리 단계 열처리는 열처리로의 온도를 1000~1100℃의 범위로 유지하며 10~24시간 동안 열처리하는 것을 특징으로 하는 산소적층결함 영역을 측정하는 방법.The high temperature heat treatment step heat treatment is a method for measuring the oxygen deposition defect region, characterized in that the heat treatment for 10 to 24 hours while maintaining the temperature of the heat treatment furnace in the range of 1000 ~ 1100 ℃. 제 1항에 있어서,The method of claim 1, 상기 식각은 30분 ~ 400분 범위로 실시하는 것을 특징으로 하는 산소적층결함 영역을 측정하는 방법.The etching is a method for measuring the oxygen deposition defect region, characterized in that performed in the range of 30 minutes to 400 minutes.
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