KR20030015454A - Method and System for Displaying Video Data using Automatic Resolve Conversion - Google Patents

Abstract

PURPOSE: A system and a method for displaying video data according to automatic change of resolution are provided to accord resolution of stored video data with resolution of a display device to display the video data with optimum resolution. CONSTITUTION: A system for displaying video data according to automatic change of resolution includes a key input unit(130), a microcomputer(105), a data storage(110), a CPLD(135), an LCD driver(150), and an LCD interface(160). The key input unit generates a key signal for instructing a specific operation. The data storage stores driving program, video data, and frame data of the video data, extracts video data to transmit the extracted data through a specific path. The CPLD decodes the key signal to transmit the decoded signal to the microcomputer, receives a node select signal from the microcomputer to multiplex the frame data stored in the data storage, and scales the frame data to predetermined resolution. The LCD driver converts the frame data multiplexed and scaled by the CPLD into an analog signal. The LCD interface controls an operation speed and timing of the analog signal to display the signal on an LCD.

Description

Method and System for Displaying Video Data using Automatic Resolve Conversion

The present invention relates to an image data display system and method by automatic resolution change, and more particularly, to display the stored image data at an optimum resolution (i.e., the number of full screen pixels) of the display means by adding or subtracting the number of pixels according to a predetermined resolution. The present invention relates to an image data display system and method by automatic resolution change.

In general, a video card (i.e., a video graphics adapter) processes image (character and picture) information from a computer and outputs it to the monitor so that each light emitting point (pixel or dot) of the monitor can display the color and display. A device that adjusts brightness, sometimes called a display adapter graphics card, graphics adapter, or video adapter.

Display adapters with this feature have a similar appearance, except for the bus type. This means that the only criterion to distinguish between VESA, PCI, and AGP display adapters is the difference between the input and output buses. The configuration consists of video chip (CRTC), video RAM, VGA biosram, feature connector, and VESA feature connector. (VAFC: VESA Advanced Feature Connector), Hangul font ROM, Hangul signal processing chip, and video signal output connector.

The video graphics adapter having the above characteristics converts the display data, which is output under the control of an operating system (OS) through a separate video driver, into an analog video signal corresponding to the resolution of the display and outputs the same to the display. On the other hand, the video resolution of the display used in the system operated by the OS is not changed once set by the OS or the user. Therefore, in order to enlarge a video having a certain resolution to a full screen (the number of full screen pixels in hardware of a display), it must be performed in software or hardware.

However, if the resolution is displayed in software, the computation of the main processor increases, causing an overload on the system, thereby inhibiting the smooth operation of the system, and the hardware method causes a cost increase due to the addition of hardware.

There are various formats of video contents on various media such as the Internet such as 176 × 144, 320 × 240, 160 × 128, 160 × 128, 96 × 120. High content is displayed only on a part of the full screen to be displayed, and content lower than a predetermined display resolution is displayed on a part of the full screen window of the display means. For example, when displaying a moving picture having a resolution of 320 × 240 at a display resolution of 640 × 480, only one quarter of the entire screen of the display is used for displaying the moving picture, and the remaining part is not used. Therefore, in order to use the full screen, the full screen enlargement function, which is a function of the video player program, is displayed to enlarge the full screen by changing the resolution in software, which causes an overload of the processor.

Accordingly, the present invention has been made to solve the above-mentioned conventional problems, and an object of the present invention is to match the resolution of the stored image data with the resolution of the display means, so that the image at the optimum resolution without additional manipulation. An object of the present invention is to provide an image data display system and method by automatically changing resolution for displaying data.

Another object of the present invention is to prevent overloading of the microcomputer by converting a large amount of video data into a video signal in a separate storage means (for example, SDRAM) and processing a plurality of key input signals in a separate device (for example, CPLD). The present invention provides an image data display system and method by automatic resolution change to display corresponding image data in an optimal state without a change in image quality due to overload.

1 is a block diagram showing the configuration of an image data display system according to the present invention;

2 is a diagram illustrating an exemplary path for receiving content,

3 is a detailed block diagram for each function of a CPLD according to the present invention;

4 is a flowchart illustrating the overall operation of the present invention.

♣ Explanation of symbols for the main parts of the drawing ♣

105: micom 110: data storage unit

135: CPLD150: LCD driver unit

200: content providing system 300: PC

The present invention for achieving the above object includes an audio codec unit for instructing to restore the compressed audio data to the original audio data to output the audio data through the audio interface unit, the resolution of the stored image data to a predetermined display resolution An image data display system for converting and displaying a video data display system comprising: a key input structure configured to distinguish key signals corresponding to a plurality of buttons, the key input unit generating a key signal for indicating a specific operation; A microcomputer that instructs to receive and store image data from the outside, extracts the stored image data, transfers the stored image data to a desired path, and transmits information about the resolution of the extracted image data to the corresponding path; A data storage unit for storing the driving program, the image data, and the frame data of the image data, extracting the corresponding data according to the control signal of the microcomputer, and transferring the data to a specific path; A CPLD that decodes a key signal input from a key input unit and delivers the corresponding signal to a microcomputer, receives a node selection signal from the microcomputer, multiplexes frame data stored in the SDRAM, and scales and outputs the frame data to a predetermined resolution; An LCD driver including an RGB DAC for converting RGB data into an analog signal, and converting frame data multiplexed and scaled by CPLD into an analog signal through an RGB DAC; And an LCD interface unit for interfacing to display on the LCD by adjusting the operation speed and timing of the analog signal converted by the LCD driver.

In addition, the present invention includes an audio codec unit for instructing to restore the compressed audio data to the original audio data and output the audio data through the audio interface unit, and converts the resolution of the stored image data into a display resolution of a predetermined size and displays the image. A data display method, comprising: receiving image data from a content providing system and storing image data; Determining whether the user wants to play the image data and whether the user inputs the play key of the key input unit, and converts the image data selected by the user into frame data; Multiplexing frame data according to an input of a node selection signal and changing the frame data to a fixed resolution; And displaying the changed frame data.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of an image data display system and method by automatic resolution change according to the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing a configuration of an image data display system 100 according to the present invention. The display system 100 is largely composed of a microcomputer 105, a data storage unit 110, and a CPLD (Complex Programmable Logic Device) ( 135, the LCD driver 150, and the data storage unit 110 includes a flash memory 106, an SDRAM 107, and a NAND flash 108, and the microcomputer 105 includes a power controller 115. , An extension socket 120, a main power connector 125 is connected, and a CPLD 135 is connected to a main power connector 125, a key input unit 130, an audio codec unit 140, and an LCD driver unit 150. The audio codec unit 140 is connected to the audio interface unit 145, and the LCD driver 150 is connected to the PWM circuit unit 155 and the LCD interface unit 160.

The microcomputer 105 instructs to receive and store image data (including still image data and video data) through the Internet or image media, extracts the stored image data, and delivers the image data to a desired path (that is, the SDRAM 107). It controls the overall operation of the image data display system 100 to transmit the information on the resolution of the extracted image data (eg, the resolution control signal) to the corresponding path (that is, the CPLD 135). In addition, the microcomputer 105 controls the driving program that performs the operation of the image data display system 100 to be smoothly operated.

The data storage unit 110 may include a flash memory 106 for storing a driving program code for performing an operation of the image data display system 100, an SDRAM 107 for storing image data including various data and video frame data, and And a NAND flash 108 for storing image data received via the Internet and other image media. The data storage unit 110 stores data or extracts the stored data according to the control signal of the microcomputer 105 and delivers the data to the corresponding path.

The microcomputer 105 has an expansion socket for collecting data such as a power control unit 115 for controlling a power source for starting the operation of the microcomputer 105, a compact flash and a CDMA and a digital still camera (DSC). 120 and a main power connector 125 for applying power. In addition, the microcomputer 105 may be connected to a battery check unit (not shown) for checking and notifying the remaining amount of the battery. Here, one main power connector 125 may be installed at each end of a board (eg, a main board, a power board).

The key input unit 130 generates a key signal for instructing the operation of the image data display system 100, and has a key matrix structure for distinguishing key signals corresponding to a plurality of buttons.

CPLD 135 is connected to the main power connector 125 is supplied with power, decodes the key signal input from the key input unit 130 and transfers the signal to the microcomputer 105, the node selection signal from the microcomputer 105 And multiplex image data (24-bit RGB data) stored in the SDRAM 107 and scale the image data to a constant resolution (for example, 160 × 234). Since the image data display system 100 is fixed at a resolution of 160 × 234, image data transmitted to the CPLD 135 (eg, 288 × 234 (WMT) and 176 × 144 (MPEG)) must be scaled. However, it is natural that the display resolution for the resolution change can be freely specified by the designer. The functional block of the CPLD 135 will be described in detail later with reference to FIG. 3. The first and second oscillators 137 and 139 are connected to the CPLD 135 to divide a clock for audio timing, PWM frequency selection, and key decoding. For example, the first oscillator 137 uses an 11.2896M oscillator and the second oscillator 139 uses an 8.192M oscillator.

The audio codec unit 140 is connected to the CPLD 135 and serves to restore the compressed audio data transmitted from the CPLD 135 to the original audio data. Codec is an acronym for code & decode, a software module responsible for compression and decompression. Typical codecs include Voxware audio, FhG MPEG Layer-3 audio, Windows Media Audio versions 1 & 2, and Microsoft MPEG-4 video. The biggest difference from other streaming solutions is the difference between these codecs and the system architecture using them. WMT also offers several other audio and video codecs to choose from. Since these codecs have different characteristics and performances, they can be optimized using different codecs depending on the nature of the content. The audio interface unit 145 is interconnected with the audio codec unit 140 and interfaces with the audio codec unit 140 to adjust the operation speed and timing of the decompressed audio data and the speaker.

The LCD driver 150 is interconnected with the CPLD 135 and converts the RGB data (digital signal) multiplexed and scaled by the CPLD 135 into an analog signal and outputs the analog signal. Therefore, the LCD driver 150 includes an RGB DAC. Digital-to-Analog Converter (DAC) is one of the important elements to implement color in graphic cards, and RGB DAC converts digital signals to analog signals. ) Is converted into voltage (analog). Here, the LDC driver 150 is used because the image data display system uses an LCD, and in the case of a general monitor, it is obvious that a video driver can be used. The PWM circuit unit 155 is interconnected with the LDD driver unit 150 and provides a pulse (that is, a voltage) for adjusting the contrast of the LCD panel. The LCD interface 160 interfaces to adjust the operation speed and timing to display the analog signal converted by the LCD driver 150 on the LCD connected to the LCD connector 165.

FIG. 2 is a diagram illustrating an exemplary path for receiving content, and illustrates a moving path of content provided through the Internet.

The content providing system 200 is composed of a web server and a database server. The web server processes data communication with a PC 300 of a general user connected through the Internet, and stores various contents (eg, movies and photos) stored in the database server. Video data), and the like, to the PC 300 via the Internet. The PC 300 is connected to the content providing system 200 through the Internet, and receives and transmits various contents transmitted from the content providing system 200 to the microcomputer 105 of the image data display system 100. Do this. Here, the PC 300 defines a communication protocol for communication with the content providing system 200 and the image data display system 100, and displays the content that can be displayed in the image data display system 100 (eg, 288 × 234). (WMT), 176 x 144 (MPEG) video data]. The PC 300 and the image data display system 100 exchange data through a USB port, and the PC 300 monitors the USB port to determine whether the image data display system 100 is connected, and when connected, PnP. (Plug and Play) transmits the data.

The microcomputer 105 is connected to the PC 300 and controls to receive the image data transmitted from the PC 300 and store it in the data storage unit 110 (preferably, the NAND flash 108). . Here, when the image data display system 100 is equipped with the wireless Internet service function, the desired content may be provided by being directly connected to the content providing system 200 via the Internet without passing through the PC 300. In addition, the image data display system 100 may be configured to be connected to a cradle in the form of a support that provides a connection port for convenient charging and connecting to other devices.

3 is a detailed block diagram of a CPLD according to the present invention, in which CPLD 135 includes RGB MUX and horizontal scaling block 310, NAND flash timing and address decoding block 320, internal register 330, and key decoding block. 340, the PWM frequency selection block 350, and the audio timing block 360.

The RGB MUX and horizontal scaling block 310 receives a synchronization signal (eg, a frame synchronization signal, a vertical synchronization signal, a horizontal synchronization signal, a pixel synchronization signal) applied from the SDRAM 107, and receives an image applied from the microcomputer 105. It receives a node selection signal for the resolution of data and scales horizontal frames of RGB multiplexed and transmitted image data to a predetermined resolution. In this case, a total of 24 bits are applied to each of the RGB frames applied by the SDRAM 107, and 8 bits are multiplexed to the RGB MUX and the horizontal scaling block 310 by the LCD driver 150. In addition, the resolution of the transmitted image data scales only the horizontal frame, and the vertical frame is scaled by the microcomputer 105 in a manner of adding or deleting lines. Since the image data display system 100 handles only image data of 288x234 and 176x144 resolution, the image data display system 100 changes the image data of the resolution to a fixed resolution (e.g., 160x234). Therefore, the frame data of 288 x 234 resolution is scaled at a ratio of 9: 5, and the frame data of 176 x 144 resolution is scaled by erasing 8 bits before and after the horizontal frame. Change to the fixed resolution of 100. The RGB MUX and horizontal scaling block 310 transmits a synchronization signal to the LCD driver 150 and simultaneously applies a data frame (8 bits) changed to a fixed resolution to the LCD driver 150.

The NAND flash timing and address decoding block 320 adjusts the operation timing of the NAND flash 108 and the CPLD 135 by a control signal applied from the microcomputer 105, and decodes and outputs an address for accessing the corresponding path. It performs the function. Address decoding is the task of selecting a particular chip to access the desired chip because the microcomputer 105 and the I / O chips (eg, flash memory, SDRAM, NAND flash, etc.) share data, data, and control buses.

The internal register 330 temporarily stores an instruction or data, and operates an external board such as a matrix key buffer register 332 that stores data bits for a key signal input by a user, and an on / off of an oscillator. The board control register 334 for storing data bits for control, the audio control register 336 for storing data bits such as clock selection of output audio data, and the control of the modem when connected to an external modem such as CDMA. And a modem control register 338 that stores the data bits. Here, the matrix key buffer register 332 performs a function of temporarily storing a key signal and applying it to the microcomputer 105 through a data bus in order to prevent an overload of the microcomputer 105. The microcomputer 105 applies the control signals (eg, PCMCI, / CS, / WE, / RE) to the NAND flash timing and address decoding block 320 and the internal register 330 to control the corresponding blocks.

The key decoding block 340 decodes a key signal applied from the key input unit 130 (5 × 4 key matrix block) and applies the corresponding signal to the matrix key buffer register 332. In addition, the key decoding block 340 sends an external key interrupt to notify the microcomputer 105 of the information on the key signal input when the key signal is input.

The PWM frequency selection block 350 is connected to the board control register 334 to generate a current signal for adjusting the brightness of the backlight LED present in the LCD panel according to the signal applied from the board control register 334. do. At this time, the generated current signal is a backlight LED PWM signal based on the divided clock applied from the second oscillator 139.

The audio timing block 360 adjusts an operation timing of the input audio data and applies it to the audio codec unit. At this time, the audio timing block 360 divides the clock by an integer multiple of the clock based on the frequencies applied by the first and second oscillators, and applies it to the audio codec unit 140. Therefore, audio timing signals corresponding to various kinds of audio frequencies (for example, 44.1K, 32K, 16K, 8K, etc.) can be transmitted.

Hereinafter, the operation relationship of the image data display system and method by the automatic resolution change according to the present invention will be described in more detail with reference to the accompanying drawings.

4 is a flowchart illustrating the overall operation of the present invention. It is assumed that the resolution processed by the image data display system 100 changes 288 x 234 and 176 x 144 to 160 x 234 image data. And image data corresponding to 176 × 144 is stored in the NAND flash of the image data display system 100 viewed through the content providing system 200. However, it is natural that the automatic resolution change of the present invention can implement not only the down resolution change but also the up resolution change. In addition, although the present invention assumes that only image data having 288 × 234 and 176 × 144 resolutions is processed, it is obvious that the present invention can be implemented to process other resolutions.

First, a general user who wants to view the desired image data by operating the image data display system selects a menu and selects the desired image data, and then presses a playback key. The microcomputer determines whether the general user selects a playback key to display image data (S410). Here, the reproduction key signal input by the user is decoded by the key decoding block of the CPLD and applied to the microcomputer through the matrix key buffer register. Therefore, the microcomputer can determine whether the reproduction key is input by determining the key signal applied from the matrix key buffer register. The reason why the user decodes the key signal input by the CPLD is to reduce the burden on the microcomputer and to prevent the microcomputer malfunction due to the overload.

The microcomputer determines the image data selected by the user, sends a data extraction signal to the NAND flash, and instructs to transfer the corresponding image data stored in the NAND flash to the SDRAM (S420). The reason why the image data to be displayed is transferred to the SDRAM without processing by the microcomputer is to prevent the system malfunction due to the overload by reducing the burden on the microcomputer to process a large amount of data. The SDRAM receiving the image data from the NAND flash stores the image data frame by frame, and according to the instruction of the microcomputer, the frame data (eg, RGB data (24 bits)) and a synchronization signal (eg, frame, horizontal, vertical, or pixel). Synchronization signal) is applied to the CPLD (S430). At the same time, the microcomputer determines the resolution of the image data applied to the CPLD and applies a node selection signal for notifying whether the resolution of the corresponding image data is 288 × 234 or 176 × 144 (S440).

The CPLD multiplexes the frame data applied from the SDRAM, and scales the resolution of the frame data to a fixed resolution (for example, 160 x 234) in the image data display system according to the node selection signal applied from the microcomputer (S450). For example, if the resolution of the transmitted frame data is 288 × 234, the CPLD calculates the greatest common divisor of 288 (horizontal resolution of the transmitted frame data) and 160 (horizontal resolution of the frame data to be displayed), so that a certain ratio (e.g., 9: 5 ratio) to reduce the resolution. That is, when nine RGB pixels are input, the CPLD takes GB for the first pixel and RG, BX, RG, BR, GX, BR, GB, and RX from the next pixel. Therefore, nine RGB pixels are changed to five RGB pixels. Next, if the resolution of the transmitted frame data is 176 x 144, the first 8 bits and the last 8 bits (16 bits in total) are deleted to match the fixed resolution without having to obtain the greatest common divisor.

Although the above example has described a down resolution change that changes the resolution (i.e. 288 x 234, 176 x 144) that can be stored in the image data display system to a constant resolution (i.e. 160 x 234), 96 x 120 It is also possible to change the resolution up to a constant resolution (i.e. 160 x 234). Up resolution can be changed by an image interpolation method that produces in-betweens between each frame. Generally, the image interpolation method includes a near list neighbor method, a bilinear method, and a bicubic method. A near list neighbor method is a method of interpolating by inspecting the adjacent pixel, and a bilinear method uses two pixels adjacent to each other. The method examines values and interpolates to average values. The bicubic method examines values of surrounding eight pixels and interpolates the average values. These interpolation methods are well known to those skilled in the art, and thus detailed descriptions are omitted.

Next, the LCD driver converts the RGB data (digital signal) changed by the CPLD into an analog signal that is easy to display (S460). Thus, the user can view the image data at the optimum resolution of the image data display system.

The above description is only for explaining one embodiment, and the present invention is not limited to the above-described embodiment and can be variously changed within the scope of the appended claims. For example, the shape and structure of each component specifically shown in the embodiments of the present invention may be modified.

As described above, according to the image data display system and method by the automatic resolution change according to the present invention, by matching the resolution of the stored image data with the resolution of the display means, the image data is displayed at the optimum resolution without any additional operation. It can work.

In addition, by converting a large amount of video data into frame data in a separate storage means (e.g., SDRAM) and processing a plurality of key input signals in a separate device (e.g. CPLD), an overload of the microcomputer is prevented by overloading. It is effective to prevent system malfunction.

Claims (9)

An audio codec unit for instructing to restore the compressed audio data to the original audio data to output the audio data through the audio interface unit, the image data display system for converting the resolution of the stored image data to a display resolution of a predetermined size and display , A key input unit having a key matrix structure for distinguishing key signals corresponding to a plurality of buttons and generating a key signal for indicating a specific operation; A microcomputer that instructs to receive and store the image data from the outside, extracts the stored image data, transfers the stored image data to a desired path, and transmits information on the resolution of the extracted image data to the corresponding path; A data storage unit for storing a driving program, image data, and frame data of the image data, and extracting corresponding data according to the control signal of the microcomputer and transferring the data to a specific path; Decodes a key signal input from the key input unit and transfers the signal to the microcomputer, receives a node selection signal from the microcomputer, multiplexes the frame data stored in the SDRAM, and scales and outputs the frame data at a constant resolution. CPLD; An LCD driver for converting RGB data into an analog signal, the LCD driver converting the frame data multiplexed and scaled by the CPLD into an analog signal through the RGB DAC; And And an LCD interface unit for interfacing the display to display on the LCD by adjusting the operation speed and timing of the analog signal converted by the LCD driver. The method of claim 1, wherein the data storage unit A flash memory for storing driving program codes for performing overall operations of the image data display system, an SDRAM for converting and outputting applied image data to frame data, and a NAND flash for storing image data applied through the microcomputer; Image data display system by automatic resolution change, characterized in that. The method of claim 1, A web server and a database server, the web server processing a data communication with a PC of a general user connected through the Internet, and a content providing system for transmitting various contents stored in a database server to the PC through the Internet; And a PC that receives the content transmitted from the content providing system and delivers the content to the microcomputer. And the microcomputer stores the content transmitted from the PC in the data storage unit. The method of claim 1, wherein the CPLD is RGB MUX and horizontal scaling for receiving a synchronization signal applied from the SDRAM, receiving a node selection signal for the resolution of image data applied from the microcomputer, and scaling horizontal frames of the RGB multiplexed and transmitted image data to a predetermined resolution. block; A NAND flash timing and address decoding block for adjusting operation timings of the NAND flash and the CPLD according to a control signal applied from the microcomputer, and decoding and outputting an address for accessing the corresponding path; Matrix key buffer registers that store data bits for key signals input by the user, board control registers that store data bits for controlling external boards such as on / off of the oscillator, clock selection of output audio data, etc. An internal register for temporarily storing instructions or data necessary for a specific operation, including an audio control register for storing bits and a modem control register for storing data bits for controlling the modem when connected to an external modem such as CDMA; A key decoding block for decoding a key signal applied from the key input unit, applying a corresponding signal to the matrix key buffer register, and sending an external key interrupt for notifying the microcomputer of information on a key signal input when a key signal is input; And A PWM frequency selection block for generating a current signal for adjusting the brightness of the backlight LED present in the LCD panel according to the signal applied from the board control register; And an audio timing block for adjusting an operation timing of the input audio data and applying the same to the audio codec unit. The image data of claim 1, wherein the image data stored in the data storage unit is image data of 288 × 234 and 176 × 144 resolution, and the CPLD converts the image data of 288 × 234 and 176 × 144 resolution into 160 × 234 resolution. An image data display system by automatic resolution change, characterized by changing to image data. The automatic resolution of claim 5, wherein the 288 × 234 resolution image data is scaled at a ratio of 9: 5, and the 176 × 144 resolution image data erases 8 bits before and after a horizontal frame. Image data display system by change. An audio codec unit for instructing to restore the compressed audio data to the original audio data to output the audio data through the audio interface unit, the image data display method for converting the resolution of the stored image data to a display resolution of a predetermined size for display , Receiving image data from a content providing system and storing the image data; Determining whether the user wants to play the image data and whether or not the key input unit presses the play key to convert the image data selected by the user into frame data; Multiplexing the frame data according to an input of a node selection signal and changing the frame data to a fixed resolution; And And displaying the changed frame data. The method of claim 7, wherein The image data applied from the content providing system is image data of 288 × 234 and 176 × 144 resolution, and the image data of 288 × 234 and 176 × 144 resolution is changed to image data of 160 × 234 resolution. Image data display method by automatic resolution change. The automatic resolution of claim 8, wherein the 288 × 234 resolution image data is scaled at a ratio of 9: 5, and the 176 × 144 resolution image data erases 8 bits before and after a horizontal frame. Image data display method by change.