KR20030004798A - OFDM receving system for estimating symbol timing offset and method thereof - Google Patents

Abstract

PURPOSE: An OFDM(Orthogonal Frequency Division Multiplexer) receiving system and method of estimating symbol-timing offset not affected by jitter is provided to make symbol-timing recovery possible, in spite of inferior channel conditions and low signal-to-noise ratio by setting up a threshold value to an offset value of an integral number part. CONSTITUTION: An OFDM receiving system comprises an ADC(Analog-to- Digital Conversion) unit(210), am FFT(Fast Fourier Transform) window control unit(220), an FFT-arithmetic and logic unit(230), a symbol timing offset estimation unit(240), an offset-processing unit(250), and a DPLL(Digital Phase Locked Loop) unit(260). The offset-processing unit comprises an integral number calculator(252), a former integral number reservoir(254), a comparator(256), and an offset producer(258). The ADC unit converts an analog-type OFDM signal into digital complex samples with sample rate of 9.14MHz. The FFT window control unit decides two transmission modes and four protective region modes among the digital complex samples and detects the boundary between a protective region and an effective symbol region. The FFT window control unit receives the integral numbers of the symbol timing offset, adjusts the start point of the FFT, removes the protective region, and inputs only the effective symbol region to the FFT-arithmetic and logic unit.

Description

ODP receiving system for estimating symbol timing offset that is not affected by jitter and its method {OFDM receving system for estimating symbol timing offset and method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an Orthogonal Frequency Division Multiplexer (OFDM) reception system, and more particularly, to an OFDM reception system and method for estimating a symbol timing offset that is not affected by jitter.

In general, an OFDM transmission system uses a fast fourier transform (FFT) to transmit information on a subcarrier and inserts a guard interval in front of an effective symbol interval in order to reduce the influence of multipath. It is important to find the exact FFT starting position because the OFDM system uses FFT. If the exact FFT starting point is not found, phase rotation occurs in the FFT result and performs an incorrect FFT operation. Accordingly, the OFDM system receives the boundary between the guard period and the valid symbol interval in the received OFDM signal and performs FFT window timing synchronization for inputting only valid symbols into the FFT.

1 is an overall block diagram of an OFDM receiver system for estimating a typical symbol timing offset.

The OFDM receiving system of FIG. 1 detects a symbol timing offset from an ADC 2110 for converting an OFDM signal into a digital complex sample, an FFT window controller 120 for correcting an integer offset, an FFT operator 130 for performing an FFT operation, and a distributed pilot. A symbol timing offset detection unit 140, an offset value divider 150 for dividing the detected offset into an integer part and a fractional part, and a phase locked loop part for controlling the frequency and phase of the ADC 110 with a decimal offset value (hereinafter referred to as DPLL). 160).

Referring to FIG. 1, the FFT window controller 120 adjusts a starting point of an FFT by receiving an integer symbol timing offset. The symbol timing offset detector 140 detects a symbol timing offset by using phase rotation of a distributed pilot. The offset value divider 150 outputs only an integer multiple of the offset value when the integer portion exists in the detected symbol timing offset, and outputs only an offset value of the fractional portion when the integer portion does not exist.

However, if the channel condition is poor (e.g., a Rayleigh channel) and the signal-to-noise ratio (SNR) is low, the symbol timing offset value detected by the symbol timing offset detector 140 includes a large amount of jitter. Generate integer part without going to zero. In this case, since the FFT window control unit 120 receives the integer part affected by jitter, the FFT window control unit 120 has the same effect as passing through a different channel for each symbol. As a result, an equalizer (not shown) in the final stage cannot predict a correct channel state, causing a problem of outputting wrong data.

The technical problem to be achieved by the present invention is to provide an OFDM reception method capable of recovering symbol timing even when a channel state is poor and a signal-to-noise ratio is low by setting a threshold at an integer offset value.

Another technical problem to be achieved by the present invention is to provide an OFDM reception system capable of recovering symbol timing even when a channel state is poor and a signal-to-noise ratio is low by setting a threshold at an integer offset value.

In order to solve the above technical problem, the present invention provides a symbol timing offset estimation method of an OFDM receiving system,

Estimating a symbol timing offset by extracting a variance pilot inserted for each sample of a symbol from the received OFDM signal;

Calculating an integer portion from the offset value estimated in the above process, and setting a threshold at the integer portion;

Selecting values of the integer part and the fractional part separated from the offset value according to the comparison of the calculated integer part and the threshold value;

And a symbol timing offset estimation method comprising correcting a starting point of the FFT with an integer part selected in the above process and correcting a sampling point with a fractional part.

In order to solve the above other technical problem, the present invention provides an OFDM receiving system for converting in high-speed pre-by-symbol unit consisting of an effective data sample and a guard interval,

Analog-digital conversion means for converting an OFDM signal into a digital complex sample;

FFT window control means for removing a guard interval from the digital complex samples converted by the analog-digital conversion means and outputting samples corresponding to the valid symbol interval;

FFT calculation means for converting samples of the effective symbol interval output from the FFT window control means in a fast free manner;

Symbol timing offset detection means for detecting a variance pilot inserted in the sample output from the FFT calculation means and estimating a symbol timing offset through the variance pilot;

An offset processing means for selectively outputting an integer portion and a fractional portion to the FFT window control means and the analog-digital conversion means by comparing the integer portion calculated from the offset value detected by the symbol timing offset detection means with the threshold value, respectively; An OFDM receiving system is featured.

1 is an overall block diagram of an OFDM receiver system for estimating a typical symbol timing offset.

2 is an overall block diagram of an OFDM reception system according to the present invention.

3 is a detailed view of the offset value calculator of FIG. 2.

4 is a flowchart illustrating a method of estimating a symbol timing offset that is not affected by jitter in an OFDM receiving system according to the present invention.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

2 is an overall block diagram of an OFDM reception system according to the present invention.

The OFDM receiving system of FIG. 1 includes an ADC unit 210, an FFT window control unit 220, an FFT operation unit 230, a symbol timing offset estimation unit 240, an offset processing unit 250, and a DPLL unit 260. The offset processing unit 250 is composed of an integer value calculator 252, a previous integer value storage unit 254, a comparator 256, an offset value calculator 258.

Referring to FIG. 2, first, an analog-to-digital converter (ADC) 210 converts an input analog OFDM signal into a digital complex sample having a sample rate of 9.14 MHz.

The FFT window controller 220 determines two transmission modes and four guard interval modes using the guard interval among the digital complex samples converted by the analog-to-digital converter (ADC) 210, and determines the guard interval and the validity. Find the boundary of a symbol section. In addition, the FFT window controller 220 receives the integer portion of the symbol timing offset, adjusts the starting point of the FFT, removes the guard interval from the FFT calculator 230, and inputs only the valid symbol interval.

The FFT calculator 230 converts the samples corresponding to the valid symbol interval output from the FFT window controller 220 to the fast free.

In this case, the FFT operator 230 outputs a signal in a frequency domain composed of the same number of subcarriers as the transmission mode. Signals in this frequency domain contain pilot signals containing information necessary for multiple synchronization and OFDM transmission along with general data. The distributed pilot signal inserted every 12 samples in one symbol of the frequency domain is required for symbol timing synchronization.

The symbol timing offset detector 240 detects a distributed pilot inserted into the sample output from the FFT calculator 230 and estimates the symbol timing offset through the distributed pilot.

The offset processing unit 250 compares the integer portion calculated from the symbol timing offset value detected by the symbol timing offset detection unit 240 with a threshold value and supplies the integer value and the decimal value to the FFT window control unit 220 and the DPLL unit 260, respectively. Optionally output

Referring to the offset processor 250 in more detail, the integer value calculator 252 calculates an integer by rounding the symbol timing offset value. The previous integer value store 254 stores the previous integer value. The subtractor 256 subtracts the integer value calculated by the integer value calculator 252 and the integer value stored in the previous integer value store 254. The offset value calculator 258 compares the value calculated by the subtractor 256 with a predetermined threshold. When the value calculated by the subtractor 256 is greater than the threshold value, the offset value calculator 258 updates only the integer value of the previous integer value storage unit 254 and outputs only the integer value. If the calculated value is less than the threshold, only the decimal value is output.

The DPLL unit 260 changes the frequency and phase of the sampling clock of the analog-to-digital converter 110 by using the decimal value of the symbol timing offset output from the offset processor 250.

3 is a detailed view of the offset value calculator 258 of FIG. 2.

Referring to FIG. 3, the comparator 370 compares a difference between an integer value calculated by the integer value calculator 252 and an integer value stored in the previous integer value store 254 with a threshold.

The rounder 310 calculates an integer value by rounding a symbol timing offset value.

The cutter 320 truncates the fractional portion of the symbol timing offset to calculate the integer value.

The subtractor 330 calculates a decimal value by subtracting the integer value calculated by the cutter 320 from the symbol timing offset value.

The first multiplexer 340 and the second multiplexer 350 selectively output integers and decimals according to the comparison result calculated by the comparator 370. That is, when the comparator 370 determines that the subtraction value is larger than the threshold, the first multiplexer 340 outputs the integer value calculated by the rounder 310, and the second multiplexer 350 outputs the fractional part of the zero value. do. In addition, when the comparator 370 determines that the subtraction value is smaller than the threshold, the first multiplexer 340 outputs an integer part of the zero value, and the second multiplexer 350 outputs a decimal value calculated by the subtractor 330. .

4 is a flowchart illustrating a method of estimating a symbol timing offset that is not affected by jitter in an OFDM receiving system according to the present invention.

First, a symbol timing offset is estimated by extracting a variance pilot inserted for each predetermined sample of a symbol from the received OFDM signal (step 410).

Next, the estimated symbol timing offset value is calculated as an absolute value (step 420).

Next, the integer part is calculated by rounding the calculated absolute value (step 430).

Next, the difference between the calculated integer value and the previously stored integer value is calculated as an absolute value (step 450).

Then, the calculated absolute value is compared with a predetermined threshold (step 470).

Subsequently, if the absolute value is greater than the threshold value, the previously stored integer value is updated to the current integer value, and the integer value and the zero value are output to the integer part and the decimal part, respectively (step 480). In step 490, zero and decimal values are output, respectively.

The present invention is not limited to the above-described embodiment, and of course, modifications may be made by those skilled in the art within the spirit of the present invention. That is, the present invention can be applied to symbol timing synchronization of European digital TVs, IEEE 802.11a wireless LANs, or other systems using the OFDM scheme.

As described above, according to the present invention, by setting a threshold in the integer portion of the symbol timing offset so as not to be affected by jitter, symbol timing recovery is possible even in a poor channel state and a low signal-to-noise ratio.

Claims (8)

In the symbol timing offset estimation method of an OFDM receiving system, Estimating a symbol timing offset by extracting a variance pilot inserted for every predetermined sample of symbols from the received OFDM signal; Calculating an integer portion from the offset value estimated in the above process, and setting a threshold at the integer portion; Selecting values of the integer part and the fractional part separated from the offset value according to the comparison of the calculated integer part and the threshold value; Correcting the starting point of the FFT with the integer portion selected in the process and correcting the sampling point with the fractional portion. The method of claim 1, wherein the selecting process comprises: comparing a difference between an integer portion of the estimated symbol offset and a previously stored integer portion with a preset threshold; If the difference is greater than the threshold, extract the integer value to the integer portion and output a zero value to the fractional part; if the difference is less than the threshold, extract the zero value to the integer part and output the decimal value to the fractional part; Symbol timing offset estimation method, characterized in that. The method of claim 1, wherein the fractional part is calculated by a difference between the integer value and the symbol timing offset value after generating a constant by truncating the fractional part of the symbol timing offset. The method of claim 1, wherein the integer portion is calculated by rounding the symbol timing offset value. In an OFDM reception system for converting in high-speed pre-order by a symbol unit consisting of an effective data sample and a guard interval, Analog-digital conversion means for converting an OFDM signal into a digital complex sample; FFT window control means for removing a guard interval from the digital complex samples converted by the analog-digital conversion means and outputting samples corresponding to the valid symbol interval; FFT calculation means for converting samples of the effective symbol interval output from the FFT window control means in a fast free manner; Symbol timing offset detection means for detecting a variance pilot inserted in the sample output from the FFT calculation means and estimating a symbol timing offset through the variance pilot; An offset processing means for selectively outputting an integer portion and a fractional portion to the FFT window control means and the analog-digital conversion means by comparing the integer portion calculated from the offset value detected by the symbol timing offset detection means with the threshold value, respectively; OFDM receiving system. The method of claim 5, wherein the offset processing means An integer value calculator configured to calculate an integer part by rounding the symbol timing offset value; A previous integer value storage unit for storing a previous symbol timing offset value; The difference between the integer value calculated by the integer value calculator and the integer value stored in the previous integer value storage unit is compared with a threshold value. When the difference value is larger than the threshold value, the integer value of the previous integer value storage unit is updated while the integer value is integer. And an offset value calculator for outputting a value and outputting a zero value at the fractional part, and outputting a zero value at the integer part and a decimal value at the fractional part if the difference value is less than the threshold. The method of claim 6, wherein the offset value calculator A comparator for comparing a difference between an integer calculated in the integer value calculator and an integer stored in a previous integer value storage unit with a threshold; A cutter for truncating the fractional portion of the symbol timing offset to produce an integer value; A subtractor for calculating a decimal value by subtracting an integer value generated by the cutter from a symbol timing offset value; A rounding unit for extracting an integer value by rounding the symbol timing offset value; And a multiplexer for selectively calculating integers and decimals extracted from the rounder and the subtractor according to the comparison result calculated by the comparator. 2. The OFDM receiving system of claim 1, wherein the integer portion adjusts the FFT starting point and the fractional portion adjusts the frequency and phase of the sampling clock.