CN1173537C - Orthogonal frequency division multiplex receiving system for active estimating symbol timing displacement and its method - Google Patents
Orthogonal frequency division multiplex receiving system for active estimating symbol timing displacement and its method Download PDFInfo
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- CN1173537C CN1173537C CNB011437014A CN01143701A CN1173537C CN 1173537 C CN1173537 C CN 1173537C CN B011437014 A CNB011437014 A CN B011437014A CN 01143701 A CN01143701 A CN 01143701A CN 1173537 C CN1173537 C CN 1173537C
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- timing shift
- element timing
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2662—Symbol synchronisation
- H04L27/2663—Coarse synchronisation, e.g. by correlation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/015—High-definition television systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2662—Symbol synchronisation
- H04L27/2665—Fine synchronisation, e.g. by positioning the FFT window
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2668—Details of algorithms
- H04L27/2673—Details of algorithms characterised by synchronisation parameters
- H04L27/2675—Pilot or known symbols
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- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Multimedia (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
An orthogonal frequency division multiplex (OFDM) receiving system for estimating a symbol timing offset without being influenced by jitter, and a method for the same are provided. The method includes extracting scattered pilots, which are inserted into a symbol at regular sample intervals, from a received OFDM signal and estimating a symbol timing offset, calculating an integer part from the value of the estimated symbol timing offset and setting a threshold value for the integer part, selecting values as an integer part and a fraction part of the value of a symbol timing offset according to the result of comparing the calculated integer part with the threshold value, and correcting a fast Fourier transform (FFT) start point based on the value selected as an integer part and correcting a sampling point based on the value selected as a fraction part. Accordingly, by setting a threshold value for the integer part of a symbol timing offset to prevent the influence of jitter, symbol timing can be restored even when a channel state is poor and a signal to noise ratio (SNR) is low.
Description
Technical field
The present invention relates to a kind of OFDM (OFDM) receiving system, relate in particular to a kind of OFDM receiving system and method thereof that is used for not being subjected to effect of jitter ground estimating code element timing shift.
Background technology
Generally, the OFDM transmitting system adopts rapid fourier change (FFT) to send information through subcarrier, and adds protection at interval in useful code element front portion, so that reduce multi-path influence.Because the OFDM receiving system adopts FFT, therefore obtaining accurately, the FFT starting point is important.When the FFT starting point was inaccurate, FFT result had phase deviation, and this is with the FFT computing that leads to errors.The OFDM receiving system is obtained and is protected in the received ofdm signal at interval and the border between the useful symbol interval, and it is synchronous to carry out the FFT window timing, so that only useful code element is carried out FFT.
Fig. 1 is the overall block-diagram that is used for the typical OFDM receiving system of estimating code element timing shift.The OFDM receiving system of Fig. 1 comprises: A/D converter (ADC) 110 is used for converting ofdm signal to the digital complex numbers sample; FFT window controller 120 is used to proofread and correct the integer part of deviant; FFT arithmetic element 130 is used to carry out FFT; Code element timing shift estimator 140 is used for detecting code element timing shift from scattered pilots; Skew dispenser 150 is used for detected deviant is divided into integer part and fractional part; And digital phase-locked loop (DPLL) 160, be used to adopt frequency and the phase place of the fractional part control ADC 110 of deviant.
With reference to Fig. 1, the integer part of FFT window controller 120 receiving symbol timing slip values, and control FFT starting point.Code element timing shift estimator 140 adopts the phase place of scattered pilots to rotate estimating code element timing shift.When the integer part of detected code element timing shift value was non-vanishing, skew dispenser 150 was only exported this integer part, and when this integer part is zero, only exports fractional part.
When channel status difference and signal to noise ratio (snr) in Rayleigh (Rayleigh) channel are low, comprise a lot of shakes by the value of code element timing shift estimator 140 detected code element timing shifts, therefore, deviant can not vanishing and is kept integer part.In this case, because therefore FFT window controller 120, channel distortion occurs by the control of the deviant integer part that is subjected to effect of jitter in each code element.Therefore, the equalizer (not shown) can not be estimated correct channel status, thus the output error data.
Summary of the invention
In order to address the above problem, first purpose of the present invention provides a kind of OFDM (OFDM) method of reseptance, and wherein the integer part to deviant is provided with a threshold value, even so that also can recover symbol timing when channel status difference and signal to noise ratio are low.
Second purpose of the present invention provides a kind of OFDM (OFDM) receiving system, and wherein the integer part to deviant is provided with a threshold value, even so that also can recover symbol timing when channel status difference and signal to noise ratio are low.
In order to realize first purpose of the present invention, provide a kind of in the OFDM receiving system method of estimating code element timing shift.This method comprises: from the ofdm signal that receives, extracts with the scattered pilots in the sample interval insertion code element of rule, and estimating code element timing shift; From estimated code element timing shift, calculate integer part, and this integer part is provided with a threshold value; According to the comparative result between the integer part that is calculated and this threshold value, select as the integer part of code element timing shift value and the value of fractional part; With proofread and correct rapid fourier change (FFT) starting point according to selected value as integer part, and proofread and correct sampled point according to selected value as fractional part.
In order to realize second purpose of the present invention, a kind of OFDM receiving system is provided, be used for the code element of being made up of at interval useful data sample and protection is carried out FFT.This OFDM receiving system comprises: A/D converter is used for converting ofdm signal to the digital complex numbers sample; The FFT window controller is used for removing protection at interval from each digital complex numbers sample of this A/D converter output certainly, with the useful data sample of output corresponding to useful symbol interval; The FFT arithmetic element is used for for carrying out FFT from the useful data sample of this FFT window controller output; The code element timing shift estimator is used for detecting scattered pilots from the sample by this FFT arithmetic element output, and adopts this scattered pilots to come estimating code element timing shift; And offset processor, be used for the integer part and a threshold that will calculate, and selectively integer part and fractional part outputed to this FFT window controller and A/D converter respectively according to comparative result from the value of the code element timing shift that estimates by this code element timing shift estimator.
Description of drawings
By the detailed description of reference accompanying drawing to the preferred embodiment of the present invention, it is clearer that above-mentioned purpose of the present invention and advantage will become, in the accompanying drawing:
Fig. 1 is the overall block-diagram that is used for typical OFDM (OFDM) receiving system of estimating code element timing shift;
Fig. 2 is the overall block-diagram of OFDM receiving system of the present invention;
Fig. 3 is the detailed view of the drift computer of Fig. 2; With
Fig. 4 is used for estimating code element timing shift according to the present invention but the flow chart that is not subjected to the method for effect of jitter in the OFDM receiving system.
Embodiment
Embodiments of the invention are described below with reference to accompanying drawings.
Fig. 2 is the overall block-diagram of OFDM of the present invention (OFDM) receiving system.The OFDM receiving system of Fig. 2 comprises A/D converter (ADC) 210, FFT window controller 220, FFT arithmetic element 230, code element timing shift estimator 240, offset processor 250 and digital phase-locked loop (DPLL) 260.Offset processor 250 comprises integer calculations device 252, previous integer memory cell 254, subtracter 256 and drift computer 258.
ADC 210 converts ofdm signal to digital complex numbers sample that its sample rate is 9.14MHz.
230 pairs of FFT arithmetic elements are carried out FFT with the corresponding sample of useful symbol interval from 220 outputs of FFT window controller, with the output frequency-region signal.This frequency-region signal also comprises scattered pilot signals except that general data, this scattered pilot signals comprises that carrying out OFDM sends information necessary.For symbol timing synchronously for, the scattered pilot signals of inserting in each code element of frequency-region signal with the interval of 12 samples is essential.
Code element timing shift estimator 240 estimates scattered pilots from the sample from 230 outputs of FFT arithmetic element, and adopts this scattered pilots to come estimating code element timing shift.
More particularly, in offset processor 250, the round off value of code element timing shift of integer calculations device 252 is with computes integer.The previous integer of previous integer memory cell 254 storages.Integer that 256 pairs of subtracters are calculated by integer calculations device 252 and the previous integer that is stored in the previous integer memory cell 254 carry out subtraction.Drift computer 258 will be compared with predetermined threshold value by the value that subtracter 256 calculates.Drift computer 258 upgrades the previous integer of previous integer memory cell 254, and when the value that calculates when subtracter 256 surpasses this threshold value, only from integer calculations device 252 output integers, and the value that calculates when subtracter 256 is only exported the decimal of detected code element timing shift during less than this threshold value.
Fig. 3 is the detailed view of the drift computer 258 of Fig. 2.With reference to Fig. 3, the integer that comparator 370 will be calculated by integer calculations device 252 and be stored in difference and threshold between the previous integer in the previous integer memory cell 254.
The 310 pairs of code element timing shift values in unit that the round off computing of rounding off is with computes integer.
Cropper 320 blocks the fractional part of code element timing shift value, with computes integer.
Subtracter 330 deducts the integer that is calculated by cropper 320 from the code element timing shift value, to calculate decimal.
First and second multiplexers 340 and 350 are exported integer and decimal selectively according to the comparative result of comparator 370 outputs.In other words, when the output of the subtracter 256 of determining Fig. 2 surpasses threshold value, the integer that 340 outputs of first multiplexer are calculated by the unit 310 that rounds off, second multiplexer 350 is exported as fractional part with 0.When the output of the subtracter 256 of determining Fig. 2 during less than threshold value, first multiplexer 340 is with 0 as integer part output, the decimal that 350 outputs of second multiplexer are calculated by subtracter 330.
The flowcharting of Fig. 4 be the method that in the OFDM receiving system, is not subjected to effect of jitter ground estimating code element timing shift according to the present invention.In step 410, from received ofdm signal, extract with predetermined sample and insert scattered pilots in each code element at interval, with estimating code element timing shift.
In step 420, calculate the absolute value of code element timing shift.
In step 430, this absolute value is rounded off, with computes integer.
In step 450, calculate the absolute value of the difference between current integer and the previous integer.
In step 470, the absolute value of this difference is compared with a predetermined threshold.
In step 480, when the absolute value of this difference surpasses threshold value, adopt current integer to upgrade previous integer, and export current integer and zero not as integer part and fractional part.In step 490, when the absolute value of this difference during less than threshold value, output zero-sum decimal is respectively as integer part and fractional part.
As mentioned above, the present invention is provided with a threshold value for the integer part of code element timing shift, with the influence that prevents to shake, thereby even also can recover symbol timing under the low situation of channel status difference and signal to noise ratio (snr).
The present invention is not limited to the foregoing description, and the one of ordinary skilled in the art it should be understood that the change that can carry out within the scope of the present invention on various forms and the details.In other words, the present invention can be applied to Europe class numeral TV, adopt the system of OFDM based on the WLAN of IEEE 802.11a and other.
Claims (6)
1, a kind of in orthogonal frequency division multiplex receiving system the method for estimating code element timing shift, this method comprises the following steps:
From the orthogonal frequency-division multiplex singal that receives, extract with the scattered pilots in the sample interval insertion code element of rule, and estimating code element timing shift;
From estimated code element timing shift value, calculate integer part, and this integer part is provided with a threshold value;
According to the comparative result between the integer part that is calculated and this threshold value, selection is as the integer part of code element timing shift value and the value of fractional part, wherein, this selection step comprises: with the current integer of estimated code element timing shift value and difference and this threshold between the previous integer, when this difference surpasses this threshold value, select current integer as integer part, and select zero as fractional part, and when this difference during less than this threshold value, select zero as integer part, and the decimal of the code element timing shift value that selection is estimated is as fractional part; With
The starting point of proofreading and correct rapid fourier change according to selected value as integer part, and proofread and correct sampled point according to selected value as fractional part.
2, the method for claim 1, wherein the fractional part of the code element timing shift value by blocking estimation obtains integer part, calculates fractional part by implementing subtraction with respect to this integer part of blocking from the code element timing shift value of estimating.
3, the method for claim 1, wherein by computing that the code element timing shift value of estimating is rounded off, come the computes integer part.
4, a kind of orthogonal frequency division multiplex receiving system is used for the code element of being made up of at interval useful data sample and protection is carried out rapid fourier change, and this orthogonal frequency division multiplex receiving system comprises:
A/D converter is used for converting orthogonal frequency-division multiplex singal to the digital complex numbers sample;
The rapid fourier change window controller is used for removing protection at interval from each digital complex numbers sample of this A/D converter output, with the useful data sample of output corresponding to useful symbol interval;
The rapid fourier change arithmetic unit is used for carrying out rapid fourier change from the useful data sample of this rapid fourier change window controller output;
The code element timing shift estimator is used for detecting scattered pilots from the sample of this rapid fourier change arithmetic unit output, and adopts this scattered pilots to come the estimating code element timing shift value; With
Offset processor, be used for the integer part and a threshold that will calculate from the code element timing shift value that estimates by this code element timing shift estimator, and selectively integer part and fractional part are outputed to this rapid fourier change window controller and A/D converter respectively according to comparative result, wherein, this offset processor comprises: the integer calculations device, be used for by computing that the code element timing shift value is rounded off, come computes integer, previous integer memory cell, be used to store the integer of previous code element timing shift value, and drift computer, be used for difference and this threshold between integer that will calculate by this integer calculations device and the integer that is stored in this previous integer memory cell, upgrade the integer in this previous integer memory cell, and when this difference surpasses this threshold value, the integer of the code element timing shift value that output is estimated is as integer part, and output zero is as fractional part, when this difference is no more than this threshold value, output zero is as integer part, and the decimal of the code element timing shift value that output is estimated is as fractional part.
5, orthogonal frequency division multiplex receiving system as claimed in claim 4, wherein, this drift computer comprises:
Comparator is used for difference and this threshold between integer that will be calculated by this integer calculations device and the integer that is stored in this previous integer memory cell;
Cropper is used to block the fractional part of the code element timing shift value of estimation, to produce integer part;
Subtracter is used for deducting the integer part that is produced by this cropper from the code element timing shift value of estimating, to calculate fractional part;
The unit that rounds off is used for the code element timing shift value of estimating is carried out the computing of rounding off, to extract integer part; With
Multiplexer is used for the comparative result carried out according to by this comparator, exports selectively from the integer part of this unit that rounds off with from the fractional part of this subtracter.
6, orthogonal frequency division multiplex receiving system as claimed in claim 4, wherein, integer part is used to control the rapid fourier change starting point, and fractional part is used to control the frequency and the phase place of sampled clock signal.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020010040480A KR100750105B1 (en) | 2001-07-06 | 2001-07-06 | OFDM receving system for estimating symbol timing offset and method thereof |
| KR40480/2001 | 2001-07-06 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1396749A CN1396749A (en) | 2003-02-12 |
| CN1173537C true CN1173537C (en) | 2004-10-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB011437014A Expired - Fee Related CN1173537C (en) | 2001-07-06 | 2001-12-18 | Orthogonal frequency division multiplex receiving system for active estimating symbol timing displacement and its method |
Country Status (3)
| Country | Link |
|---|---|
| KR (1) | KR100750105B1 (en) |
| CN (1) | CN1173537C (en) |
| GB (1) | GB2377350B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1507378B1 (en) * | 2003-08-14 | 2012-10-24 | Sony Deutschland GmbH | Frame and frequency synchronization for OFDM |
| US20050063298A1 (en) * | 2003-09-02 | 2005-03-24 | Qualcomm Incorporated | Synchronization in a broadcast OFDM system using time division multiplexed pilots |
| CN102752096A (en) * | 2004-01-28 | 2012-10-24 | 高通股份有限公司 | Timing estimation in an OFDM receiver |
| CN103888146B (en) * | 2014-03-31 | 2017-09-22 | 威海格邦电子科技有限公司 | A kind of method of data compression, device and communication equipment |
| CN107454025B (en) * | 2017-07-26 | 2019-09-10 | 东南大学 | The estimation method of channel impulse response tap number in a kind of visible light communication |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3556047B2 (en) * | 1996-05-22 | 2004-08-18 | 三菱電機株式会社 | Digital broadcast receiver |
| JPH102002A (en) * | 1996-06-17 | 1998-01-06 | Daiwa:Kk | Drainage chamber and method for forming inner bottom thereof |
| US5991289A (en) * | 1997-08-05 | 1999-11-23 | Industrial Technology Research Institute | Synchronization method and apparatus for guard interval-based OFDM signals |
| KR100425297B1 (en) * | 2001-06-11 | 2004-03-30 | 삼성전자주식회사 | OFDM receving system for estimating symbol timing offset efficiently and method thereof |
-
2001
- 2001-07-06 KR KR1020010040480A patent/KR100750105B1/en not_active IP Right Cessation
- 2001-12-18 CN CNB011437014A patent/CN1173537C/en not_active Expired - Fee Related
- 2001-12-24 GB GB0130902A patent/GB2377350B/en not_active Expired - Fee Related
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| Publication number | Publication date |
|---|---|
| GB0130902D0 (en) | 2002-02-13 |
| KR20030004798A (en) | 2003-01-15 |
| GB2377350A (en) | 2003-01-08 |
| KR100750105B1 (en) | 2007-08-21 |
| GB2377350B (en) | 2003-07-16 |
| CN1396749A (en) | 2003-02-12 |
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