KR200211242Y1 - Wafer cooling apparatus for semiconductor pvd system - Google Patents

Wafer cooling apparatus for semiconductor pvd system Download PDF

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Publication number
KR200211242Y1
KR200211242Y1 KR2019970022534U KR19970022534U KR200211242Y1 KR 200211242 Y1 KR200211242 Y1 KR 200211242Y1 KR 2019970022534 U KR2019970022534 U KR 2019970022534U KR 19970022534 U KR19970022534 U KR 19970022534U KR 200211242 Y1 KR200211242 Y1 KR 200211242Y1
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chamber
gas
semiconductor
wafer
supply line
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KR2019970022534U
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Korean (ko)
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KR19990009334U (en
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문호성
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김영환
현대반도체주식회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67109Apparatus for thermal treatment mainly by convection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment

Abstract

본 고안은 챔버의 내부로 가스가 급격히 공급되는 것을 방지할 수 있도록 한 반도체 피브이디장비의 웨이퍼 냉각장치에 관한 것으로, 가스공급라인(15)을 챔버(11)의 하측으로 연결하고, 그 가스공급라인(15)에 연결되도록 챔버(11)의 내측하면에 디퓨져(16)를 설치하여, 챔버(11)의 내측으로 공급되는 가스가 하측에서 균일하게 공급되도록 한 반도체 피브이디장비의 웨이퍼 냉각장치에 관한 것이다.The present invention relates to a wafer cooling apparatus of a semiconductor PD device capable of preventing a rapid supply of gas into the chamber, and connects the gas supply line 15 to the lower side of the chamber 11, and the gas The diffuser 16 is installed on the inner bottom surface of the chamber 11 so as to be connected to the supply line 15, and the wafer cooling of the semiconductor film device is uniformly supplied from the lower side of the chamber 11. Relates to a device.

Description

반도체 피브이디장비의 웨이퍼 냉각장치{WAFER COOLING APPARATUS FOR SEMICONDUCTOR PVD SYSTEM}Wafer Cooling Device for Semiconductor PVD Equipment {WAFER COOLING APPARATUS FOR SEMICONDUCTOR PVD SYSTEM}

본 고안은 반도체 피브이디장비의 웨이퍼 냉각장치에 관한 것으로, 특히 챔버의 내측에 냉각가스가 급격히 유입되는 것을 방지하도록 하는데 적합한 반도체 피브이디장비의 웨이퍼 냉각장치에 관한 것이다.The present invention relates to a wafer cooling apparatus of a semiconductor PD device, and more particularly, to a wafer cooling apparatus of a semiconductor PD device suitable for preventing a rapid inflow of a cooling gas into the chamber.

일반적으로 반도체 웨이퍼 제조공정 중 메탈공정에서는 멀티 챔버인 피브디 증착장비를 이용하여 공정을 진행하며, 증착작업을 마친 웨이퍼는 냉각장치로 이동하여 웨이퍼를 냉각시키게 되는데, 이와 같은 일반적인 종래 냉각장치가 도 1에 도시되어 있는 바, 이를 간단히 설명하면 다음과 같다.In general, the metal process of the semiconductor wafer manufacturing process proceeds using a multi-chambered deposition equipment, the wafer after the deposition is moved to the cooling device to cool the wafer, such a conventional conventional cooling device It is illustrated in 1, which is briefly described as follows.

도 1은 종래 반도체 피브이디장비의 웨이퍼 냉각장치의 구조를 보인 종단면도로서, 도시된 바와 같이, 공정 챔버(1)의 내측에는 웨이퍼(2)를 얹어 놓기 위한 패대스탈(3)이 설치되어 있고, 상기 챔버(1)의 측면에는 냉각가스를 공급하기 위한 가스공급라인(4)이 설치되어 있으며, 그 가스공급라인(4) 상에는 온/오프 밸브(5) 및 유량조절기(6)가 설치되어 있다.1 is a longitudinal cross-sectional view showing a structure of a wafer cooling apparatus of a conventional semiconductor PD device, and as shown, a paddle 3 for mounting a wafer 2 is installed inside the process chamber 1. On the side of the chamber (1), a gas supply line (4) is provided for supplying cooling gas, and on / off valve (5) and flow regulator (6) are installed on the gas supply line (4). It is.

그리고, 상기 챔버(1)의 일측면 상단부에는 챔버(1)의 내측 압력을 측정하기 위한 압력측정기(7)가 설치되어 있다.In addition, a pressure measuring device 7 for measuring an inner pressure of the chamber 1 is installed at an upper end of one side of the chamber 1.

상기와 같이 구성되어 있는 종래 반도체 피브이디장비의 웨이퍼 냉각장치의 동작을 설명하면 다음과 같다.Referring to the operation of the wafer cooling apparatus of the conventional semiconductor PD device configured as described above is as follows.

증착장치에서 증착작업을 실시하여 가열된 웨이퍼(2)를 챔버(1)의 내측에 설치되어 있는 패대스탈(3)의 상면에 위치시킨다. 이와 같은 상태에서 가스공급라인(4)을 통하여 챔버(1)의 내측으로 냉각된 아르곤 가스를 유입시켜서 챔버(1)의 내측에 위치하고 있는 웨이퍼(2)를 냉각한다. 이와 같이 냉각작업을 진행시에 챔버(1)의 내측으로 냉각가스를 유입시켜서 발생되는 압력의 변화는 챔버(1)의 측면 상단부에 설치되어 있는 압력측정기(7)로 측정하여 확인한다.The vapor deposition operation is carried out in the deposition apparatus to place the heated wafer 2 on the upper surface of the paddlestal 3 provided inside the chamber 1. In this state, the cooled argon gas is introduced into the chamber 1 through the gas supply line 4 to cool the wafer 2 located inside the chamber 1. In this way, the change in pressure generated by introducing the cooling gas into the inside of the chamber 1 during the cooling operation is measured and confirmed by measuring the pressure measuring device 7 installed at the upper end of the side of the chamber 1.

그러나, 상기와 같은 종래 반도체 피브이디장비의 웨이퍼 냉각장치는 챔버(1)의 내측으로 냉각가스의 공급시 초기에 많은 양이 급격이 챔버(1)의 내측으로 공급되어 압력측정기(7)의 오동작이 발생되는 문제점이 있었다. 그리고, 경우에 따라서는 패대스탈(3)의 상면에 얹어 있는 웨이퍼(2)를 떨어뜨려서 파손시키는 문제점이 있었다.However, in the wafer cooling apparatus of the conventional semiconductor PD apparatus as described above, a large amount is suddenly supplied to the inside of the chamber 1 at the time of supplying the cooling gas into the inside of the chamber 1, thereby reducing the pressure of the pressure measuring device 7. There was a problem that a malfunction occurred. In some cases, there is a problem that the wafer 2 placed on the upper surface of the paddle 3 is dropped and broken.

상기와 같은 문제점을 감안하여 안출한 본 고안의 목적은 냉각가스가 챔버의 내부로 급격이 유입되는 것을 방지하도록 하는데 적합한 반도체 피브이디장비의 웨이퍼 냉각장치를 제공함에 있다.The object of the present invention devised in view of the above problems is to provide a wafer cooling apparatus of a semiconductor PD device suitable for preventing the rapid inflow of the cooling gas into the chamber.

도 1은 종래 반도체 피브이디장비의 웨이퍼 냉각장치의 구조를 보인 종단면도.1 is a longitudinal cross-sectional view showing the structure of a wafer cooling apparatus of a conventional semiconductor PD device.

도 2는 본 고안 반도체 피브이디장비의 웨이퍼 냉각장치의 구조를 보인 종단면도.Figure 2 is a longitudinal cross-sectional view showing the structure of the wafer cooling device of the semiconductor PD device of the present invention.

도 3은 본 고안 디퓨져의 구조를 보인 평면도.Figure 3 is a plan view showing the structure of the present invention diffuser.

도 4는 도 3의 A-A'를 절취하여 보인 단면도.4 is a cross-sectional view taken along the line AA ′ of FIG. 3;

* * 도면의 주요 부분에 대한 부호의 설명 * ** * Explanation of symbols for the main parts of the drawing * *

11 : 챔버 15 : 가스공급라인11 chamber 15 gas supply line

21a: 가스유입홈 21 : 몸체21a: gas inlet groove 21: body

22 : 분사망22: spraying network

상기와 같은 본 고안의 목적을 달성하기 위하여 가스공급라인을 통하여 챔버의 내측으로 냉각가스를 공급할 수 있도록 되어 있는 반도체 피브이디장비의 웨이퍼 냉각장치에 있어서, 상기 가스공급라인이 챔버의 하면 일측에 연결되며, 그 가스공급라인에 연결되도록 챔버의 내측 하면에 균일한 냉각가스 공급을 위한 디퓨져를 설치하되, 그 디퓨져는 상면에 일정깊이의 가스유입홈이 길이방향으로 형성되어 있는 원형의 몸체와, 상기 몸체의 상면에 설치되며 압력측정기에서 압력변화를 정확하게 측정할 수 있도록 균일하게 가스를 분사하기 위한 분사망으로 구성되는 것을 특징으로 하는 반도체 피브이디장비의 웨이퍼 냉각장치가 제공된다.In the wafer cooling apparatus of the semiconductor PD device to supply the cooling gas to the inside of the chamber through the gas supply line in order to achieve the object of the present invention as described above, the gas supply line is provided on one side of the lower surface of the chamber It is connected, and the diffuser for uniform cooling gas supply is installed on the inner lower surface of the chamber to be connected to the gas supply line, the diffuser is a circular body having a gas inlet groove of a predetermined depth formed in the longitudinal direction, It is provided on the upper surface of the body is provided with a wafer cooling device of a semiconductor PD device, characterized in that consisting of a spray network for injecting the gas uniformly so as to accurately measure the pressure change in the pressure meter.

이하, 상기와 같이 구성되는 본 고안 반도체 피브이디장비의 웨이퍼 냉각장치를 첨부된 도면의 실시예를 참고하여 보다 상세히 설명하면 다음과 같다.Hereinafter, with reference to the embodiment of the accompanying drawings, the wafer cooling apparatus of the present invention semiconductor PD device configured as described above in more detail as follows.

도 2는 본 고안 반도체 피브이디장비의 웨이퍼 냉각장치의 구조를 보인 종단면도로서, 도시된 바와 같이, 본 고안 반도체 피브이디장비의 웨이퍼 냉각장치는 원통형의 공정 챔버(11)와, 그 챔버(11)의 내측에 설치되며 웨이퍼(12)를 얹어 놓기 위한 패대스탈(13)과, 상기 챔버(11)의 일측면 상단부에 설치되며 챔버(11)의 내측압력을 측정하기 위한 압력측정기(14)와, 상기 챔버(11)의 하방으로 연결되어 냉각가스를 공급하기 위한 가스공급라인(15)과, 상기 챔버(11)의 내측 하면에 설치되며 상기 가스공급라인(15)에 연결되어 있는 디퓨져(16)와, 상기 가스공급라인(15) 상에 설치되는 온/오프밸브(17) 및 유량조절기(18)로 구성되어 있다.FIG. 2 is a longitudinal sectional view showing the structure of a wafer cooling apparatus of the semiconductor PV device of the present invention. As shown, the wafer cooling apparatus of the semiconductor PV device of the present invention has a cylindrical process chamber 11 and a chamber thereof. A paddlestal 13 for installing the wafer 12 on the inside of the chamber 11 and an upper end portion of one side of the chamber 11 and a pressure gauge 14 for measuring the inner pressure of the chamber 11. ), A gas supply line 15 connected to the lower side of the chamber 11 to supply cooling gas, and a diffuser installed at an inner lower surface of the chamber 11 and connected to the gas supply line 15. And an on / off valve 17 and a flow regulator 18 provided on the gas supply line 15.

도 3은 본 고안 디퓨져의 구조를 보인 평면도이고, 도 4는 도 3의 A-A'를 절단하여 보인 단면도로서, 도시된 바와 같이, 상기 디퓨져(16)는 상기 가스공급라인(15)에 연결되며 상면에 일정깊이의 가스유입홈(21a)이 길이방향으로 형성되어 있는 원형의 몸체(21)와, 상기 몸체(21)의 상면에 설치되는 분사망(22)으로 구성되어 있다.FIG. 3 is a plan view showing the structure of the present invention, and FIG. 4 is a cross-sectional view taken along the line A-A 'of FIG. 3, and as shown, the diffuser 16 is connected to the gas supply line 15. The upper surface is composed of a circular body 21 having a predetermined depth of gas inlet groove 21a formed in the longitudinal direction, and the injection network 22 is installed on the upper surface of the body 21.

상기와 같이 구성되어 있는 본 고안 반도체 피브이디장비의 웨이퍼 냉각장치의 작용을 설명하면 다음과 같다.Referring to the operation of the wafer cooling apparatus of the present invention semiconductor PD device configured as described above are as follows.

증착시 가열된 웨이퍼(12)를 챔버(11)의 내측에 설치되어 있는 패대스탈(13)의 상면에 위치시키고, 가스공급라인(15)을 통하여 챔버(11)의 내측으로 냉각된 아르곤 가스를 유입시켜서 챔버(11)의 내측에 위치하고 있는 웨이퍼(12)를 냉각하게 되는데, 본 고안에서는 가스공급라인(15)이 챔버(11)의 하면에 연결되어 있고, 상기 가스공급라인(15)에 디퓨져(16)가 연결설치되어 있어서, 냉각가스가 디퓨져(16)를 통하여 챔버(11)의 내측 하부에서 균일하게 분사된다.During deposition, the heated wafer 12 is positioned on the upper surface of the paddlestal 13 installed inside the chamber 11, and the argon gas cooled inside the chamber 11 through the gas supply line 15 is transferred. In the present invention, the wafer 12 located inside the chamber 11 is cooled, and in the present invention, the gas supply line 15 is connected to the lower surface of the chamber 11, and the diffuser is connected to the gas supply line 15. 16 is connected, and cooling gas is uniformly injected from the inner lower part of the chamber 11 through the diffuser 16. As shown in FIG.

즉, 상기 가스공급라인(15)으로 공급되는 냉각가스는 디퓨져(16)의 가스유입홈(21a)으로 유입되고, 그 유입된 가스가 가스유입홈(21a)의 상면에 설치된 분사망(22)에 의하여 챔버(11)에 균일하게 분사되게 된다.That is, the cooling gas supplied to the gas supply line 15 flows into the gas inlet groove 21a of the diffuser 16, and the injected gas is provided on the upper surface of the gas inlet groove 21a. It is to be uniformly injected into the chamber 11 by.

이상에서 상세히 설명한 바와 같이 본 고안 반도체 피브이디장비의 웨이퍼 냉각장치는 가스공급라인을 챔버의 하측으로 연결하고, 그 가스공급라인에 연결되도록 챔버의 내측하면에 디퓨져를 설치하여, 챔버의 내측으로 공급되는 가스가 하측에서 균일하게 공급되도록 함으로서, 급격한 가스공급에 의한 압력측정기의 오동작을 방지하고, 공급되는 가스에 의하여 웨이퍼가 떨어져서 파손되는 것을 방지하게 되어 생산성이 향상되는 효과가 있다.As described in detail above, the wafer cooling apparatus of the inventive semiconductor VDD device connects the gas supply line to the lower side of the chamber, and installs a diffuser on the inner side of the chamber so as to be connected to the gas supply line. By uniformly supplying the supplied gas from the lower side, it is possible to prevent malfunction of the pressure gauge due to sudden gas supply and to prevent the wafer from being broken by the supplied gas, thereby improving productivity.

Claims (1)

가스공급라인을 통하여 챔버의 내측으로 냉각가스를 공급할 수 있도록 되어 있는 반도체 피브이디장비의 웨이퍼 냉각장치에 있어서, 상기 가스공급라인이 챔버의 하면 일측에 연결되며, 그 가스공급라인에 연결되도록 챔버의 내측 하면에 균일한 냉각가스 공급을 위한 디퓨져를 설치하되, 그 디퓨져는 상면에 일정깊이의 가스유입홈이 길이방향으로 형성되어 있는 원형의 몸체와, 상기 몸체의 상면에 설치되며 압력측정기에서 압력변화를 정확하게 측정할 수 있도록 균일하게 가스를 분사하기 위한 분사망으로 구성되는 것을 특징으로 하는 반도체 피브이디장비의 웨이퍼 냉각장치.In the wafer cooling apparatus of the semiconductor PV device that can supply the cooling gas to the inside of the chamber through the gas supply line, the gas supply line is connected to one side of the lower surface of the chamber, so that the chamber is connected to the gas supply line A diffuser for uniformly supplying a cooling gas is installed on the inner lower surface of the diffuser, and the diffuser has a circular body having a gas inlet groove of a predetermined depth formed in a longitudinal direction on the upper surface thereof, and is installed on the upper surface of the body and pressured by a pressure gauge. Wafer cooling device of a semiconductor PD device, characterized in that consisting of a spray network for injecting the gas uniformly so that the change can be accurately measured.
KR2019970022534U 1997-08-20 1997-08-20 Wafer cooling apparatus for semiconductor pvd system KR200211242Y1 (en)

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KR2019970022534U KR200211242Y1 (en) 1997-08-20 1997-08-20 Wafer cooling apparatus for semiconductor pvd system

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KR2019970022534U KR200211242Y1 (en) 1997-08-20 1997-08-20 Wafer cooling apparatus for semiconductor pvd system

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KR19990009334U KR19990009334U (en) 1999-03-15
KR200211242Y1 true KR200211242Y1 (en) 2001-04-02

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