KR20020096804A - Method for controlling recording power in the optical drive and apparatus thereof - Google Patents

Abstract

PURPOSE: A method and a device for controlling write power in an optical driver are provided to reduce the size of firmware by preventing unnecessary channels from being used in performing a write mode. CONSTITUTION: A method for controlling write power in an optical driver includes the steps of checking whether write power provided to a laser diode installed at the optical driver is in a stable state(301); controlling to provide write power for driving the laser diode by increasing a number of channels to be used for controlling write power if recording power is in a non-stable state(302-304); controlling to provide write power for driving laser diode by using less channels than channels used in the non-stable state if write power in a stable state(305).

Description

Method and controlling recording power in the optical driver

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for controlling the recording power in an optical driver. In particular, the present invention relates to a method for controlling recording power by optimizing the number of channels used to drive a laser diode (hereinafter, referred to as LD) when performing a recording mode. A method and apparatus are disclosed.

The optical driver records data on a disc such as a CD or a DVD or reproduces data recorded on the disc. Such an optical driver stops recording when an emergency such as a buffer under run occurs in the write mode, and thus cannot obtain a normal recording result. Therefore, when performing the recording mode, techniques have been proposed to perform re-recording at a position where recording is interrupted so that a normal recording result can be obtained even in an emergency.

However, after the recording mode is controlled, it takes some time for the power voltage output from the APC (Auto laser diode Power Control, APC) circuit to reach a stable level. Therefore, when rewriting is attempted at the position where recording is interrupted, since the write data is generated before the power voltage output from the APC circuit reaches a stable level, normal recording is not performed, thereby causing a problem of data loss. .

In order to solve this problem, conventionally, after the recording mode is controlled, a technique of stabilizing the voltage of the recording power early by adding a predetermined ratio of the expected power voltage to the power voltage output from the APC circuit is known. It has been proposed.

However, the proposed technique is implemented so that a certain ratio of the expected power voltage is added to the power voltage output from the APC circuit by using one more channel used to drive the LD, thereby reducing the voltage of the write power. It can be stabilized at an early stage to prevent data loss in the execution period of the initial recording mode, but it is also necessary to continue to manage the additional channels even after the level of the recording power output from the APC circuit is stabilized to manage unnecessary channels as well. The size of firmware in the driver increases. In addition, when the recording mode is controlled by the proposed technique, it is not possible to control the voltage of the recording power to a value lower than the predetermined ratio voltage during the recording mode execution period.

Accordingly, an object of the present invention is to provide a method and apparatus for controlling recording power by optimizing the number of channels used to drive a laser diode while stabilizing the voltage level of the recording power at an early stage when the recording mode is performed in the optical driver. have.

In order to achieve the above objects, a method according to the present invention includes a method of controlling a write power in an optical driver, the method comprising: checking whether a write power provided to a laser diode provided in the optical driver is stabilized; A first control step of controlling the write power to drive the laser diode by increasing the number of channels used to control the write power when the write power is unstabilized; If the write power is in a stabilized state, it is preferable to include a second control step of controlling to provide a write power for driving the laser diode using a less number of channels than the number of channels used in the non-stabilized state.

The step of checking whether the stabilization is performed is preferably performed by using a signal provided to the optical driver to sample and hold the output of the photodiode (FPD) for monitoring the light emission of the laser diode in a predetermined section.

In addition, in order to stabilize the write power provided to the laser diode early among the channels used in the first control step, the second control step may turn off a channel providing a voltage corresponding to a predetermined ratio of the expected write power voltage. It is desirable to reduce the number of channels used than the number of channels used in the first control step.

The recording power control method is preferably performed when the recording mode is controlled again after an emergency occurs in the optical driver to stop the recording mode.

In order to achieve the above objects, an apparatus according to the present invention includes: a recording power control apparatus in an optical driver, comprising: a laser diode emitting light; A photodiode for monitoring the amount of light emitted from the laser diode; A channel used to distinguish between a non-stabilized state and a stabilized state with respect to the state of the recording power provided to the laser diode based on a signal obtained by sampling and holding the photodiode's output signal at a predetermined interval, and used in the non-stabilized state and the stabilized state. It is preferable to include a control unit for controlling the recording power provided to the laser diode by varying the number.

1 is a block diagram of one embodiment of a recording power control apparatus according to the present invention in an optical driver.

FIG. 2 is a timing diagram of control signals for driving the LD driver shown in FIG. 1.

3 is an operational flow diagram of a recording power control method according to the present invention.

4 is a relationship diagram between a recording mode control signal and a recording power level according to the present invention.

5 is a block diagram of another embodiment of a recording power control apparatus according to the present invention in an optical driver.

6 is an example of the APC circuit for the recording channel shown in FIGS. 1 and 5.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of an embodiment of a recording power control apparatus according to the present invention in an optical driver. Referring to Figure 1, the recording power control apparatus according to the present invention is a control unit 101 for controlling the recording power to be provided to the LD in accordance with the present invention, WPDC (WPDC, which is a write power voltage, weak) APC circuit 102 for a recording channel for providing a, APC circuit 103 for a reproducing channel for providing a reproducing power voltage RPDC (hereinafter, referred to as RPDC), and a digital-to-analog converter (hereinafter, referred to as DAC) ( 104), LD driver 105 for driving a laser diode (hereinafter referred to as LD), I / V amplifier 106, LD that emits light to a disk not shown, and the amount of light emitted from LD And a front photodiode (also called a monitor photodiode, hereinafter abbreviated as FPD).

The controller 101 controls the overall function of the optical driver so as to optimize the number of channels used to drive the LD while stabilizing the voltage level of the recording power early in the recording mode. That is, the control unit 101 divides the voltage level of the recording power output from the recording channel APC circuit 102 into an unstable state and a stabilized state, and determines the number of channels used for controlling the write power in the unstable state. The voltage of the write power for driving the LD is controlled while managing the channels more than the number of channels used for controlling the write power in the stabilized state. When the voltage level of the recording power output from the recording channel APC circuit 102 is unstable, it means that the light output level of the LD is in an unstable state which is not suitable for performing the recording mode. The voltage level of the recording power output from 102 is in a stabilized state, meaning that the light output level of the LD is in a stabilized state suitable for performing the recording mode.

The recording mode is controlled again after an interruption such as a buffer underrun, or the normal recording mode is controlled, and the output of the sampled and held FPD transmitted from the recording channel APC circuit 102 (Front Photo Diode Output) When the voltage level of the recording power output from the recording channel APC circuit 102 is unstable by the signal FPDO_SH, the controller 101 controls the recording channel APC circuit 102 and the reproduction channel. The reference voltage for the APC circuit 103 for outputting a voltage corresponding to a predetermined ratio of the over-drive power voltage and the expected write power voltage, respectively.

The voltage corresponding to a predetermined ratio of the expected write power voltage is also referred to as a write power for APC voltage. The predetermined ratio may be determined in the range of 80% to 90% of the expected write power voltage, but this embodiment outputs a voltage corresponding to 80%. The 80% to 90% may be changed in accordance with a range or an operating condition of the optical driver determined in consideration of both the relationship with the recording power provided through the other channel and the timing when the light output state of the LD is stabilized.

Accordingly, the digital-to-analog converter (hereinafter referred to as DAC) 104 outputs a reference voltage for the APC circuit 103 for the reproduction channel through the DA1 channel, and outputs the reference voltage for the APC circuit 102 for the recording channel through the DA2 channel. A reference voltage is output, a voltage for overdrive power is output through the DA3 channel, and a voltage corresponding to a predetermined ratio of the expected write power voltage is output through the DA4 channel. The voltages of the write power output to the DA3 and DA4 channels are transmitted directly to the LD driver 105, respectively.

As such, when the voltage level of the recording power output from the recording channel APC circuit 102 is unstable, the controller 101 may output the voltages through the DA1, DA2, DA3, and DA4 channels of the DAC 104. ) Manages the channel.

The APC circuit 102 for the recording channel compares the voltage of the output power of the LD fed back through the front photo diode (FPD) and the current / voltage (I / V) amplifier 106 and the DA2 channel of the DAC 104. The FPDO_SH is provided to the controller 101 while adjusting the level of the WPDC applied to the LD driver 105 so that the output power of the LD can be kept constant using the voltage provided through the LD driver 105. The I / V amplifier 106 outputs an output signal of the applied FPD as a voltage value amplified to a predetermined value.

The APC circuit 103 for the reproduction channel uses the voltage of the output power of the LD fed back through the FPD and the I / V amplifier 106 and the voltage provided through the DA1 channel of the DAC 104 to increase the output power of the LD. The RPDC level applied to the LD driver 105 is adjusted to be kept constant.

The LD driver 105 includes voltage amplifiers AMP1 to AMP4, switches SW1 to SW4, and a transistor Q1 that amplify voltages input through four input stages to predetermined values, respectively, to drive the LD. To provide recording and playback power.

That is, the level of the recording power provided to the LD in order to form one pit on the disk (not shown) is divided into the driving power level section, the base level section and the reproduction level section as shown in FIG. In the case of the LD driver 105, the switch SW3 is controlled by an over-drive power level interval control signal provided as shown in FIG. 2B from an unshown end deck (abbreviation of ENDEC, ENcoder & DECoder). The switches SW2 and SW4 are operated by a base level interval control signal provided as shown in FIG. 2 (c) from the end deck, and is provided from the controller 101. The switch SW1 is operated by an enable signal for a read channel provided as shown in d).

That is, in the excessive driving power level section, the LD driver 105 turns on all the switches SW1 to SW4 according to the signals provided as shown in FIGS. 2B, 2C, and 3D. In the base level period, the LD driver 105 switches SW1, 2, and 4 for the remaining channels except for the switch SW3 according to each signal provided as shown in FIGS. 2B, 2C, and 3D. ) Is on. In the reproduction level section, the LD driver 105 turns on only the switch SW1 according to each signal provided as shown in FIGS. 2B, 2C, and 3D.

Then, as the switches SW1 to SW4 are turned on and off, a voltage plus a level of voltages transmitted from the amplifiers AMP1 to AMP4 is supplied to the LD through the transistor Q1 to provide the write power required for driving the LD. do.

As described above, when the WPDC is in an unstable state, the control unit 101 provides the recording power for driving the LD using the four channels DA1, DA2, DA3, and DA4, so that the light output state of the LD can be made early. To reach a steady state.

Meanwhile, when the WPDC output from the recording channel APC circuit 102 is recognized as stabilized by the FPDO_SH transmitted from the recording channel APC circuit 102, the controller 101 corresponds to a predetermined ratio of the expected write power voltage. Turn off the DA4 channel so that no voltage is output.

At this time, the control unit 101 may be implemented so that the DA4 channel of the DAC 104 is turned off immediately, but the voltage level output through the DA4 channel is lowered and the voltage level output through the DA2 channel of the DAC 104 is increased to increase the DA4 channel. After adjusting the output voltage level to be 0V, the DA4 channel can be implemented to be off.

When the DA4 channel is off, the DAC 104 does not output any signal through the DA4 channel, but only outputs the signal through the DA1, DA2, and DA3 channels.

As described above, when the WPDC is in the stabilized state, the control unit 101 provides the recording power for driving the LD using the three channels DA1, DA2, and DA3, so that the rest of the light output state of the LD is stabilized. The channel is managed so that an unnecessary channel DA4 is not used during the recording mode.

3 is a flowchart illustrating a method of controlling a write power according to the present invention. In step 301, it is checked whether the WPDC is stabilized based on the FPDO_SH signal. This has the same meaning as checking whether the LD light output state is stabilized. Checking whether the stabilization state is performed by checking whether there is a difference between the level of the previous FPDO_SH signal and the level of the current FPDO_SH signal.

As a result of the check, if there is a difference between the previous FPDO_SH signal and the currently applied FPDO_SH signal, it is determined that the WPDC is still in an unstable state, and the process returns to step 301 in step 302 to continuously check the stabilization state for the WPDC.

When the WPDC is in a non-stabilized state, as described in the controller 101 of FIG. 1, the channel is managed to further use the DA4 channel so that the voltage level of the recording power provided to the LD can reach the stabilized state early. .

However, if it is recognized that the WPDC has reached the stabilization state as a result of continuously checking the stabilization state with respect to the WPDC, the process proceeds from step 302 to step 303 where the level of the voltage output through the DA4 channel of the current DAC 104 is 0V. Check for acknowledgment. As a result, if it is not 0V, the process proceeds to step 304 to increase the voltage to be output through the DA2 channel of the DAC 104 by a certain level and to lower the voltage to be output through the DA4 channel of the DAC 104 by a certain level. After controlling the level of each recording power, the process returns to step 301 to perform the above-described process again. At this time, the predetermined level for the DA2 channel and the DA4 channel may be the same. For example, if the voltage for the DA2 channel is controlled to increase by 5%, the voltage for the DA4 channel can also be controlled to be reduced by 5%.

As described above, when it is recognized that the voltage for the DA4 channel reaches 0V by adjusting the voltages for the DA2 and DA4 channels, the DA4 channel is controlled to be turned off in step 305. As a result, the DA4 channel of the DAC 104 is turned off. Therefore, subsequent write power control controls the write power to a channel (three channels) where one channel is smaller than when the level of the WPDC is unstabilized.

In step 306, it is checked whether the recording mode is terminated. When the recording mode is finished, the operation ends. However, if the recording mode has not ended, the flow advances to step 307 to continue the recording mode.

As a result, the LD driver 105 does not display the DA4 channel of the DAC 104 even if the operation control signals provided from the not-shown end deck and the controller 101 are provided as shown in FIGS. 2B, 2C, and 3D. Since it is off, the transmission path for the DA4 channel in the LD driver 105 becomes meaningless.

As shown in FIG. 4A, in the period in which the recording mode control signal is high, the voltage level of the recording power by the WPDC is unstable in the period of performing the initial recording mode as shown in FIG. 4B. Even if the state is maintained, the voltage level of the recording power provided to the LD is stabilized early by the voltage of the recording power provided through the channel DA4 as shown in Fig. 4C.

When the voltage level of the recording power provided to the LD reaches the stabilization state, the voltage level of the recording power provided through the DA2 channel and the DA4 channel is adjusted as in step 304, and the recording power provided through the DA4 channel is adjusted. When the voltage level is 0V, the DA4 channel is turned off, and the channel is managed so that the DA4 channel is not used during the remaining recording mode execution period in which the voltage level of the write power provided to the LD can be stabilized only by the WPDC.

5 is a block diagram of another embodiment of a recording power control apparatus according to the present invention in an optical driver. Referring to FIG. 5, a recording power control apparatus according to the present invention includes a control unit 501 for controlling write power to be provided to an LD according to the present invention, and an APC circuit 502 for a recording channel providing a WPDC, which is a write power voltage. ), An APC circuit 503 for a regeneration channel providing a regeneration power voltage RPDC, a DAC 504, an LD driver 505 for driving an LD, an I / V amplifier 506, an adder 507, a US It consists of LD that emits light to the disk shown, and FPD that monitors the amount of light emitted from LD.

The recording power control apparatus includes a control unit 501, a recording channel APC circuit 502, a reproduction channel APC circuit 503, a DAC 504, an I / V amplifier 506 and an adder 507 as a single unit. The chip may be implemented as a chip, or the controller 501, the recording channel APC circuit 502, the reproduction channel APC circuit 503, the DAC 504, and the adder 507 may be configured as one chip. In addition, the adder 507 may be implemented to be included in the APC circuit 502 for the recording channel. And, the means broadly composed of the adder 507, the APC circuit 502 for the recording channel, the I / V amplifier 506, the DAC 504, and the controller 501 can be referred to as the recording power providing means. By means of the adder 507, the recording channel APC circuit 502 and the control unit 501, the recording power providing means can be referred to.

LD, FPD, control unit 501, APC circuit 502 for recording channel, APC circuit 503 for reproduction channel, DAC 504 and I / V amplifier 506 shown in FIG. It is constructed and operated in the same manner as the LD, FPD, control unit 101, APC circuit 102 for recording channel, APC circuit 103 for reproduction channel, DAC 104 and I / V amplifier 106. Therefore, operations of them are not described in order to avoid duplication of description.

The adder 507 outputs, to the LD driver 505, WPDC 'plus the voltage of the write power output through the DA4 channel of the DAC 504 and the WPDC output from the APC circuit 502 for the write channel. That is, when the voltage level of the recording power output from the recording channel APC circuit 502 is unstable, the controller 501 controls the channel so that voltages are output through the DA1, DA2, DA3, and DA4 channels of the DAC 504. For managing, the adder 507 outputs WPDC 'which is the WPDC output from the recording channel APC circuit 502 plus the voltage of the recording power output through the DA4 channel of the DAC 504. However, when the voltage level of the recording power output from the recording channel APC circuit 502 is stabilized, the adder 507 because the control unit 501 manages the channel so that the voltage is not output through the DA4 channel of the DAC 504. ) Outputs the WPDC output from the recording channel APC circuit 502 to WPDC '. WPDC 'is transmitted to the LD driver 505.

Unlike the LD driver 105 of FIG. 1, the LD driver 505 includes amplifiers AMP1 to AMP3, switches SW1 to SW3, and transistors Q1 that amplify voltages input through three input terminals to predetermined values. And provide recording and reproducing power for driving the LD. The amplifiers AMP1 to AMP3, the switches SW1 to SW3, and the transistor Q1 include the amplifiers AMP1 to AMP3, the switches SW1 to SW3, and the transistor Q1 that exist in the LD driver 105 of FIG. Works the same as

That is, in the case where the level of the recording power provided to the LD is divided into an overdrive power level section, a base level section, and a reproduction level section to form one foot on a disk not shown, the LD driver 505 is not shown. The switch SW3 is operated by the over-drive power level section control signal provided from the end deck so that the voltage of the write power output from the amplifier AMP3 is transmitted to the switch SW1, and the base level section control signal provided from the end deck. The switch SW2 is operated to transmit the voltage of the recording power output from the amplifier AMP2 to the switch SW1, and the switch SW1 is activated by the enable signal for the reproduction channel provided from the controller 501. The voltage of the write power outputted from the amplifiers AMP1 to AMP3 is transmitted to the base terminal of the transistor Q1.

6 is an example of the APC circuits 102 and 502 for the recording channel shown in FIGS. 1 and 5. Referring to FIG. 6, the APC circuits 102 and 502 for the recording channel include a sampling and holding unit ( 601), an operational amplifier (hereinafter referred to as OP AMP) 602, and a differential amplifier (hereinafter referred to as DIFF AMP) 603.

The sampling and holding unit 601 outputs FPDO_SH obtained by sampling and holding a predetermined section of the voltage output from the I / V amplifiers 106 and 506. The output FPDO_SH is transmitted to the control unit 101 (501) and the OP AMP (602).

The OP AMP 602 amplifies the FPDO_SH output by using the reference voltage Vref to a predetermined value and outputs it to the DIFF AMP 603. The DIFF AMP 603 detects a difference value by comparing the voltage transmitted from the OP AMP 602 and the voltage transmitted through the DA2 channel of the DAC 104, 504. The result of adding or subtracting the voltage transmitted through the WPDC is output. That is, when the voltage output from the OP AMP 602 is greater than the voltage transmitted through the DA2 channel, the result of subtracting the difference value detected from the voltage transmitted through the DA2 channel is output to the WPDC. On the other hand, if the voltage output from the OP AMP 602 is less than the voltage transmitted through the DA2 channel, the result of adding the detected difference value to the voltage transmitted through the DA2 channel is output to the WPDC. The operation of the OP AMP 602 and the DIFF AMP 603 compensates for the change in the recording power according to the temperature change of the LD.

The above-described embodiment is driven in the case of an optical driver driven by dividing the recording power for one foot into an over driving power level, a base level, and a reproducing level, or by dividing into a over driving power level, an erase level, and a reproducing level. It is also applicable to an optical driver.

According to the present invention described above, when the recording mode is performed in the optical driver, the base level section (or the erasing level section) when the recording mode is performed again or the normal recording mode is performed at the position where the recording is stopped due to an emergency occurrence. The voltage level of the write power provided to the laser diode is controlled by using two channels to reach a stabilization state early. When the stabilization state is reached, the channel is used in one channel in the base level period (or erase level period). By controlling the voltage level of the recording power, it is possible to reduce the size of the firmware by preventing the use of unnecessary channels when performing the recording mode.

In addition, it is possible to control the recording power of a voltage lower than the voltage level set in the DA4 channel in the recording mode performing section in which the voltage of the recording power provided to the laser diode is stabilized.

The present invention can be applied not only to the four-channel LD driver but also to the three-channel LD driver.

The present invention is not limited to the above-described embodiments, and variations of the present invention can be made by those skilled in the art within the spirit of the present invention. Therefore, the scope of claims in the present invention will not be defined within the scope of the detailed description will be defined by the claims below.

Claims (9)

In the recording power control method in the optical driver, Checking whether or not the recording power provided to the laser diode provided in the optical driver is stabilized; A first control step of controlling the write power to drive the laser diode by increasing the number of channels used to control the write power when the write power is unstabilized; And a second control step of controlling to provide the recording power for driving the laser diode using the number of channels less than the number of channels used in the non-stabilization state when the recording power is in the stabilized state. The method of claim 1, wherein the checking of the stabilization state is performed by using a signal that is provided in the optical driver to sample and hold an output of a photodiode (FPD) that monitors light emission of the laser diode at a predetermined interval. Recording power control method. The method of claim 1, wherein the checking of the stabilization state comprises a signal and a current output of a photodiode (FPD) that is provided in the optical driver to monitor light emission of the laser diode in a predetermined section. And comparing the signals sampled and held in a predetermined section to check whether the signals are stabilized. The method of claim 1, wherein the second control step comprises a voltage corresponding to a predetermined ratio of the expected write power voltage in order to stabilize the write power provided to the laser diode early among the channels used in the first control step. The number of channels used by turning off the provided channel is smaller than the number of channels used in the first control step. The recording power control method according to claim 1, wherein the recording power control method is performed when the recording mode is controlled again after an emergency occurs in the optical driver and the recording mode is interrupted. In the recording power control device in the optical driver, Laser diodes emitting light; A photodiode for monitoring an amount of light emitted from the laser diode; When the output signal of the photodiode is sampled and held in a predetermined section, the non-stabilized state and the stabilized state are distinguished with respect to the state of the write power provided to the laser diode. And a control unit for controlling the recording power provided to the laser diode by varying the number of channels used. The method of claim 6, wherein the controller corresponds to a predetermined ratio of the expected write power voltage in order to stabilize the write power provided to the laser diode early among the channels used in the non-stabilized state in the stabilized state. And a channel providing a voltage to be turned off. In the recording power control device in the optical driver, Laser diodes emitting light; A photodiode for monitoring the amount of light emitted from the laser diode; A laser diode driver providing power for driving the laser diode; When the recording power provided to the laser diode is in a non-stabilized state, the automatic power level for the recording channel detected by using a signal sampled and held in a predetermined section of the photodiode in a predetermined interval and a predetermined reference voltage and the expected recording power The recording power obtained by adding a voltage corresponding to a predetermined ratio is provided to the laser diode, and when the recording power provided to the laser diode is stabilized, the recording power in which the voltage corresponding to a predetermined ratio of the expected recording power is excluded. And a recording power providing means for providing the laser diode to the laser diode. In the recording power control device in the optical driver, Laser diodes emitting light; A photodiode for monitoring an amount of light emitted from the laser diode; Sampling and holding the output signal of the photodiode in a predetermined section, and outputting a voltage for a recording channel capable of keeping the output power of the laser diode constant using the sampled and held signal and a first predetermined reference voltage. Automatic write power control circuitry for channels; An automatic recording power control circuit for a reproduction channel for outputting a voltage for a reproduction channel capable of maintaining a constant output power of the laser diode by using the output signal of the photodiode and a second predetermined reference voltage; On the basis of the sampled and held signal provided from the automatic recording power control circuit for the recording channel, the non-stabilized state and the stabilized state are distinguished with respect to the state of the write power provided to the laser diode, A controller for differently controlling the number of channels used to control the recording power in the state; Controlled by the control unit to output the first predetermined reference voltage and the second predetermined reference voltage to the automatic recording power control circuit for the recording channel and the automatic recording power control circuit for the reproduction channel, respectively, the voltage for the overdrive power and the expected A digital / analog converter each outputting a voltage corresponding to a predetermined ratio of the recording power; An adder for adding and outputting a voltage corresponding to a predetermined ratio between the voltage output from the automatic power control circuit for the recording channel and the expected write power output from the digital / analog converter; A laser diode driver providing write and / or regeneration power for driving said laser diode using an overdrive power voltage output from said adder, said automatic power control circuit for said regeneration channel and said digital / analog converter; Recording power control device.