KR20020072005A - Contactless smart card - Google Patents

Abstract

PURPOSE: A contactless smart card is provided to have a buffer address generating circuit automatically allocating the error buffer to a spare buffer. CONSTITUTION: A buffer counter(100) counts the read/write number of buffer. An address selector(120) outputs the selection signal by responding to the signal of the buffer counter. The first multiplexer(140) receives other upper address matching to the upper address of the buffer address for allocating the buffer and selectively outputs one from other upper addresses by responding to the selection signal output from the address selector. A buffer address judging part(180) judges whether the address offered from the outside is the buffer address or not. When the output signal of the buffer address judging part represents that the address offered from the outside is the buffer address, the second multiplexer(160) outputs the buffer address comprising the upper address bits from the first multiplexer and the lower address bits of the address offered from the outside.

Description

Contactless smart card {CONTACTLESS SMART CARD}

The present invention relates to a contactless smart card, and more particularly to a circuit for generating a buffer address of a data buffer used in a contactless smart card.

A contactless smart card is a card operated from a power supply from a proximity coupling device (PCD). Therefore, if the power supply from the PCD is insufficient or unstable while the write operation is being performed on the card, or if it is out of the operating distance, the write operation is abnormally terminated.

To overcome this, when writing data, copy (or write) the data in the place to be written to the data buffer to restore the data in the event of an error. Therefore, it is necessary to efficiently handle errors that may occur in the data buffer (durability, buffer error, etc.) to perform a data writing operation safely.

It is an object of the present invention to provide a contactless smart card having a buffer address generation circuit which automatically allows a defective buffer to be designated as a spare buffer.

1 is a block diagram illustrating a buffer address generation circuit of a contactless smart card according to a preferred embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

100: buffer counter 120: address selector

140, 160: multiplexer 180: buffer address determination unit

(Configuration)

According to an aspect of the present invention for achieving the above object, a buffer address generation circuit for a contactless smart card having a data recovery buffer includes a buffer counter for counting the number of read / write times of the buffer; An address selector for outputting a selection signal in response to a signal of the buffer counter indicating the number of read / write times of the buffer; A first multiplexer which accepts other upper addresses corresponding to upper addresses of the buffer address for designating the buffer and selectively outputs one of the other upper addresses in response to a selection signal output from the address selector; A buffer address judging unit for judging whether an address provided from the outside is a buffer address; When the output signal of the buffer address determination unit indicates that the address provided from the outside is a buffer address, the buffer address formed by combining the upper address bits from the first multiplexer and the lower address bits of the address provided from the outside is determined. And a second multiplexer for outputting.

In this embodiment, the buffer consists of EEPROM.

In this embodiment, the value of the buffer counter is variably set according to the endurance characteristic of the EEPROM.

In this embodiment, when the output signal of the buffer address determining unit indicates that the address provided from the outside is not a buffer address, the second multiplexer outputs the address provided from the outside as it is.

(Action)

According to such an apparatus, the upper address bits of the buffer address are determined according to the output value of the buffer counter, thereby automatically generating hardware addresses instead of software.

(Example)

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

The novel contactless smart card of the present invention includes a buffer address generating circuit, which internally generates the upper address bits of the currently available buffer address according to the value of the built-in buffer counter, and is provided from the outside. The lower address bits of the NVM address and the upper address bits are combined to generate the buffer address. According to this circuit configuration, since the buffer address is always the buffer address specifying the buffer initially set at the software entry, the buffer address management can be performed in hardware instead of software.

1 is a block diagram illustrating a buffer address generation circuit of a contactless smart card according to a preferred embodiment of the present invention.

Referring to FIG. 1, a buffer address generation circuit includes a buffer counter 100, an address selector 120, a first multiplexer 140, a second multiplexer 160, and a buffer address discrimination unit 180. The buffer counter 100 is a value determined according to the durability characteristics of a nonvolatile semiconductor memory device (for example, EEPROM, FLASH memory, FRAM, NROM) (hereinafter referred to as NVM) used as a data buffer of a contactless smart card. Such value may vary depending on the durability characteristics of the NVM. The buffer counter 100 outputs, for example, a value of "0001" when the counted number is present between 0 and 100 million times. The output value of the buffer counter 100 therefore represents the number of reads / writes of the NVM. The buffer counter 100 outputs a value of "0010" when the counted number exists between 1 million and 2 million times, and outputs a value of "0100" when the counted number exists between 2 million and 3 million times. When the counted number is more than 4 million times, a value of "1000" is output.

The address selector 120 receives 4-bit data output from the buffer counter 100 and outputs a 2-bit select signal. Here, when the output value of the address selector 120 is "00", the number of reads / writes of the NVM is 0 to 1 million times or less, and when the output value of the address selector 120 is "01", the number of reads / writes of the EEPROM is When 1 million to 2 million times or less and the output value of the address selector 120 is "10" NVM read / write times are 2 to 3 million times or less and the output value of the address selector 120 is "11" NVM The number of reads / writes is over 4 million times.

The first multiplexer 140 selectively outputs one of the four upper 8-bit addresses 90h, 91h, 92h, 93h of the buffer address in response to the output signal of the address selector 120. The buffer address determination unit 180 determines whether the currently input NVM address is a buffer address (for example, 9000h). The second multiplexer 160 outputs one of the first and second addresses as a buffer address in response to an output signal of the buffer address determination unit 180.

Here, the first address is an NVM 16-bit address provided from the outside, and the second address is a lower 8-bit address of the NVM 16-bit address and an upper 8-bit output from the first multiplexer 140. It is the sum of addresses. If the currently input NVM address is a buffer address, the second multiplexer 160 outputs the second address. If the currently input NVM address is not a buffer address, the second multiplexer 160 outputs the first address.

In the above, the configuration and operation of the circuit according to the present invention has been shown in accordance with the above description and drawings, but this is only an example, and various changes and modifications can be made without departing from the spirit and scope of the present invention. Of course.

As described above, the upper address bits of the buffer address are determined according to the output value of the buffer counter, thereby automatically generating hardware addresses instead of software.

Claims (4)

In a buffer address generation circuit for a contactless smart card having a data recovery buffer: A buffer counter for counting the number of read / write times of the buffer; An address selector for outputting a selection signal in response to a signal of the buffer counter indicating the number of read / write times of the buffer; A first multiplexer which accepts other upper addresses corresponding to upper addresses of the buffer address for designating the buffer and selectively outputs one of the other upper addresses in response to a selection signal output from the address selector; A buffer address judging unit for judging whether an address provided from the outside is a buffer address; When the output signal of the buffer address determination unit indicates that the address provided from the outside is a buffer address, the buffer address formed by combining the upper address bits from the first multiplexer and the lower address bits of the address provided from the outside is determined. And a second multiplexer for outputting. The method of claim 1, And the buffer comprises a nonvolatile semiconductor memory device. The method of claim 2, And a value of the buffer counter is variably set according to the durability characteristic of the nonvolatile semiconductor memory device. The method of claim 3, wherein And the second multiplexer outputs the address provided from the outside as it is when the output signal of the buffer address determining unit indicates that the address provided from the outside is not the buffer address.