KR20020072003A - A wafer chuck for a semiconductor device fabrication installation - Google Patents
A wafer chuck for a semiconductor device fabrication installation Download PDFInfo
- Publication number
- KR20020072003A KR20020072003A KR1020010011937A KR20010011937A KR20020072003A KR 20020072003 A KR20020072003 A KR 20020072003A KR 1020010011937 A KR1020010011937 A KR 1020010011937A KR 20010011937 A KR20010011937 A KR 20010011937A KR 20020072003 A KR20020072003 A KR 20020072003A
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- South Korea
- Prior art keywords
- wafer chuck
- wafer
- chuck
- present
- pin
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68742—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
본 발명은 반도체 제조 공정에 사용되는 웨이퍼 척에 관한 것이다.The present invention relates to a wafer chuck for use in semiconductor manufacturing processes.
일반적으로, 웨이퍼의 표면에 감광액(Photo Resist : PR)을 고르게 도포해주는 스핀 코팅설비나 감광액 현상설비 등의 반도체 제조 공정에서는 웨이퍼를 진공흡착하여 고속으로 회전시키기 위한 스핀들 척이 사용되고 있다.In general, in a semiconductor manufacturing process such as a spin coating facility or a photoresist developing facility for evenly applying a photo resist (PR) to a surface of a wafer, a spindle chuck for rotating the wafer at high speed is used.
도 1에 도시된 바와 같이, 기존에 사용중인 웨이퍼 척(wafer chuck;10)은 외경 사이즈가 191.4mm로 되어 있어 웨이퍼(200mm) 척 에지와 센터 부위의 평탄도 단차 발생으로 에지 쇼트의 포커스(focus) 차가 발생된다.As shown in FIG. 1, the wafer chuck 10 currently in use has an outer diameter of 191.4 mm, and thus the focus of the edge shot is caused by a flatness step between the wafer 200 mm chuck edge and the center portion. ) A difference is generated.
그래서 에지 쇼트(edge shot)의 포커스(focus)를 보완하기 위해 에지 쇼트(edge shot)의 이미지(image)값(포커스, e.t)를 추가하여 진행하고 있다. 현재의 문제점은 에지 쇼트 이미지 값을 확인하기 위해서 에지 쇼트 스플릿을 하는 시간이 길며, 또 미스(miss) 이미지값 입력시 품질 사고가 발생하게 된다.Therefore, in order to compensate for the focus of the edge shot, an image value (focus, e. T) of the edge shot is added and progressed. The current problem is that it takes a long time to perform an edge short split to check an edge short image value, and a quality accident occurs when inputting a miss image value.
또한, 기존 웨이퍼 척의 리프트 핀은 라운드 처리가 되어 있지 않아 웨이퍼의 저면에 스크래치를 유발시켜 왔다.In addition, the lift pin of the existing wafer chuck is not rounded, causing scratches on the bottom of the wafer.
본 발명은 이와 같은 종래의 문제점을 해결하기 위한 것으로, 그 목적은 에지 쇼트 CD 프로파일을 개선할 수 있는 새로운 형태의 반도체 웨이퍼 척을 제공하는데 있다.The present invention has been made to solve such a conventional problem, and an object thereof is to provide a new type of semiconductor wafer chuck that can improve the edge shot CD profile.
도 1은 종래 스핀들 척의 평면도;1 is a plan view of a conventional spindle chuck;
도 2는 본 발명의 바람직한 실시예에 따른 웨이퍼 척의 평면도;2 is a plan view of a wafer chuck in accordance with a preferred embodiment of the present invention;
도 3은 본 발명의 실시예에 따른 웨이퍼 척의 부분 단면도;3 is a partial cross-sectional view of a wafer chuck in accordance with an embodiment of the present invention;
도 4는 본 발명의 실시예에 따른 웨이퍼 척의 리프트 핀을 보여주는 도면;4 shows a lift pin of a wafer chuck in accordance with an embodiment of the present invention;
도 5에는 본 발명의 바람직한 실시예에 따른 웨이퍼 척의 제작 사양을 보여주는 도면이다.5 is a view showing the manufacturing specifications of the wafer chuck according to a preferred embodiment of the present invention.
* 도면의 주요 부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings
112 : 리브120 : 리프트 핀112: rib 120: lift pin
122 : 상단핀124 : 하단핀122: top pin 124: bottom pin
이와 같은 목적을 달성하기 위하여, 본 발명의 웨이퍼 척은 가장자리의 평탄도를 향상시키기 위한 리브가 2단으로 형성된다. 이와 같은 본 발명에서 상기 웨이퍼 척은 척으로부터 웨이퍼를 로딩 언로딩 하기 위한 리프트 핀을 갖는다. 이 리프트 핀은 2단 핀으로 이루어진다. 이 리프트 핀은 웨이퍼와의 스크래치를 줄이기 위하여 라운딩 처리될 수 있다. 이와 같은 본 발명에서 상기 웨이퍼 척의 외경은198-198.5일 수 있다.In order to achieve this object, the wafer chuck of the present invention has two stages of ribs for improving the flatness of the edge. In the present invention, the wafer chuck has a lift pin for loading and unloading the wafer from the chuck. This lift pin consists of two pins. This lift pin can be rounded to reduce scratches with the wafer. In the present invention as described above the outer diameter of the wafer chuck may be 198-198.5.
예컨대, 본 발명의 실시예는 여러 가지 형태로 변형될 수 있으며, 본 발명의 범위가 아래에서 상술하는 실시예로 인해 한정되어 지는 것으로 해석되어져서는 안 된다. 본 실시예는 당업계에서 평균적인 지식을 가진 자에게 본 발명을 보다 완전하게 설명하기 위해서 제공되어지는 것이다. 따라서, 도면에서의 요소의 형상 등은 보다 명확한 설명을 강조하기 위해서 과장되어진 것이다.For example, embodiments of the present invention may be modified in various forms, and the scope of the present invention should not be construed as being limited by the embodiments described below. This embodiment is provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape of the elements in the drawings and the like are exaggerated to emphasize a clearer description.
이하, 본 발명의 실시예를 첨부된 도면 도 2 내지 도 5에 의거하여 상세히 설명한다. 또, 상기 도면들에서 동일한 기능을 수행하는 구성 요소에 대해서는 동일한 참조 번호를 병기한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 2 to 5. In addition, in the drawings, the same reference numerals are denoted together for components that perform the same function.
도 2는 본 발명의 바람직한 실시예에 따른 웨이퍼 척의 평면도이다. 도 3은 본 발명의 실시예에 따른 웨이퍼 척의 부분 단면도이다. 도 4는 본 발명의 실시예에 따른 웨이퍼 척의 리프트 핀을 보여주는 도면이다.2 is a plan view of a wafer chuck in accordance with a preferred embodiment of the present invention. 3 is a partial cross-sectional view of a wafer chuck in accordance with an embodiment of the present invention. 4 illustrates a lift pin of a wafer chuck in accordance with an embodiment of the present invention.
도 2 및 도 3에서 보여주는 바와 같이, 본 발명의 실시예에 따른 웨이퍼 척(100)은 가장자리의 평탄도(flatness)를 향상시키기 위한 리브(rib)(112)가 2단으로 형성되어 있다. 그리고 상기 웨이퍼 척(100)의 외경은 198-198.5mm로 기존 척보다 외경 사이즈를 약 7.6-8.1mm 넓혔다. 또한, 상기 웨이퍼 척의 웨이퍼 접촉 면적은 기존의 14.3%에서 1.8%로 축소하였다.As shown in FIGS. 2 and 3, the wafer chuck 100 according to the embodiment of the present invention has ribs 112 formed in two stages to improve flatness of edges. The outer diameter of the wafer chuck 100 is 198-198.5 mm, which is about 7.6-8.1 mm wider than the conventional chuck. In addition, the wafer contact area of the wafer chuck was reduced from 14.3% to 1.8%.
도 4에 도시된 바와 같이, 상기 웨이퍼 척의 리프트 핀(120)은 2단 핀으로 이루어지며, 웨이퍼 저면과 맞닿는 면은 라운딩 처리를 하여 스크래치를 예방하였다. 상기 리프트 핀의 상단핀(122)은 0.25mm이고, 하단핀(124)은 1mm로 구성한다.As shown in FIG. 4, the lift pin 120 of the wafer chuck is composed of two-stage pins, and a surface contacting the bottom surface of the wafer is rounded to prevent scratches. The upper pin 122 of the lift pin is 0.25mm, the lower pin 124 is composed of 1mm.
도 5에는 본 발명의 바람직한 실시예에 따른 웨이퍼 척의 제작 사양이 자세히 기재되어 있다.5 details the fabrication specifications of the wafer chuck in accordance with the preferred embodiment of the present invention.
예컨대, 상기 웨이퍼 척은 silica class 또는 HPF 재질로 제작된다.For example, the wafer chuck is made of silica class or HPF material.
이와 같이 본 발명의 웨이퍼 척을 사용하면 평면 정도 향상 및 척 마모 발생이 적고, 정전기 발생이 없으며, 스크래치가 감소되는 이점이 있다.Thus, the use of the wafer chuck of the present invention has the advantage of improving the degree of flatness and less occurrence of chuck wear, generating no static electricity, and reducing scratches.
이상에서, 본 발명에 따른 웨이퍼 척의 구성 및 작용을 상기한 설명 및 도면에 따라 도시하였지만 이는 예를 들어 설명한 것에 불과하며 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 다양한 변화 및 변경이 가능함은 물론이다.In the above, the configuration and operation of the wafer chuck according to the present invention have been shown in accordance with the above description and drawings, but this is merely an example, and various changes and modifications are possible without departing from the technical spirit of the present invention. .
이와 같은 본 발명을 적용하면, 본 발명의 웨이퍼 척은 평탄도(flatness)가 향상되고, 정전기 발생이 없으며, 스크래치가 감소되는 효과가 있다.Applying the present invention, the wafer chuck of the present invention has the effect that the flatness (flatness) is improved, there is no static electricity generated, the scratch is reduced.
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020010011937A KR20020072003A (en) | 2001-03-08 | 2001-03-08 | A wafer chuck for a semiconductor device fabrication installation |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020010011937A KR20020072003A (en) | 2001-03-08 | 2001-03-08 | A wafer chuck for a semiconductor device fabrication installation |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20020072003A true KR20020072003A (en) | 2002-09-14 |
Family
ID=27696759
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020010011937A KR20020072003A (en) | 2001-03-08 | 2001-03-08 | A wafer chuck for a semiconductor device fabrication installation |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR20020072003A (en) |
-
2001
- 2001-03-08 KR KR1020010011937A patent/KR20020072003A/en not_active Application Discontinuation
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