KR20020070437A - Active package for integrated circuit - Google Patents

Abstract

An active package for an integrated circuit may include an integrated circuit and an active device that is part of the circuit topology for the integrated circuit. The active element forms at least part of the housing for the integrated circuit. The integrated circuit may be housed in an enclosure formed by one or more individual elements. The active package may be formed in the same geometry and dimensions as a standard passive integrated circuit package, or may be formed to fit inside a standard or specific manufactured battery package, or for other specific applications. Smart devices may include discrete devices or semiconductor based resistors, capacitors or inductors, and discrete integrated circuits housed in the same housing as discrete devices or semiconductor based resistors, capacitors or inductors. The integrated circuit may control at least one electrical parameter of an individual device or semiconductor based resistor, capacitor or inductor. In one embodiment, the integrated circuit may maintain the resistance, intrinsic resistance, capacitance, inductance, etc. of the device within a narrow range to form a high precision device regardless of environmental changes such as temperature, pressure, humidity, and the like.

Description

Active package for integrated circuits

Generally assembled circuits, such as PCB assembly circuits, are integrated circuits individually packaged in passive plastic or ceramic packages that package and protect the integrated circuits, and resistors, capacitors, or inductors, assembled with the integrated circuits on the PCB circuit board. It includes one or more individual elements. Also, assembled circuits such as power circuits, microprocessors, memory applications, logic devices, RF amplifiers, etc., also include transmission wires and soldered interconnects printed on a circuit board substrate, which are inherent in the transmission wires and soldered interconnects. Resistance, capacitance and inductance cause parasitic losses. This parasitic loss is significantly increased in the circuit when operating at high switching speeds. To minimize parasitic losses, circuit designers move circuit elements closer together on the circuit board. Although parasitic losses due to transmission wires can be reduced, placing devices in close proximity can cause energy radiation, such as electromagnetic or heat, generated by one or more devices to interfere with the operation of other devices. In addition, systems that handle higher currents have potential dielectric or dielectric breakdowns, energy storage requirements, heat dissipation, especially high transmission wiring losses in switching converters where this affects power conversion efficiency and voltage conversion efficiency, And inherent problems, such as the need for larger device sizes due to higher efficiency regulation.

For example, switching power converters, linear regulators, power integrators, charge pumps, op amp circuits, relay drive circuits, relay actuation circuits, power integrator circuits with power monitoring and power control, proximity switches, etc. Power circuits typically include one or more power conversion or regulation elements and one or more inherent energy conversion, storage or storage elements, which are packaged independently and / or a single PCB substrate and / or passive plastic or ceramic package (eg, mixed In the package). The switching converter may include a charge pump integrated circuit, a flying capacitor and a plurality of capacitors constituting the storage capacitor or the flying or storage capacitor. Various devices generate electromagnetic or thermal energy radiation, which affects the operation of other devices. In order to dissipate the generated heat, many power circuits include a heat sink attached to a plastic or ceramic package containing a power conversion or regulation element (eg, a TO220 standard power converter package). The total size of the package containing the heat sink is generally at least on the order of magnitude greater than the size of the integrated circuit itself according to power dissipation, power carrying capability and the required number of pins.

The present invention relates to an active package for integrated circuits and individual devices. More specifically, the present invention relates to an active package for an integrated circuit in which the package includes individual elements as part of a housing for the integrated circuit.

1 is a schematic diagram of a power integrator circuit including a charge pump power converter.

2 shows another embodiment of a power integrator circuit including a charge pump power converter.

3 is a schematic block diagram of a power integrator circuit including a charge pump, which may be contained within an active package of the present invention.

4 is a schematic exploded view of one embodiment of an active package design for the power integrator circuit shown in FIG.

5 is a schematic exploded sectional view taken along the line VV of FIG. 4;

FIG. 6 is a schematic exploded sectional view taken along the VI-VI line of FIG. 4; FIG.

7 is a schematic diagram of a power converter circuit including a DC / DC converter.

8 is a schematic block diagram of a circuit layout for the power converter circuit shown in FIG.

9 is a schematic exploded view of an active package design of the present invention for housing the power converter circuit shown in FIG.

10 is a schematic exploded view of an active package design of the present invention including an integrated circuit and a single discrete component.

11 is a cross-sectional view of the active package design of FIG. 10 along line XI-XI.

12 is a schematic diagram of an audio op amp power amplifier circuit.

13 illustrates another embodiment of an active package design of the present invention.

14 illustrates a battery including an active package design of the present invention.

15 illustrates another embodiment of an active package design of the present invention.

16 is a schematic exploded view of another embodiment of the present invention.

17 is a perspective view of another embodiment of the present invention.

18 is a cutaway view of the embodiment of FIG. 17;

19 is a schematic cutaway view of another embodiment of the present invention.

20 is a schematic exploded cutaway view of the embodiment of FIG. 19.

21 is a schematic perspective view of another embodiment of the present invention.

22 is a schematic exploded view of another embodiment of the present invention.

The present invention includes an integrated circuit package that includes an active element that is part of a circuit topology of an integrated circuit and forms at least a portion of a housing for the integrated circuit. For example, in one embodiment, an integrated circuit may be housed in a shell formed by one or more individual elements such that the individual elements form a package that is an element of a circuit comprising the integrated circuit. The active package may be formed with the same geometry and dimensions as a standard passive integrated circuit package, or may be formed to fit inside a standard or specific manufactured battery package, or may fit within a device or may be formed in a chassis of the device. The size and shape may be shaped to form part.

In another embodiment of the present invention, the smart device may include an individual device or a semiconductor based resistor, a capacitor or an inductor, and a separate integrated circuit housed in the same housing as the individual device or the semiconductor based resistor, capacitor or inductor. Integrated circuits may control one or more electrical parameters of individual devices or semiconductor based resistors, capacitors or inductors. For example, in one embodiment, an integrated circuit may maintain a device's resistance, intrinsic resistance, capacitance, inductance, etc. within a narrow range to produce a high precision device regardless of environmental changes such as temperature, pressure, humidity, and the like. have.

As used herein, an active package means a package for one or more integrated circuits and one or more individual devices that are part of the same circuit as the integrated circuit. The active package includes one or more individual elements as part of a housing for one or more integrated circuits. The active package may include one or more integrated circuits with one or more individual devices. By integrated circuit is meant a semiconductor chip comprising electronic devices fabricated on or into the surface of a chip (eg, silicon, GaAs, SiGe, SiC). The term discrete element refers to a resistor, capacitor or inductor that is not fabricated on an integrated circuit. High efficiency capacitors have relatively low charge leakage and very low equivalent ESR (e.g., two-layer electrolytic capacitors (e.g., capacitors known as supercapacitors, ultracapacitors and power capacitors) and pseudo capacitors). serial resistance) and a capacitor with low dynamic serial resistance.

Smart devices include semiconductor-based resistors, capacitors, or inductors having one or more semiconductor chips that control at least some of the operation of individual devices, or in other embodiments, individual devices housed within the housing of the individual devices. The smart device may include a controller that monitors environmental conditions such as, for example, pressure, temperature, humidity, and the like, and optimizes the performance of the individual devices based on the conditions. Smart devices can, for example, provide a single component precision individual device capable of maintaining its good electrical properties such as resistance, capacitance or inductance within tight tolerance levels regardless of changes in environmental conditions. Smart devices may be transparent to circuits in which individual devices may become part or provide input to the circuit.

The assembled circuit can be intrinsic and / or extrinsic discrete elements to the circuit topology. By unique device is meant an individual device that performs a function integrated with that of a circuit in this application. Output integrators, such as resistors, flying capacitors, storage capacitors, or inductors, perform the energy conversion, storage, and / or conservation roles required for the power integrator to operate as designed. However, the additional element means an individual element that is not integrated with the function of the circuit. Additional elements can be used to improve the operation of the circuit. For example, a filter capacitor can be connected between the input or output terminals and ground to improve the operation of the assembled circuit, but this is not necessary for the circuit to operate as designed and adds cost to the overall circuit design. .

The active package of the present invention can significantly reduce the cost and complexity of packaging and assembling integrated circuits. By using active elements as housings or sheaths for integrated circuits, the present invention eliminates other passive materials needed to package integrated circuits. Additionally, embodiments of the present invention that use inherent elements of assembled circuits instead of additional elements reduce the number of active elements used in the circuit, thus reducing the closing cost of the assembled circuit. In addition, the use of the inherent elements of the assembled circuit in a housing or shell can further reduce costs further because chip packaging and circuit assembly are performed in the same step. In the case where the elements can be mechanically interconnected, the present invention may allow to reduce or eliminate the use of solder. This, in turn, further reduces assembly costs due to the reduction or removal of the lead used in the solder, allowing for a more environmentally friendly product. In the case where intrinsic elements such as flying or storage capacitors of the power converter can also perform functions that may have to be performed by additional elements such as filter capacitors, this also eliminates the cost of the additional elements resulting in additional cost savings.

In addition, the active package enables boardless design of the assembled circuit since individual devices are used as integrated circuit packaging devices. The active package may include a plurality of integrated circuits housed at least partially by or within individual devices. For example, a multi-chip module may be replaced by an active package of the present invention that includes two or more integrated circuits housed within the active package of the present invention. Although not required, in one embodiment, one or more integrated circuits and / or individual devices may be assembled on a PCB board housed within the active package of the present invention.

In one embodiment of the invention, the active package may comprise a 'shell' structure comprising an upper shell and / or a lower shell. In embodiments involving a double side skin design, such as the designs shown in FIGS. 4-6 and 9, two skin sides may package an integrated circuit. In a single side skin design such as shown in FIGS. 10 and 11, the skin side may include one side of the integrated circuit. The other side of the integrated circuit may be protected by passive packaging materials, such as plastic or ceramic materials, or self-protected, such as flip chips. The sheath side may include a single discrete element that protects one side of the integrated circuit, such as the top sheath design shown in FIGS. 4-6 and the bottom sheath design shown in FIGS. 4-6 and 9-11. Optionally, the sheath side may include a number of individual elements attached together to form a single side of the sheath, such as the upper sheath design shown in FIG. 9.

Active elements used in housings or sheaths can be used as heat sinks for integrated circuits, and in many cases can eliminate all the need for an external heat sink. Capacitors, resistors, or inductors housed adjacent to the semiconductor chip can dissipate and dissipate heat generated within the semiconductor chip more effectively than conventional plastic or ceramic packaging materials. In addition, individual devices used as housings or sheaths may include metal casings or layers that can further support dissipating heat from the active package. In addition, individual devices may be configured such that an active package can be attached to a conventional heat sink. The device may include, for example, a hole similar to that of conventional integrated circuit packaging designs that may be used to attach an active package to a heat sink. The active package of the present invention allows the integrated chip to operate at lower temperatures than usual because parasitic losses can "warm up" the semiconductor chip.

The active package of the present invention allows for higher noise immunity and may allow for the use of parasitic elements as part of the circuit. By wrapping a larger part of the circuit, or even the entire part, it is possible to reduce the noise generated by the circuit, enabling higher noise immunity of the circuit and affecting other nearby circuits. In addition, the proximity of the semiconductor chip to other devices may make parasitic elements of the circuit more predictable, which may be utilized in the design of the circuit.

In addition, the active package design of the present invention is scalable, that is, multiple active package designs can be connected together. In this embodiment, the combination of active package designs may enable interconnect boardless circuits in which all circuit elements are interconnected in one package. In certain embodiments, the package may form part of the chassis of the device that houses the electronic circuitry for the device, or may form part or all of the chassis of the device.

In addition, embodiments of the present invention may include an individual device that detects or responds to changes in environmental conditions or environmental conditions such as pressure, temperature, humidity, and the like. The circuit can detect this condition or a change in condition and respond by optimizing the operation of the circuit to maximize the performance of the circuit. The circuit device may include, for example, a thermistor, temperature diode, capacitor, or inductor that responds to a change in temperature by a change in resistance, capacitance, or inductance of the device. The circuit can detect this change and use this change as a feedback signal to optimize the performance of the circuit.

Certain circuits, including integrated circuits and one or more discrete components, may be comprised of the active package of the present invention. A power integrator comprising a charge pump integrated circuit, a flying capacitor, and a storage capacitor may include, for example, two separate elements that may form an envelope for containing the charge pump integrated circuit. 1 shows a schematic diagram of a power integrator circuit 20 that includes a charge pump 26, a flying capacitor 22, and a storage capacitor 28. In the power integrator circuit 20, the flying capacitor 22 is electrically connected between the input terminal 21 of the power integrator circuit 20 and the neutral terminal 25 of the power integrator circuit 20. The charge pump 26 has an input terminal 23, a neutral terminal 27 and an output terminal 24. The input terminal 23 of the charge pump 26 is electrically connected to the input terminal 21 of the power converter circuit 20. The output terminal 24 of the charge pump 26 is electrically connected to the output terminal 29 of the power integrator circuit 20. The neutral terminal 27 of the charge pump 26 is electrically connected to the neutral terminal 25 of the power integrator circuit 20. The storage capacitor 28 is electrically connected between the neutral terminal of the power integrator circuit 20 and the output terminal 29 of the power integrator circuit 20.

In other embodiments, the power converter circuit may include a device that changes parameters in response to changes in environmental conditions such as pressure, temperature, humidity, or the like, or a device that includes an environmental condition sensor (eg, Capacitor to change capacitance accordingly). FIG. 2 shows another embodiment of the power integration circuit 30 for the power integration circuit 20 shown in FIG. 1, for example, where the storage capacitor 38 may comprise a temperature sensing element. And / or the capacitor may change the capacitance as the temperature changes (optionally, a flying capacitor may be used to detect the temperature change). When the temperature of the charge pump integrated circuit or the temperature of the surrounding environment changes, the charge pump 26 can detect a change in capacitance of the storage capacitor 38 or receive an input from a temperature sensing element, and the performance of the circuit The operation of the charge pump 26 can be changed in such a manner as to change the duty cycle of the converter in order to optimize. In this embodiment, for example, utilizing changes in temperature sensor or capacitance can improve system controller performance due to measurable loss information that can be used as feedback for real-time circuit operating conditions. Optionally, the capacitor of this circuit may be a smart device capacitor, which may include an integrated circuit where the capacitor monitors one or more environmental conditions and optimizes the capacitor's performance to maintain within a good performance range. Another example of a power converter that includes a charge pump that can be housed in an active package of the present invention, referred to herein, is the name of the invention filed June 25, 1999 issued to Nebrigitch and Gartstein. Battery with a built-in dynamic switched capacitive power converter, "US patent application Ser. No. 60 / 141,119. Other power integrators, including other charge pumps known in the art, may be housed in the active package of the present invention.

3 shows a schematic block diagram of a power integrator circuit comprising a charge pump integrated circuit 42, a flying capacitor 44 and a storage capacitor 46 that can be housed in an active package of the present invention. 4 is a schematic exploded view of one embodiment of an active package design 40 for the power integrator circuit shown in FIG. 3. 5 and 6 show two schematic exploded cross-sectional views taken along line V-V and line VI-VI of FIG. 4, respectively. The active package 40 includes a power integrator circuit having a charge pump integrated circuit 42 and a charge pump converter circuit including a flying capacitor 44 and a storage capacitor 46. In this embodiment, a storage capacitor 46 forming a first side of the active package 40 envelope while providing a substrate on which the charge pump integrated circuit 42 is located, and a second of the active package 40 envelope. The charge pump integrating circuit 42 is located between the flying capacitors 46 forming the sides. The positions of the capacitors 44 and 46 can be reversed. Flying capacitor 44 and / or storage capacitor 46 may include a recess, such as recesses 51 and 52, in which the charge pump integrated circuit 42 may be partially or fully housed. . The recess (es) 51, 52 may include recesses, notches or etch grooves formed in one or both of the cavities or capacitors 44, 46. The recess (es) 51, 52 may be processed by milling, etching, molding, or the like.

The storage capacitor 46 and / or the flying capacitor 44 are completely or partially surrounded by insulating material. In one embodiment, the thicknesses 53, 55 of the insulators 49, 50 on the sides of at least one or two capacitors 44, 46 adjacent to the charge pump integrated circuit 42 are the charge pump integrated circuit 42. Or electromagnetic or magnetic fields generated by capacitors 44 or 46 may be prevented from extending into other elements. In this embodiment, the insulators 49 and 50 prevent nearby devices from interfering with the operation of other devices. In the present embodiment, the flying capacitor 44 and the storage capacitor 46 are the rest of the circuit and the electrodes 43, 45, 47, 48 without extending the pins through the dielectric layers 41, 53 of the capacitors 44, 46. The dielectric layers 41 and 53 are shown as tantalum / polymer capacitors to provide an easy connection between them. However, the capacitors may be other types of capacitors known in the art, such as ultra-capacitors, supercapacitors, two-layer electrolyte capacitors or high efficiency capacitors including pseudo capacitors. The capacitors may have terminals on the surface of the capacitor to make it easier to electrically connect the capacitor to the rest of the circuit.

The charge pump integrated circuit 42 may be electrically connected to the flying capacitor 44 and the storage capacitor 46 by contact pads as shown in FIG. 4. In this embodiment, the neutral terminal 64 of the charge pump integrated circuit 42 is electrically connected to the neutral pin 74 of the active package 40 by the contact pad 54. The cathode 45 of the flying capacitor 44 is the flying capacitor cathode terminal 66 of the charge pump integrated circuit 42 by contact pads 56, 80 which are in physical electrical contact with each other when the active package 40 is assembled. Is electrically connected). The anode 43 of the flying capacitor 44 is also the flying capacitor anode terminal 72 of the charge pump integrated circuit 42 by contact pads 62, 82 which are also in physical electrical contact with each other when the active package 40 is assembled. Is electrically connected). The positive input terminal 68 of the charge pump integrated circuit 42 is electrically connected to the positive input pin 76 of the active package 40 by the contact pad 58. The output terminal 70 of the charge pump integrated circuit 42 is electrically connected to the output pin 78 of the active package 40 by the contact pad 60. The anode 47 of the storage capacitor 46 is electrically connected to the output pin 78 of the active package 40, and the cathode 48 of the storage capacitor is electrically connected to the neutral pin 74 of the active package.

The active package 40 of the present invention can be assembled in a variety of ways. The charge pump integrated circuit 42 may, for example, be soldered to the flying capacitor 44 and / or the storage capacitor 46, or mechanically coupled with the flying capacitor 44 and / or the storage capacitor 46. Or contact pads of any capacitor in the recesses 51 and / or 52 or the terminals of the charge pump integrated circuit 42 hold the charge pump integrated circuit 42 in place or the recess 51 and / or 52) It may be snapped into the recesses 51 and / or 52 by elastic force in the case of including an elastic element which can be positioned in place therein. The charge pump integrated circuit 42 may be selectively connected to the flying capacitor 44 and / or the storage capacitor 46 by any means known in the art. The flying capacitor 44 and the storage capacitor 46 may be connected together in various ways to form the active package 40 of the present invention. The capacitors may be glued together by, for example, adhesive pads 84, 86, 88, 90. Adhesive pads 84, 86, 88, and 90 are individually insulated from flying capacitor 44 and storage capacitor 46 by insulators 49, 50. Thus, the adhesive pads 84, 86, 88, 90 allow mechanical connections between the capacitors but not electrical connections. Alternatively, the flying and storage capacitors 44 and 46 may be soldered, mechanically coupled, or connected by any other means known in the art.

7 shows an alternative embodiment of a power converter circuit 100 that includes a flying capacitor 110, an inductor 112, a DC / DC converter 114, and a storage capacitor 116. FIG. 8 shows a schematic block diagram of the circuit arrangement for the power converter circuit 100 shown in FIG. 7, and FIG. 9 shows the active package 120 of the present invention comprising the power converter circuit 100 shown in FIG. 7. Shows a simplified exploded view. In this embodiment, the flying capacitor 110 and the inductor 112 are joined together to form the upper shell of the active package 120. {Optionally, the flying capacitor 110 and the inductor are the bottom of the active package 120. The outer capacitor may be formed. The flying capacitor 110 and the inductor 112 may be connected by, for example, an interlocking post 122 and a hole 124. Post 122 and hole 124 may be snapped together or interlocked together by other mechanical means. If it is to be purely mechanically connected, the post 122 can be insulated from the electrodes of the flying capacitor 110 and the hole 124 can be insulated from the inductor 112. In this case, other forms of electrical contact may be applied as needed. In FIG. 9, for example, the flying capacitor 110 and the contact pads 126 on the inductor 112 may be used to provide electrical contact between the two elements. Optionally, one or more posts 122 may be electrically connected to the electrodes of the flying capacitor 110, and one or more holes 124 may be electrically connected to the inductor 112. In this manner, mechanical and electrical connections between flying capacitor 110 and inductor 112 may be made by posts 122 and holes 124. If the individual elements are not directly electrically connected to each other, only mechanical connection is needed.

As shown in FIG. 9, the DC / DC converter integrated circuit 114 may be located in a recess 128 of the storage capacitor 116. The recesses in the flying capacitor 110, inductor 112 to include a portion or all of the DC / DC converter integrated circuit 114 in addition to or instead of the recess 128 formed inside the storage capacitor 116. It may be formed. The DC / DC converter integrated circuit includes a flying capacitor 110, an inductor 112, a storage capacitor 116, a neutral pin (by the terminal 130 and the contact pad 132 as described above with respect to FIGS. 4-6). 138 and output pin 140. The flying capacitor 110 and the inductor 112 may be electrically connected to the input pin 136 through the contact pad 132. The upper and lower sheaths of the active package 120 may be connected together by an adhesive pad 134 as described above. Optionally, the upper and lower sheaths of the active package 120 may be soldered, mechanically coupled, or connected by any other means known in the art.

In alternative embodiments, multiple resistors, capacitors or inductors may be connected together as described above in the manner shown in FIG. 9 to form a desired circuit connection, or may be combined with any other method disclosed in the art or in the art. Can be connected together by known methods. For example, multiple resistors, capacitors or inductors can be coupled together in series or in parallel to provide the desired resistance, capacitance, or inductance values. For example, in a capacitor, each post may be electrically connected to the other electrode of the capacitor, and each hole may be electrically connected to the other electrode of the capacitor. The capacitor can then be connected in series or in parallel as the post is inserted into the hole. In addition, other types of individual elements such as the capacitor and inductor shown in FIG. 9 may be connected together to form various circuit configurations required for a particular application. Figure 22 shows a simplified exploded view of another embodiment of the present invention, in which a number of individual elements 1010 form a single portion of the active package of the present invention comprising an integrated circuit 1012 and a carrier 1014. May be joined together to form the sheath side 1020. The illustrated connection may be a snap coupled configuration that requires no soldering, may comprise a purely mechanical connection in which the electrical elements of the individual elements are insulated from each other, or may comprise electrical connections between the individual elements.

Another embodiment of the active package of the present invention is shown in FIGS. 10 and 11. FIG. 11 shows a cross-sectional view taken along line XI-XI shown in FIG. 10. In this embodiment, the active package 200 includes an integrated circuit 210 and a single discrete device 220. In this embodiment, the integrated circuit 210 must be designed such that the exposed side of the integrated circuit 210 is protected, such as flip-chip configuration (eg, wafer scale packaging). Optionally, the active package 200 should include a passive packaging material, such as plastic or ceramic, that protects the exposed side 212 of the integrated circuit 210. Electrical and mounting connections between the integrated circuit 210 and the individual elements 220 may be made by any of the methods described above or by any other connection method known in the art. For example, FIG. 11 shows a typical electrical contact pad 224 extending through the insulating layer 222 of the individual device 220. Individual elements 220 may be one or more capacitors, inductors and / or registers or a combination of one or more capacitors, inductors and / or resistors. One example of a circuit that can be embedded in an active package 200 design that includes a single discrete device is an audio op amp power amplifier circuit. A circuit structure for an audio op amp power amplifier circuit that can be embedded in an active package such as active package design 200 is shown in FIG.

Battery top

In other embodiments, power converters, regulators or charge pump circuits may be embedded in the active package design of the present invention designed to fit over the false positive top of the battery or below the negative cathode. As shown in FIG. 13, for example, the charge pump active package 300 is designed to fit underneath the top of the false positive electrode of a cylindrical battery (eg, AA, AAA, C or D). In this embodiment, the storage capacitor 314, which is a large capacitor, forms the base of the active package 300, and the substrate on which the charge pump integrated circuit, such as a converter, regulator, or charge pump integrated circuit 312, can be located. To provide. The flying capacitor 310 is narrower than the storage capacitor 314 and forms the top of the active package 300. As shown in FIG. 14, the narrow top of the active package 300 may be designed to fit within the recess 324 of the top of the false positive electrode 322 of the standard cylindrical battery 320. Optionally, the shape of the active package 300 may be designed to fit into a different location of a standard cylindrical battery or a prismatic battery or other type of battery. The design of power converters, regulators or charge pump circuits that can be used in the package of the present invention is described by Gartstein and Nebrigig, filed April 2, 1998, entitled "Built-in for Extended Battery Life. US patent application Ser. No. 09 / 054,192, Primary Battery with Controller, filed April 2, 1998, issued to Gartstein and Nebrigitch, US Patent Application entitled “Battery with Embedded Controller” 09 / 054,087, US Patent Application No. 09 / 054,012, Gartstein and Ne., Filed April 2, 1998, issued to Gartstein and Nebrigchi, entitled “Battery with Embedded Controller” US patent application Ser. No. 09 / 275,495 filed March 24, 1999, filed on Brigitte, and April 23, 1999, issued to Gartstein and Nebrigitch. One filed invention named "My Battery having a type indicator "which is disclosed in United States Patent divisional application No. 60 / No. 141 119, each of the applications are associated herein by reference.

In one embodiment, the flying capacitor 310 and the storage capacitor 314 may be high efficiency capacitors, such as the ultra capacitor coin cell shown in Table 1 below. The ultra capacitor coin cell may have two terminals on the same side of the capacitor for easy connection in the active package of the present invention as in this or other embodiments disclosed herein.

Technical parameters Flying Capacitor Storage capacitor Capacitance 0.05F (-10%, + 25%) 1F (-10%, + 25%) Series resistance (25C): DC100HZ <0.09 Ohms <0.08 Ohms <0.10 Ohms <0.08 Ohms Voltage: Continuous voltage Peak voltage 2.8V3.6V 2.8V3.6V size 4mm outer diameter; 2mm height 6.5mm outer diameter; 2.5mm height Temperature operation -20 ° C to + 60 ° C-40 ° C to + 80 ° C -20 ° C to + 60 ° C-40 ° C to + 80 ° C Leakage current (after 72 hours) 0.01 to 0.02 mA 0.005 to 0.01 mA

In one embodiment of the invention, the active package may be formed from a standard integrated circuit package, such as a surface mount or wafer scale package, in which one or more unique elements are incorporated into the active package in the same geometry as the standard integrated circuit package. . In this way, the active package can replace all or part of the circuit in which a standard passive package is used.

As shown in FIG. 22, a number of individual elements may be joined together to form the sheath side of the active package of the present invention. In this embodiment, the individual elements 1010 are joined together to form the upper envelope side 1020 of the active package 1000 as in a microprocessor integrated circuit package. The upper sheath side 1020 may replace the passive package material of a conventional microprocessor integrated circuit package (eg, BGA-256), and separate components to be incorporated into the active package 1000 of the present invention. Allows for normal placement on the phase. Bottom carrier 1014 may include a conventional pin carrier (eg, BGA-256).

In certain embodiments, the active package may include a fully integrated charge pump in the form of a standard charge pump package. The active package may be formed in standard forms such as TO-220, SOT-223, TO-3, TO92, and TO87. For example, FIG. 15 illustrates an embodiment in which the active package is formed of a TO-220 standard shaped package. In the present embodiment, the flying capacitor 410 and the storage capacitor 414 form the upper and lower halves of the housing envelope surrounding the integrated circuit 412. The flying capacitor 410 may have the same dimensions as the top of the standard TO-220 package. In the embodiment shown in FIG. 15, the storage capacitor 414 forms only a portion of the lower half of the TO-220 package, such that the metal, plastic, or ceramic tab completes the lower half of the standard package and connects the package to the heat sink. Is attached to the storage capacitor. In another embodiment, the storage capacitor can have the same dimensions as the bottom of the standard T) -220 package and can include holes for attaching the package to the heat sink, if desired. In one embodiment, the flying capacitor 410 and the storage capacitor 412 may be high efficiency capacitors, such as the ultra capacitors shown in Table 2 below.

Technical parameters Flying Capacitor Storage capacitor Capacitance 0.05F (-10%, + 25%) 1F (-10%, + 25%) Series resistance (25C): DC100HZ <0.09 Ohms <0.08 Ohms <0.10 Ohms <0.08 Ohms Voltage: Continuous voltage Peak voltage 2.8V3.6V 2.8V3.6V size 8.38mm × 10.16mm × 2mm 26 mm x 10.16 mm x 2.45 to 2.65 mm Temperature operation -20 ° C to + 60 ° C-40 ° C to + 80 ° C -20 ° C to + 60 ° C-40 ° C to + 80 ° C Leakage current (after 72 hours) 0.01 to 0.02 mA 0.005 to 0.01 mA

16 shows a schematic exploded view of another embodiment of the present invention that can be used to replace a standard TO-3 package. The active package includes a flying capacitor 510, an integrated circuit 512 and a storage capacitor 514.

17 shows a perspective view of another embodiment of the present invention including individual elements 610, 614, and integrated circuit 612. FIG. 18 shows a breakaway view of the embodiment of FIG. 17.

19 is a schematic cutaway view of another embodiment of the present invention. In this embodiment, the active package includes individual elements 810, 814, and an integrated circuit 812. 20 shows a schematic exploded view of the embodiment of FIG. 19.

21 shows a schematic perspective view of another embodiment of the present invention including a smart element. The smart device is shown without a housing and shows device 910, which may be a semiconductor device or a separate device, such as a silicon based resistor, capacitor or inductor.

Claims (12)

(a) a package input terminal, a package output terminal and a package neutral terminal, (b) an individual element electrically connected between the package input terminal or package output terminal and the package neutral terminal, and (c) an integrated circuit comprising a first side and a second side, an integrated circuit comprising an integrated circuit input terminal, an integrated circuit output terminal, and an integrated circuit neutral terminal, The individual elements are selected from the group consisting of tantalum capacitors, high efficiency capacitors, ultra capacitors, supercapacitors, two-layer electrolyte capacitors, pseudo capacitors, nonlinear magnetic inductors, inductive beads, and resistors, The integrated circuit input terminal is electrically connected to the package input terminal, the integrated circuit output terminal is electrically connected to the package output terminal, the integrated circuit neutral terminal is electrically connected to the package neutral terminal, Wherein said individual elements form a first side of a package protecting said first side of said integrated circuit. (a) a package comprising a package input terminal and a package output terminal, (b) individual devices, and (c) an integrated circuit comprising an integrated circuit input terminal, and an integrated circuit output terminal, The individual device and the integrated circuit are electrically connected between the package input terminal and the package output terminal, wherein the integrated circuit is adapted to change electrical parameters of the smart device, the electrical parameters being a resistor, intrinsic resistance, capacitance and Is selected from the group of inductances, And the package surrounds the integrated circuit and the individual elements. 3. The integrated circuit package of claim 1 or 2, wherein the individual elements comprise a plurality of individual elements attached together, wherein the plurality of individual elements are snap fixed together. 4. The integrated circuit package of any one of claims 1 to 3, wherein the individual element and the integrated circuit are connected in series or in parallel between the package input terminal and the package output terminal. The package of claim 1, wherein the individual element comprises a first capacitor electrically connected between the package input terminal and the package neutral terminal, wherein the integrated circuit package is coupled with the package output terminal. A second capacitor electrically connected between the package neutral terminals, The first capacitor forms a first side of the package, the second capacitor forms a second side of the package, the integrated circuit is located between the first capacitor and the second capacitor, and the integrated The circuitry includes a power charge pump integrated circuit. 6. The integrated circuit package of any one of the preceding claims, wherein the first capacitor comprises a plurality of capacitors attached together. The integrated circuit package of claim 1, wherein the integrated circuit package includes a single component power integrator, the single component power integrator integrated circuit comprises only three terminals, and the single component power controller is a standard package. An integrated circuit package that is a power controller package structure. The integrated circuit package of claim 1, wherein the first capacitor and the second capacitor are ultra capacitors. 9. The integrated circuit package of any one of claims 1 to 8, wherein the integrated circuit package is a solderless structure. 10. The integrated circuit package of any preceding claim, wherein the integrated circuit comprises a power charge pump integrated circuit. 11. The integrated circuit package of any one of claims 1 to 10, further comprising a container having a positive terminal and a negative terminal, and a battery having an electrochemical cell comprising a positive electrode and a negative electrode, wherein the integrated circuit package includes the electronics; An integrated circuit package electrically connected to the positive and negative terminals of a chemical cell and to the positive and negative terminals of the container. 12. The integrated circuit package of claim 1, wherein the integrated circuit package is dimensioned such that a standard size cylindrical battery fits inside the top.