KR20020057378A - Gap-filling method of semiconductor device using atomic layer deposition method - Google Patents

Abstract

PURPOSE: A method for gap-filling a semiconductor device by an atomic layer deposition(ALD) method is provided to greatly improve step coverage by controlling the thickness of a deposition layer, and to increase reliability by preventing a void phenomenon occurring in a gap-filling process for the semiconductor device. CONSTITUTION: A semiconductor substrate having a gap is placed in a reaction receptacle. The first reaction gas is injected to the reaction receptacle and is absorbed to the semiconductor substrate to generate a reaction material. Purge gas is injected into the reaction receptacle to purge the unabsorbed first reaction gas. The second reaction gas is injected into the reaction receptacle to react with the reaction material so that a thin film is formed. Purge gas is injected into the reaction receptacle to purge the second reaction gas not reacting with the reaction material. The abovementioned processes form a repetition cycle.

Description

Gap-filling method of semiconductor device using atomic layer deposition method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gap filling method of a semiconductor device, and in particular, a purge gas for separating and providing a reactive gas in a process chamber to be adsorbed onto a semiconductor device, and purging a reactive gas that has not been adsorbed on the semiconductor device out of the process chamber. The present invention relates to a gap filling method for filling a gap of a semiconductor device using atomic layer deposition (ALD), which is composed of cycles having a step provided inside a chamber.

In recent years, as semiconductor devices have been increasingly integrated, multi-layer wiring is indispensable. Therefore, a gap filling technique in which an interlayer insulating film insulates wiring is required, and a step between cell circuits and peripheral circuits is increased. Since the phenomenon occurs, it is essential to perform the planarization process.

Therefore, in the case of 256 mega or more highly integrated memory devices, an interlayer deposition (ILD) or an intermetal deposition (IMD) is referred to as "IMD" for gap filling. The gap filling method of filling the gap using the (or the like) is currently commonly used.

In order to form the ILD or IMD, CVD (Chemical Vapor Deposition) is generally used. Generally, a thin film is deposited using a predetermined mixed gas and then annealed. Slowly cool the thin film formed by the cooling technique called) to gapfill to have a stabilized structure.

At this time, the commonly used mixed gas is SiON, SROX and the like, the film quality to be deposited is a BPSG (Borophosilicate glass) film quality that can be flowed at a low temperature while maintaining the flow characteristics of the process and low stress is used a lot.

However, the above-mentioned gap filling method is not sufficient in the case of D-RAM of 1 giga-class or more, in which the trench gap is narrowed to 0.15 μm or less as the semiconductor device is gradually integrated.

As a specific example, when the semiconductor device 1 having a trench having a high aspect ratio as shown in FIG. 1 is gap-filled by a deposition process using a high-density plasma equipment, the material sputtered at the trench inlet as shown in FIG. ) Is redeposited and stuck to the opposite sidewall as in the region of reference number 3, thereby blocking the trench inlet, i.e., the inlet of the gap, resulting in a void 4 phenomenon.

As described above, the void 4 is a phenomenon in which the materials 2 deposited on the semiconductor device 1 are redeposited during the deposition process, so that the thicknesses of the voids 4 are different for each region compared to the same process progress time. By consequently forming an empty space therein, the voids 4 increase resistance and cause various problems in subsequent processes.

As a result, securing the gap filling process that completely fills the gap without the void 4 phenomenon is recognized as a serious problem that can improve the reliability of the device while increasing the degree of integration of the device.

The present invention was derived to solve the above problems, and an object of the present invention is to provide a gap filling method for filling a gap of a semiconductor device having a gap with a void-free constant thickness.

Another object of the present invention is to precisely control the thickness of the thin film according to the number of process steps in filling and planarizing the gap of the semiconductor device.

1 is a cross-sectional view of a semiconductor device in which voids are generated.

2A-2C are cross-sectional views of a preferred embodiment of the present invention.

3 is an exemplary view showing a process progress cycle for carrying out the present invention.

4 is a cross-sectional view showing another embodiment of the present invention.

In the gap filling method of a semiconductor device according to the present invention, a reactant is introduced into a process chamber in which a semiconductor device having a gap is disposed to be adsorbed onto a surface of a semiconductor device to generate a reactant, and a purge gas is introduced into the process chamber in an adsorption step. Purge the unresorbed reactant, inject the oxidant into the process chamber to react with the reactants to form a thin film, and then add the purge gas to the process chamber to purge the oxidant that did not react with the reactant in one iteration cycle. It is characterized by using an atomic layer deposition method.

Preferably, the reactant is an inorganic silane gas containing SiHxF4-x, SiHxCl4-x (x = 0 to 4), Si2H6, or the like, or an organosilane compound including TEOS, OMCTS, HMDSO, DES, DEDEOS, or the like. The oxidizing agent is composed of an oxidizing gas containing H 2 O, O 2, O 3, N 2 O, NO 2, or a solvent containing isopropyl alcohol.

As the purge gas, an inert gas containing N 2, Ar, He, or the like is used, and a cycle time of the reactor body constituting the cycle is performed between 0.001 seconds and 60 seconds.

In addition, the temperature and pressure in the reaction tank is preferably carried out at 25 ℃ ~ 1500 ℃, 0.1 mTorr ~ 50 Torr.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2C are cross-sectional views illustrating an example of a gap peeling method for a semiconductor device according to the present invention.

According to FIG. 2A, a gap 7 having a high aspect ratio is formed in the semiconductor device 1, which is located in a process chamber (not shown) and is introduced into the process chamber (not shown). The reactant, preferably SiH ₄ atoms 6, are adsorbed on the surface of the semiconductor device 1 to form a reactant 8.

Then, the SiH ₄ atoms 6 which are not adsorbed on the semiconductor element 1 are subsequently removed from the process chamber (not shown) by the purge gas introduced into the process chamber (not shown).

FIG. 2B shows that the oxidant 11 is introduced into a process chamber (not shown) in which the semiconductor device 1 of FIG. 2A is placed to react with the reactant 8 to form the thin film 10, which is preferable according to the present invention. H ₂ O, which is an oxidant 11 used, is oxidized to the SiH ₄ reactant 8 adsorbed on the surface of the semiconductor element 1 to form the interlayer insulating thin film 10.

In this case, the oxidant 11 that has not reacted with the reactant is then discharged from the process chamber (not shown) by the purge gas introduced into the process chamber.

FIG. 2C is a cross-sectional view of gap filling of the semiconductor device 1 in which the gap 7 is flatly filled by repeating the cycle of FIG. 2A and FIG. 2B to precisely control the thickness of the thin film.

According to FIG. 2C, it is possible to adjust the thickness of the thin film by controlling the process cycle so that voids 4 do not occur after the process is progressed, and the process reliability is good.

3 shows a process flow constituting one cycle which is the most basic in the process progress according to the present invention.

According to FIG. 3, in the atomic layer deposition method, four steps constitute one cycle.

First, the step of introducing the reaction gas into the process chamber, the step of introducing a purge gas to discharge the reaction gas that is not adsorbed on the surface of the semiconductor element from the reaction gas introduced into the process chamber to the outside, and reactants and In one cycle, an oxidant is introduced into the process chamber to react to form a thin film, and a purge gas is introduced to discharge an oxidant that does not form a thin film by reacting with a reactant to the outside from the process chamber.

In this case, the reactive gas may be an inorganic silane-based gas or an organic silane-based compound, and examples of the inorganic silane-based gas include SiHxF _4-x , SiHxCl _4-x (x = 0 to 4), and Si ₂ H ₆ . The organic silane compound may include tetraethylorthosilicate (TEOS), octa-methyl-tetra0siloxane (OMCTS), hexa-methyl-disiloxane (HMDSO), di-ethyl-silane (DES), and diethyl-diethyl-silane (DEDEOS). And compounds including T-12 or SILK may also be used as the reactor.

In the process chamber, process variables such as temperature and pressure are set to a predetermined temperature and pressure. Preferably, process conditions are set between 25 ° C. and 1500 ° C. and pressure between 0.1 mTorr and 50 Torr.

In addition, the oxidant introduced into the process chamber is added to react with the reactants to form a thin film. In the present invention, H ₂ O, which cannot be used as an oxidant because the reactivity with the reactants is too large, is in the form of a gaseous vapor. Into the process chamber, which allows for the formation of thin films at low temperatures.

In addition to H ₂ O, oxidizing gases such as O ₂ , O ₃ , N ₂ O, NO ₂ or solvents containing isopropyl alcohol are available as oxidizing agents.

In addition, an inert gas including N ₂ , Ar, He, or the like is used as the purge gas, and the cycle time for introducing the purge gas is preferably performed between 0.001 seconds and 60 seconds.

Another embodiment of the present invention includes a two-step gap filling method as shown in FIG.

In the two-step gap filling method, gap filling is performed in the gap 7 formed in the semiconductor device 1 by repeating the cycle as shown in FIG. 3 to form the first thin film 15. When the gap 7 is sufficiently filled, the remaining portion is filled using a conventional gap filling method, for example, a method of forming the second thin film 17 using the ILD layer or the IMD.

This two-step gap filling method has a suitable applicability as the gap 7 in the cell region having a large step height and density in the semiconductor device 1 is used.

Although the embodiments of the present invention have been described in detail as described above, it will be understood by those skilled in the art that the present invention may be modified or modified without departing from the scope of the present invention. Could be.

According to the present invention, unlike the gap filling method according to the conventional chemical vapor deposition process, by using the atomic layer deposition method that separates each reactor body and puts it into the process chamber, to process the excess reactor body that did not react in the half vessel It is possible to control the thickness of the deposited film by controlling the thickness of the deposited film by limiting the thickness of the deposited film in one process cycle by purging it out of the chamber, so that the step coverage can be controlled very well.

Therefore, when the gap of the semiconductor device is filled using the atomic layer deposition method according to the present invention, voids occurring during the gap filling process do not occur, thereby increasing process reliability, and reducing defects of the semiconductor device. There is an effect of improving the productivity.

Claims (8)

An adsorption step of generating a reactant by placing a gap-formed semiconductor substrate in a reaction vessel and then introducing a first reactor to be adsorbed onto the semiconductor substrate; A first exhaust step of purging the first reactor body which is not adsorbed by introducing a purge gas into the reaction vessel; A thin film forming step of adding a second reactor to the reaction vessel to react with the reactants to form a thin film; And A second exhausting step of purging the second reactor body which has not reacted with the reactant by introducing a purge gas into the reaction vessel; a gap filling method of a semiconductor device using an atomic layer deposition method comprising one repetition cycle . The method of claim 1, Gap filling of a semiconductor device using an atomic layer deposition method is characterized in that the first reactor is a non-organic-silane-based gas such as SiHxF _4-x , SiHxC _l4-x (x = 0 to 4), Si ₂ H ₆ Way. The method of claim 1, The first reactor is a gap filling method of a semiconductor device using an atomic vapor deposition method, characterized in that an organic-silane-based compound such as TEOS, OMCTS, HMDSO, DES, DEDEOS is used. The method of claim 1, The second reactor is a gap filling method of a semiconductor device using an atomic layer deposition method characterized in that the oxidizing gas is used. The method of claim 1, The second reactor is a gap filling method of a semiconductor device using an atomic layer deposition method, characterized in that consisting of a solvent containing IPA. The method of claim 1, A gap filling method of a semiconductor device using an atomic layer deposition method, characterized in that an inether gas containing N ₂ , Ar, He, etc. is used as the purge gas. The method of claim 1, The gap filling method of a semiconductor device using the atomic layer deposition method characterized in that the reaction time of the reactor body constituting the cycle proceeds between 0.001 seconds to 60 seconds. The method of claim 1, The gap filling method of the semiconductor device using the atomic layer deposition method characterized in that the temperature and pressure in the reaction vessel is carried out at 25 ℃ ~ 1500 ℃, 0.1 mTorr ~ 50 Torr.