KR20020054017A - Digital automatic gain controller with variable loop gain - Google Patents

Abstract

PURPOSE: A digital AGC(Automatic Gain Control) device which has variable loop gain is provided to improve a performance of digital AGC device by preparing a loop gain selector in a loop filter to vary a loop gain according to a difference between a power level and a threshold value. CONSTITUTION: A multiplier(10) multiplies an AGC input signal(I,Q) by an AGC value output from a loop filter(30). A detector(20) is composed of a power extractor(21) which extracts a power level from an AGC output signal(I,Q) and a subtracter(22) which subtracts a threshold value from the extracted power level. The loop filter(30) is composed of a loop gain selector which selects a loop gain according to the signal output from the subtracter(22), a first multiplier(32) which multiplies the loop gain selected in the loop gain selector by a difference between the power level and the threshold value, an adder(33) adds the AGC value output from the first multiplier(32) to the AGC value recorded in a register(34), and the register(34) which records the AGC value output from the adder(33).

Description

Digital Automatic Gain Control Device with Variable Loop Gain {DIGITAL AUTOMATIC GAIN CONTROLLER WITH VARIABLE LOOP GAIN}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital automatic gain control device having a variable loop gain, hereinafter referred to as an 'AGC' device. In particular, the present invention provides a loop gain selector inside a loop filter to be output from a detector. The present invention relates to a digital AGC device having a variable loop gain that can further improve the performance of the digital AGC device by varying the loop gain according to the difference between the power level and the threshold value.

In general, with the development of an analog to digital converter (ADC) and a digital to analog converter (DAC) capable of processing high-speed data, it is possible to process the modulation and demodulation and filtering in the digital domain.

This is referred to as digital radio or software defined radio (SDR), and the receiver to which the digital radio is applied is called a digital receiver.

As the dynamic range of the ADC increases, AGC can be performed in the digital receiver.

As shown in FIG. 1, a digital AGC device provided in a conventional digital receiver is composed of a multiplier 1, a detector 2, and a loop filter 3. The detector 2 consists of a power extractor 2-1 and a subtractor 2-2, and the loop filter 3 comprises a multiplier 3-1, an adder 3-2 and a register 3-3. It consists of

In this case, the multiplier 1 corresponds to a voltage controlled oscillator (VCA) in an analog AGC device.

In the conventional digital AGC device configured as described above, the power extractor 2-1 in the detector 2 averages the AGC output signals I and Q output from the multiplier 1, extracts a power level, and subtracts ( In step 2-2), the extracted power level is compared with a threshold corresponding to a desired power level.

Subsequently, the loop filter 3 integrates the power difference between the power level output from the detector 2 and the threshold value using the multiplier 3-1, the adder 3-2, and the register 3-3. .

At this time, the loop filter 3 is a low pass filter, and the loop gain determines the time constant of the AGC.

The multiplier 1 then multiplies the AGC input signals I and Q by the AGC values output from the loop filter 3 so that the AGC output signals I and Q have sufficient bit resolution.

One of the biggest factors that determine the performance of such a digital AGC device is loop gain, which is inversely related to the loop gain.

In other words, when the loop gain is large, the time constant becomes small, and the AGC output signal reaches the threshold quickly. On the contrary, when the loop gain is small, the time constant becomes large and the time for reaching the threshold becomes long.

For example, when the difference between the extracted power level and the threshold is large, it is advantageous that the time constant is small because the AGC output signal cannot maintain a sufficient bit resolution, so that the time constant is small, whereas the extracted power level is advantageous. If the difference between the and the threshold is small, since the desired bit resolution has already been obtained, more precise gain control is required, so that the time constant is advantageous.

However, conventional digital AGC devices could only set one fixed loop gain with a certain constant value.

Accordingly, regardless of the level of the input signal input to the detector (2), it operates according to one loop gain, and a number of tests had to set an appropriate value in a trial and error method.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and its object is to provide a loop gain selector inside the loop filter to vary the loop gain in accordance with the difference between the power level and the threshold output from the detector, thereby increasing the digital AGC. An object of the present invention is to provide a digital AGC device having a variable loop gain that can further improve the performance of the device.

1 is a block diagram of a conventional digital automatic gain control device;

2 is a block diagram of a digital automatic gain control device having a variable loop gain according to the present invention;

3 is a block diagram of the loop gain selector of FIG. 2 according to the first embodiment;

4 is a block diagram illustrating a loop gain selector of FIG. 2 according to a second embodiment;

5A and 5B show simulation results of a conventional digital automatic gain control device and a digital automatic gain control device according to the present invention.

<Description of the symbols for the main parts of the drawings>

10: multiplier 20: detector

21: power extractor 22: subtractor

30 loop filter 31 loop gain selector

32: first multiplier 33: adder

34: register 41, 51: absolute value calculation unit

42: power multiplication unit 43: second multiplier

52: MSB verification unit 53: address designation unit

54: ROM table control unit

A digital AGC device having a variable loop gain according to the present invention for achieving the above object is to multiply the AGC input signal I, Q by the AGC value output from the loop filter so that the AGC output signal I, Q has a sufficient bit resolution. A detector comprising a multiplier, a power extractor for taking an average of the AGC output signals I and Q output from the multiplier and extracting a power level, a detector subtracting the power level and a threshold value extracted from the power extractor, and the detector A loop gain selector for selecting and outputting a loop gain according to the input signal using a signal output from the subtractor as an input signal, a loop gain selected by the loop gain selector, and a power level output from the subtractor in the detector; A first multiplier multiplying a difference with a threshold value, and an AGC value output from the first multiplier and previously stored in a register and outputted And a loop filter comprising an adder for adding an AGC value, and a register for temporarily storing the AGC value output from the adder and outputting the AGC value to the multiplier.

Hereinafter, with reference to the accompanying drawings will be described in detail the configuration and operation of the digital AGC device having a variable loop gain according to the present invention.

2 is a block diagram of a digital AGC device having a variable loop gain according to the present invention, in which the AGC output signals I and Q have sufficient bit resolution by multiplying the AGC input signals I and Q by the AGC values output from the loop filter. A power extractor 21 which extracts a power level by averaging the multiplier 10, the AGC output signals I and Q output from the multiplier 10, and the power level extracted by the power extractor 21 and the desired power level. The loop gain is changed according to the input signal using a detector 20 composed of a subtractor 22 subtracting a threshold value corresponding to a power level, and a signal output from the subtractor 22 in the detector 20 as an input signal. And multiplying the difference between the loop gain selected by the loop gain selector 31 and the power level output from the subtractor 22 in the detector 20 and the threshold value. A multiplier 32 and the first multiplication An adder 33 for adding the AGC value output from the device 32 and the AGC value previously stored in the register and outputted, and the multiplier 10 after temporarily storing the AGC value output from the adder 33. It consists of a loop filter 30 composed of a register (34) for outputting.

3 is a block diagram of the loop gain selector 31 according to the first embodiment, which includes an absolute value calculator 41 which takes an absolute value with respect to a signal output from the subtractor 22 in the detector 20, A scaling factor is applied to a power multiplier 42 that performs power multiplication on a signal whose absolute value is obtained through the absolute value calculator 41, and a power multiplied by the power multiplier operation 42 is performed. And a second multiplier 43 which multiplies and outputs a loop gain.

4 is a block diagram of the loop gain selector 31 according to the second embodiment, which includes an absolute value calculator 51 which takes an absolute value with respect to a signal output from the subtractor 22 in the detector 20, MSB checker 52 for checking the MSB (Most Significant Bit) that is not '0' with respect to the signal whose absolute value is obtained through the absolute value calculator 51, and the MSB checked by the MSB checker 52. An address designation unit 53 for designating an address of a ROM table in which loop gain is stored, and a ROM table in which loop gain in accordance with MSB is stored for each address. And a ROM table control unit 53 which reads and outputs the loop gain according to the MSB stored at the address specified in (53) from the ROM table.

As described above, the loop gain selector 31 has a structure form of multiplying scaling factors after an exponential operation as shown in FIG. 3 and a structure form using a ROM table as shown in FIG. 4.

Referring to the operation of the digital AGC device having a variable loop gain of the present invention configured as described above is as follows.

The multiplier 10 multiplies the AGC input signals I and Q by the AGC values output from the loop filter 30 so that the AGC output signals I and Q have sufficient bit resolution.

The detector 20 extracts the power level by taking an average of the AGC output signals I and Q output from the multiplier 10 through the power extractor 21, and extracts the power level through the subtractor 22. Subtracted a threshold value corresponding to a power level extracted from the power level and a desired power level, and outputs a difference between the power level and the threshold value to the loop filter 30.

Subsequently, the loop gain selector 31 in the loop filter 30 uses the signal output from the subtractor 22 in the detector 20 as an input signal, and changes the loop gain according to the input signal to select the multiplier 32. Output

That is, in the output result of the subtractor 22 in the detector 20, the loop gain is increased when the difference between the power level and the threshold is large, and the loop is reversed when the difference between the power level and the threshold is small. Reduce the gain.

The detailed operation of the loop gain selector 31 will be described with reference to FIGS. 3 and 4, and since the signal output through the subtractor 22 in the detector 20 can be both positive and negative, You must take an absolute value.

That is, as shown in FIG. 3, the absolute value of the signal output from the subtractor 22 in the detector 20 is taken through the absolute value calculator 41.

Subsequently, the power calculation unit 42 performs a power operation on the signal whose absolute value is obtained through the absolute value calculation unit 41.

In other words, when the power operation, that is, exponential operation, is performed on the input signal, the effect can be maximized.

At this time, since the signal output through the subtractor 22 in the detector 20 is always '1' or less, the power must be taken as a number smaller than one.

Subsequently, the power multiplier 42 multiplies the scaling factor by the scaling factor by the second multiplier 43 to output a loop gain to the first multiplier 32.

On the other hand, the process of taking the power as described above requires a large amount of calculation, it is possible to reduce the amount of calculation using the ROM table as shown in FIG.

Also in this case, the absolute value is taken with respect to the signal output from the subtractor 22 in the detector 20 through the absolute value calculation unit 51 as described above.

Subsequently, the MSB checking unit 52 checks the MSB other than '0' with respect to the signal whose absolute value is taken through the absolute value calculating unit 51.

Then, the address designator 53 designates the address of the ROM table in which the loop gain corresponding to the MSB confirmed by the MSB check unit 52 is stored.

Thereafter, the ROM table control unit 53 having a ROM table in which loop gains corresponding to the MSB are stored for each address is read from the ROM table according to the MSB stored in the address designated by the address designation unit 53. And a first multiplier (32).

Subsequently, the second multiplier 32 multiplies the difference between the loop gain selected by the loop gain selector 31 and the power level output from the subtractor 22 in the detector 20 and the threshold to the adder 33. Output

Then, the adder 33 adds the AGC value output from the multiplier 32 and the AGC value previously stored in the register 34 and outputted to the register 34.

Thereafter, the register 34 temporarily stores the AGC value output from the adder 33 and outputs the result to the multiplier 10.

As described above, in the digital AGC apparatus according to the present invention, when the difference between the power level and the threshold is large, the AGC output signal cannot maintain sufficient bit resolution, so that the loop gain is increased so that the threshold value can be reached in a short time. If the difference between the power level and the threshold is small, the desired bit resolution has already been obtained. Therefore, the loop gain is decreased so that the time constant is increased to achieve finer gain control.

5A and 5B show simulation results of a conventional digital AGC device and a digital AGC device according to the present invention, and show a variable loop gain according to the present invention when comparing a digital AGC device having the same attenuation rate. It can be seen that the digital AGC device having a smaller time constant than the conventional digital AGC device having a fixed loop gain.

Since the digital AGC device of the present invention as described above is not dependent on a specific communication standard, it can be applied to all communication systems adopting the concept of digital radio. In particular, the digital AGC device may be utilized for Code Division Multiple Access (CDMA) as well as Group Speciale Mobile (GSM). It is possible to apply to a base station as well as a mobile terminal.

As described above, the present invention includes a loop gain selector inside the loop filter, and when the difference between the power level output from the detector and the threshold is large, the loop gain is increased to decrease the time constant, and the power level and the threshold are increased. If the difference is small, the loop gain is reduced to increase the time constant, such that the loop gain is varied according to the output signal of the detector, thereby improving the performance of the digital AGC device.

Claims (4)

A multiplier for multiplying the AGC input signals I and Q by the AGC value output from the loop filter so that the AGC output signals I and Q have sufficient bit resolution; A detector comprising a power extractor for taking an average of the AGC output signals I and Q output from the multiplier and extracting a power level, a subtractor for subtracting the power level extracted from the power extractor and a threshold value; A loop gain selector for selecting and outputting a loop gain according to the input signal using the signal output from the subtractor in the detector as an input signal, the loop gain selectively output from the loop gain selector and the power output from the subtractor in the detector A first multiplier for multiplying a difference between a level and a threshold, an adder for adding an AGC value output from the first multiplier and an AGC value previously stored in a register and outputted, and an AGC value output from the adder A digital automatic gain control device having a variable loop gain, characterized in that the loop filter consisting of registers which are stored and output to the multiplier. The method of claim 1, wherein the loop gain selector, An absolute value calculator which takes an absolute value with respect to a signal output from the subtractor in the detector; A power arithmetic unit that performs power multiplication on a signal whose absolute value is obtained through the absolute value calculator; And a second multiplier for multiplying a scaling factor by the power of the power calculation unit to a scaling factor and outputting a loop gain. The method of claim 2, wherein the power calculation unit, Digital power gain control device having a variable loop gain, characterized in that the power operation is performed by the absolute value calculation unit to a power of less than '1' for the signal is taken. The method of claim 1, wherein the loop gain selector, An absolute value calculator which takes an absolute value with respect to a signal output from the subtractor in the detector; An MSB checker for checking a non-zero MSB with respect to a signal whose absolute value is taken through the absolute value calculator; An address designation unit for designating an address of a ROM table in which a loop gain according to the MSB confirmed by the MSB verification unit is stored; Each address includes a ROM table in which a loop gain according to the MSB is stored, and a ROM table control unit reads and outputs the loop gain according to the MSB stored in the address designated by the address designation unit from the ROM table. Digital automatic gain control device having a variable loop gain.