KR20020049769A - An Improvement in the Heat Dissipating Structure of a Flip Chip Module - Google Patents

An Improvement in the Heat Dissipating Structure of a Flip Chip Module Download PDF

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KR20020049769A
KR20020049769A KR1020000079053A KR20000079053A KR20020049769A KR 20020049769 A KR20020049769 A KR 20020049769A KR 1020000079053 A KR1020000079053 A KR 1020000079053A KR 20000079053 A KR20000079053 A KR 20000079053A KR 20020049769 A KR20020049769 A KR 20020049769A
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flip chip
chip module
heat dissipation
epoxy resin
substrate
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KR1020000079053A
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Korean (ko)
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시에웬로
추앙융쳉
후앙닝
첸휘핀
치앙화웬
창추앙밍
투펭창
후앙푸유
창흐수안쥐
후치아채흐
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듀흐 마리 에스.
오리엔트 세미컨덕터 일렉트로닉스 리미티드
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Priority to KR1020000079053A priority Critical patent/KR20020049769A/en
Publication of KR20020049769A publication Critical patent/KR20020049769A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3737—Organic materials with or without a thermoconductive filler
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/295—Organic, e.g. plastic containing a filler
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE: An advanced thermal dispersion structure of a flip chip module is provided to increase dispersion efficiency of the flip chip module by using an epoxy resin with a material having prominent conductivity such as copper, silver, and aluminium to seal fully the flip chip module. CONSTITUTION: A plurality of solder balls(111) are formed on a bottom of a flip chip module(1). The flip chip module(1) includes a packaged substrate(11). A solder bump(211) is fully sealed by using a filling agent(31). The flip chip module(1) is fully covered by using the epoxy resin(41). Accordingly, a distance of thermal transfer path is reduced since the epoxy resin(41) is directly contacted with a chip(21). In addition, thermal dispersion efficiency is increased by reduction of the distance of thermal transfer path.

Description

플립 칩 모듈의 열 분산 구조물의 개량{An Improvement in the Heat Dissipating Structure of a Flip Chip Module}An improvement in the heat dissipating structure of a flip chip module

본 발명은 플립 칩 모듈(flip chip module)의 개량형 열 분산 구조물에 관한 것이며, 특히, 구리, 은, 알루미늄등 전도성이 우수한 물체와 함께 에폭시 수지를 이용하는 열 분산 구조물에 관한 것이다.The present invention relates to an improved heat dissipation structure of a flip chip module, and more particularly, to a heat dissipation structure using an epoxy resin together with an object having excellent conductivity such as copper, silver, and aluminum.

도 1a는 플립 칩 모듈의 종래의 열 분산 구조를 나타낸다. 도시된 바와같이, 플립 칩 모듈(1')은 바닥에 복수의 땜납 볼(111')이 구비된 기판(11')을 포함한다. 기판(11')의 상부에는, 합성 수지(13')로 금속 솔더 범프(solder bump)(121') 및 칩(12')을 봉함으로서 플립 칩(12')가 패키지된다. 열 분산 커버(16')의 내부 상부면에 열 분산제/접착제(14')를 사용하여 열 분산 커버(16')를 칩(12')에 실장하고,열 분산 커버(16')의 바닥은 열 분산제/접착제(15')를 사용하여 실장한다.1A shows a conventional heat dissipation structure of a flip chip module. As shown, the flip chip module 1 'includes a substrate 11' having a plurality of solder balls 111 'at the bottom thereof. On top of the substrate 11 ', the flip chip 12' is packaged by sealing the metal solder bump 121 'and the chip 12' with the synthetic resin 13 '. The heat dissipation cover 16 'is mounted on the chip 12' using a heat dispersant / adhesive 14 'on the inner top surface of the heat dissipation cover 16', and the bottom of the heat dissipation cover 16 ' It is mounted using a heat dispersant / adhesive 15 '.

도 1b는 플립 칩 모듈의 다른 종래 열 분산 구조를 나타낸다. 도시된 바와같이, 합성 수지(23')로 금속 솔더 범프(221') 및 칩(22')을 봉함으로서 플립 칩(22')을 기판(21')의 상부에 패키지한다. 분산제/접착제(24')를 사용하여 납작한 상부판(27')을 칩(22')의 상부에 부착한다. 열 분산 수지/접착제(25')를 사용하여 열 분산 프레임(271')을 납작한 상부판(27') 아래에 배치하고 납작한 상부판(27')의 바닥에 결합한다. 그런후, 열 분산수지/접착제(26')를 사용하여 기판(21')의 상부에 열 분산 프레임(271')의 바닥을 부착한다.1B illustrates another conventional heat dissipation structure of a flip chip module. As shown, the flip chip 22 'is packaged on top of the substrate 21' by sealing the metal solder bumps 221 'and the chip 22' with the synthetic resin 23 '. A flat top plate 27 'is attached to the top of the chip 22' using a dispersant / adhesive 24 '. The heat dissipation resin / adhesive 25 'is used to place the heat dissipation frame 271' under the flat top plate 27 'and join to the bottom of the flat top plate 27'. The bottom of the heat dissipation frame 271 'is then attached to the top of the substrate 21' using a heat dissipation resin / adhesive 26 '.

도 1c는 플립 칩의 세번째의 종래 열 분산 구조물을 나타낸다. 도시된 바와같이, 합성 수지(33')로 금속 솔더 범프(321') 및 칩(32')을 봉함으로서 플립 칩(32')을 기판(31')의 상부에 패키지한다. 열 분산 접착제(34')를 사용하여 열 분산판(35')을 칩(32')의 상부에 부착한다.1C shows a third conventional heat dissipation structure of a flip chip. As shown, the flip chip 32 'is packaged on top of the substrate 31' by sealing the metal solder bumps 321 'and the chip 32' with the synthetic resin 33 '. A heat dissipation plate 35 'is attached to the top of the chip 32' using a heat dissipation adhesive 34 '.

상술한 종래 구조물로 칩에 의해 발생한 과열을 분산시킬 수 있더라도, 동일한 작업대에 있는 칩에 열 분산 구조물을 형성하는 것이 불가능하므로, 전체 플립 칩 모듈을 다른 생산 라인으로 이동시킬 필요가 있으며, 따라서, 공정이 매우 복잡해진다. 또한, 칩과 열 분산 구조물 사이에 있는 열 분산제를 사용하여 칩에 의해 발생한 과열을 열 분산 구조물로 전달해야한다. 즉, 칩의 다른 부분은 열 분산 구조물과 접촉하지 않으므로, 칩에 의해 발생된 과열을 빠르게 분산시킬 수 없다. 열 분산제에 의해 열 분산 구조물이 칩에 부착되고, 심지어는 분산 구조물의 성분들이 열 분산제에 의해 서로 결합되어, 열 분산 구조물이 다른 팽창 계수를 갖는 재료로만들어지기 때문에, 열 분산 구조물의 성분들의 길이가 다르게 증가하거나 감소하여, 열 분산 구조물에 심각한 문제를 일으킨다.Although the above-described conventional structure can dissipate the overheat generated by the chip, it is impossible to form the heat dissipation structure on the chip in the same workbench, so it is necessary to move the entire flip chip module to another production line, and thus, the process This becomes very complicated. In addition, a heat dispersant between the chip and the heat dissipation structure must be used to transfer the overheat generated by the chip to the heat dissipation structure. That is, no other part of the chip is in contact with the heat dissipation structure, and thus cannot dissipate the overheat generated by the chip quickly. The length of the components of the heat dissipating structure is because the heat dissipating structure is attached to the chip by the heat dispersing agent and even the components of the dispersing structure are bonded to each other by the heat dispersing agent, so that the heat dissipating structure is made of a material having a different coefficient of expansion Increases or decreases otherwise, causing serious problems with the heat dissipation structure.

따라서, 본 발명의 목적은 상술한 결점을 줄일 수 있는 개량형 열 분산 구조물을 제공하는 것이다.Accordingly, it is an object of the present invention to provide an improved heat dissipation structure that can reduce the drawbacks described above.

본 발명의 주목적은 플립 칩을 패키징하기 위해 동일한 작업대에 형성할 수 있는 플립 칩 모듈의 개량형 열 분산 구조물을 제공하는 것이다.It is an object of the present invention to provide an improved heat dissipation structure of flip chip modules that can be formed on the same workbench for packaging flip chips.

본 발명의 다른 목적은 에폭시 수지에 의해 전도성이 우수한 물체로 플립 칩 모듈을 완전히 봉하여, 플립 칩 모듈의 분산율을 증가시키는 플립 칩 모듈의 개량형 열 분산 구조물을 제공하는 것이다.Another object of the present invention is to provide an improved heat dissipation structure of a flip chip module by sealing the flip chip module completely with an electrically conductive object by an epoxy resin to increase the dispersion ratio of the flip chip module.

도 1a, 도 1b, 및 도 1c는 플립 칩 모듈의 다양한 종래 열 분산 구조물을 나타낸다.1A, 1B, and 1C show various conventional heat dissipation structures of a flip chip module.

도 2는 본 발명에 따른 플립 칩 모듈의 열 분산 구조물을 나타내는 단면도이다.2 is a cross-sectional view showing a heat dissipation structure of a flip chip module according to the present invention.

도 2를 참조하면, 본 발명에 따른 플립 칩 모듈의 열 분산 구조물은 에폭시 수지를 이용하여 플립 칩 모듈을 완전하게 봉한다. 도시된 바와같이, 플립 칩 모듈(1)은 바닥에 복수의 땜납 볼(111)이 구비되고 상부에는 플립 칩 모듈(1)이 패키지된 기판(11)을 포함하며, 충전재(filling)(31')를 사용하여 솔더 범프(211)를 완전하게 봉한다.2, the heat dissipation structure of the flip chip module according to the present invention completely seals the flip chip module using an epoxy resin. As shown, the flip chip module 1 includes a substrate 11 having a plurality of solder balls 111 at the bottom and a flip chip module 1 packaged at the top thereof, and a filling 31 '. ) To completely seal the solder bumps 211.

그런후, 에폭시 수지를 사용하여 구리, 금, 알루미늄, 은 등 전도성이 우수한 물체로 플립 칩 모듈을 덮으며, 따라서, 에폭시(41) 및 칩(21) 사이가 직접 접촉되어, 열 전달 경로의 길이가 줄어들 수 있으므로, 열 분산 효율이 증가한다.Then, an epoxy resin is used to cover the flip chip module with a conductive material such as copper, gold, aluminum, silver, etc., and thus, the direct contact between the epoxy 41 and the chip 21 is achieved, so that the length of the heat transfer path As can be reduced, the heat dissipation efficiency is increased.

플립 칩을 패키징하기 위하여 동일한 작업대에 있는 플립 칩 모듈에 열 분산구조물을 형성할 수 있으므로, 플립 칩 모듈을 다른 생산 라인으로 이동시킬 필요가 없으며, 제조 시간이 줄어든다. 또한, 칩이 에폭시 수지 내에 완전하게 봉해지기 때문에, 칩이 잘 고정되고 분산이 좋아진다. 또한, 열 분산 구조물을 단일 재료(즉, 에폭시 수지)로만 만들기 때문에, 다른 팽창 계수에 의해 열 분산 구조물이 영향을 받지 않는다.The heat dissipation structure can be formed on flip chip modules on the same workbench to package flip chips, eliminating the need to move the flip chip module to another production line and reducing manufacturing time. In addition, since the chip is completely enclosed in the epoxy resin, the chip is well fixed and dispersion is good. In addition, since the heat dissipation structure is made of only a single material (ie epoxy resin), the heat dissipation structure is not affected by other expansion coefficients.

그러나, 기판(11)은 필요에 따라 리드 프레임(lead frame)으로 대체될 수 있음에 주목해야한다.However, it should be noted that the substrate 11 may be replaced with a lead frame as needed.

본 발명의 플립 칩 모듈의 개량형 열 분산 구조물을 사용하면, 플립 칩을 패키징하기 위해 동일한 작업대에 구조물을 형성할 수 있으며, 에폭시 수지에 의해 전도성이 우수한 물체로 플립 칩 모듈을 완전히 봉하여, 플립 칩 모듈의 분산율을 증가시킬 수 있다.Using the improved heat dissipation structure of the flip chip module of the present invention, the structure can be formed on the same workbench to package the flip chip, and the flip chip module is completely sealed by an epoxy resin with excellent conductivity, and the flip chip It is possible to increase the dispersion rate of the module.

Claims (2)

플립 칩 모듈을 완전히 봉하는 에폭시 수지를 포함하며,Epoxy resin that completely seals the flip chip module, 상기 플립 칩 모듈은 바닥에 복수의 땜납 볼이 구비되고 상부에는 상기 플립 칩 모듈이 패키지된 기판을 포함하고,The flip chip module includes a substrate having a plurality of solder balls at a bottom thereof and a package on which the flip chip module is packaged thereon. 상기 기판상의 솔더 범프(solder bump)는 충전제에 의해 완전하게 봉해지며,Solder bumps on the substrate are completely sealed by filler, 상기 플립 칩 모듈을 에폭시를 사용하여 전도성 물체로 덮어서,The flip chip module is covered with a conductive object using epoxy, 상기 에폭시 및 상기 칩 모듈 사이가 직접 접촉되어, 열 전달 경로를 줄일 수 있으며, 열 분산 효율을 높일 수 있는 것을 특징으로 하는 플립 칩 모듈의 분산 구조물.The direct contact between the epoxy and the chip module, it is possible to reduce the heat transfer path, the dispersion structure of the flip chip module, characterized in that to increase the heat dissipation efficiency. 제 1항에 있어서, 상기 기판이 리드 프레임(lead frame)으로 대체될 수 있는 것을 특징으로 하는 플립 칩 모듈의 분산 구조물.The dispersion structure of a flip chip module according to claim 1, wherein the substrate can be replaced with a lead frame.
KR1020000079053A 2000-12-20 2000-12-20 An Improvement in the Heat Dissipating Structure of a Flip Chip Module KR20020049769A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101440343B1 (en) * 2013-01-18 2014-09-15 앰코 테크놀로지 코리아 주식회사 Semiconductor package

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101440343B1 (en) * 2013-01-18 2014-09-15 앰코 테크놀로지 코리아 주식회사 Semiconductor package

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