KR20020035013A - Microwave Variable Time Delay Circuit - Google Patents

Microwave Variable Time Delay Circuit Download PDF

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Publication number
KR20020035013A
KR20020035013A KR1020020004985A KR20020004985A KR20020035013A KR 20020035013 A KR20020035013 A KR 20020035013A KR 1020020004985 A KR1020020004985 A KR 1020020004985A KR 20020004985 A KR20020004985 A KR 20020004985A KR 20020035013 A KR20020035013 A KR 20020035013A
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South Korea
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time delay
circuit
impedance
circulator
total reflection
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KR1020020004985A
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Korean (ko)
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이시동
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이시동
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Publication of KR20020035013A publication Critical patent/KR20020035013A/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages

Abstract

PURPOSE: A radio frequency variable time delay circuit is provided, which vary a delay time by controlling a position of a total reflection using a principle that a radio frequency propagating with a specific impedance is totally reflected from a zero impedance or an infinite impedance. CONSTITUTION: In a time delay circuit of every kinds of circuits dealing a radio frequency, a time delay to a zero impedance realized from a circulator to a capacitor(6) is made on a microstrip line. A coplanar waveguide, a waveguide strip line and a coaxial cable are used in stead of the microstrip line. And a 90 deg. hybrid coupler or a ring hybrid are used in stead of the circulator, and the zero capacitor is realized with a wire instead of the capacitor. The time delay circuit is made or the time delay is controlled by controlling a distance from the circulator to an open circuit, that is, a total reflection point(7) by realizing the total reflection point as the open circuit on the coplanar waveguide, the waveguide, the strip line or the coaxial cable.

Description

고주파 가변 시간 지연 회로{Microwave Variable Time Delay Circuit}High Frequency Variable Time Delay Circuit {Microwave Variable Time Delay Circuit}

본 발명은 고주파신호의 Time Delay에 관한 회로로서 더욱 상세하게는 고주파신호를 전력 증폭하는데 사용되는 Feedforward 방식이나 Predistortion 방식 등을 사용하는 Linearity Power Amplifier(LPA)의 Time Delay회로에 관한 것이다.The present invention relates to a time delay circuit of a high frequency signal, and more particularly, to a time delay circuit of a linearity power amplifier (LPA) using a feedforward method or a predistortion method used to power amplify a high frequency signal.

전력 증폭기에서의 사용 예를 보면 일반적으로 무선 기지국이나 중계기 등에서 처리된 신호를 최종 단에서 전력증폭하기 위해서 전력증폭기(Power Amplifier)를 사용하게 된다. 보통 전력증폭기는 비선형 영역에서 동작하므로Harmonic 성분이나 Intermodulation Distortion(이하 IMD라 함) 성분이 발생하게 되고, 이러한 불필요한 성분을 억제하기 위해서 전력증폭기에서 Feedforward 방식이나 Adaptive Predistortion 방식 등을 사용하게 된다. 예로 도 3에서와 같이 Feedforward 방식의 Loop1에선 Main Amp로 통과하는 신호와 Delay Line을 통과하는 신호의 Time Delay를 맞춰 빼기 회로에 도착하는 두 신호의 시간차를 없어지게 한 후 서로 합쳐 IMD 신호만을 추출하게 되고, Loop2 에선 Error Amp를 통과하는 신호와 Delay Line을 통과하는 신호의 Delay Time을 맞춰 시간차를 없어지게 한 후 서로 합쳐 최종적으로 IMD성분을 제거하게 된다. 이때 두 Loop에서 두 Pass간의 정확한 Time Delay가 맞지 않으면 IMD 성분을 제거하지 못할 뿐만 아니라 오히려 IMD 성분을 증가시키는 요소가 된다.In the example of a power amplifier, a power amplifier is generally used to amplify a signal processed by a wireless base station or a repeater at a final stage. In general, power amplifiers operate in the non-linear region, which generates harmonic or intermodulation distortion (hereinafter referred to as IMD) components, and feedforward or adaptive predistortion methods are used in power amplifiers to suppress such unnecessary components. For example, in the feedforward loop1, as shown in FIG. 3, the time delay of the signal passing through the main amp and the signal passing through the delay line is eliminated so that the time difference between the two signals arriving at the circuit is eliminated. In Loop2, the delay time between the signal passing through the Error Amp and the signal passing through the Delay Line is eliminated and the IMD component is finally removed. In this case, if the correct time delay between two passes in the two loops is not correct, the IMD component is not removed, but rather, it is an element that increases the IMD component.

기존의 Delay Line은 도4에 보인 것과 같이 Coaxial Cable만을 사용하여 Nanosecond의 Delay Time을 맞춰야 하므로 Delay Line 길이가 정확하지 않을 때 혹은 Connector 등의 연결, 다른 Pass로 통과하는 Delay Time의 변화 등의 이유로 Delay Time을 변화시키고자 할 때 가변이 어렵다는 단점이 있었다.As the existing delay line has to adjust the delay time of the nanosecond using only the coaxial cable as shown in Fig. 4, when the length of the delay line is not correct or the connection of the connector, or the change of the delay time passing through another pass, etc. There was a disadvantage that the change was difficult when trying to change the time.

본 발명은 상기와 같은 문제점을 해소하기 위해 무한대의 Impedance나 Zero Impedance가 아닌 특정Impedance(주로 50Ω 사용)에서 진행하는 고주파신호가 Zero Impedance 혹은 무한대의 Impedance 에서 전반사 되는 원리를 이용하여 전반사 되는 위치를 조절하므로 서 Delay Time을 가변 할 수 있게 하는데 목적이 있다.The present invention adjusts the position of total reflection using the principle that the high frequency signal proceeding at a specific impedance (mainly 50Ω) is not totally reflected in Zero Impedance or Infinite Impedance, rather than infinite Impedance or Zero Impedance. Therefore, the purpose is to be able to change the delay time.

이와 같은 목적을 달성하기 위해 본 발명은 Delay Line으로 Time Delay를조절하는 회로에 있어서, Circulator 및 입/출력 Impedance와 같은 값의 Impedance 값을 갖는 Microstrip Line, 고주파신호가 진행하는 선로의 특정 지점의 Impedance 값을 Zero Impedance로 만들도록 접지와 연결 된 Capacitor로 이루어진 회로로 구성하여 Time Delay 및 Time Delay를 조절하도록 설계하였다.In order to achieve the above object, the present invention provides a circuit for controlling a time delay with a delay line, including a circulator and an input / output impedance, such as a microstrip line having an impedance value, and an impedance at a specific point of a line where a high frequency signal progresses. It is designed to adjust the time delay and time delay by constructing a circuit composed of capacitors connected to ground to make the value zero zero.

제1도는 무손실 Microstrip Line의 단위 길이 당 특성 Impedance를 나타내기 위한 등가 회로 및 무손실 Microstrip Line에 병렬로 접지와 연결 된 Capacitor C1을 달았을 때의 특성 Impedance의 변화를 나타내기 위한 등가 회로도.1 is an equivalent circuit for indicating the characteristic impedance per unit length of a lossless microstrip line, and an equivalent circuit diagram for the change of the characteristic impedance when a capacitor C1 connected to ground is connected in parallel to a lossless microstrip line.

제2도는 고주파 가변 시간 지연 회로도.2 is a high frequency variable time delay circuit diagram.

제3도는 Time Delay 회로를 쓰고 있는 Feedforward 방식의 Power Amplifier 블록도.3 is a feedforward power amplifier block diagram using a time delay circuit.

제4도는 현재 Time Delay로 쓰이고 있는 Coaxial Cable4 is a coaxial cable currently used as a time delay.

이하 첨부된 도면에 의해 상세히 설명하면 다음과 같다. 도 1은 계산의 편의상 Microstrip Line을 무손실의 Line으로 봤을 때, 무손실 Microstrip Line의 단위 길이 당 집중정수 소자로 등가 화한 특성 Impedance를 나타내는 도면으로서 C는 단위 길이 당 Microstrip Line의 병렬 Capacitance 성분을 나타내고, L은 단위 길이당 Microstrip Line의 Inductance 성분을 나타 낸다. C1 은 무손실 Microstrip Line에 병렬로 연결된 Capacitor를 나타 낸다. 이 회로의 특성 Impedance는 수학식 1에 의해 구해 진다. 접지와 병렬로 연결된 Capacitor C1을 무 손실 Microstrip Line에 달았을 때의 특성 Impedance 또한 수학식 1에 의해 구해진다. 수학식 1에서 무 손실 Microstrip Line에 병렬로 연결된 Capacitor인 C1 값의 크기를 크게 함으로써 무 손실 Microstrip Line의 특정 부분 특성 Impedance를 Zero에 접근시킬 수 있다.Hereinafter, described in detail by the accompanying drawings as follows. 1 is a diagram showing the characteristic impedance equivalent of a lumped constant element per unit length of a lossless microstrip line when the microstrip line is seen as a lossless line for convenience of calculation. C represents the parallel capacitance component of the microstrip line per unit length. Represents the inductance component of the microstrip line per unit length. C1 represents a capacitor connected in parallel to a lossless microstrip line. The characteristic impedance of this circuit is obtained by equation (1). The characteristic impedance when the capacitor C1 connected in parallel with the ground is attached to a lossless microstrip line is also obtained by Equation 1. In Equation 1, by increasing the size of C1, a capacitor connected in parallel to a lossless microstrip line, a specific partial characteristic impedance of the lossless microstrip line can be approached to zero.

도 2는 고주파용 가변 시간 지연 회로도로서, 입력 측 Microstrip Line(1), Circulator(2), 출력 측 Microstrip Line(3), 반사가 일어나는 쪽의 Port(4), 반사가 일어나는 쪽의 Microstrip Line(5), 고주파신호가 진행하는 선로의 특정 지점의 Impedance 값을 Zero Impedance로 만들도록 접지와 연결 된 Capacitor(6), 전반사가 일어나는 지점(7)으로 구성되어 있다.2 is a high-frequency variable time delay circuit diagram, which includes an input microstrip line (1), a circulator (2), an output microstrip line (3), a port on a reflection side (4), and a microstrip line on a reflection side ( 5) It consists of a capacitor (6) connected to ground and a point (7) where total reflection occurs so as to make the impedance value of the specific point of the line through which the high frequency signal travels to zero impedance.

도 2에서 고주파 신호의 흐름을 살펴보면 특정 Impedance의 전송선로를 통해 진행하는 파는 Circulator의 입력 측 Port(1)로 들어오게 된다. Circulator의 입력 측 Port로 들어온 고주파 신호는 반사가 일어나는 쪽의 Port(4)로만 신호의 전달이 전부 이루어지고, 이 Port(4)로 전달 된 신호는 입/출력 Impedance와 같은 값의 Impedance 값을 가진 Microstrip Line으로 전부 반사 없이 전달된다. 그 후 고주파 신호는 Microstrip Line을 따라 거리 D만큼을 더 진행하게 된다. 이 때 전반사가 이루어지는 지점(7)에서 고주파 신호가 Capacitor(6)에 의해 형성된 Zero Impedance를 만나게 되고, 수학식 2에 의해 Load Impedance가 Zero가 되므로(ZL=0) 고주파 신호의 전압 반사 계수(Voltage Reflection Coefficient)는 -1이 된다. 이 것은 고주파 신호의 전반사가 이루짐을 의미한다. 모든 고주파 신호는 전반사 되어 다시 Circulator쪽으로 Microstrip Line상에서 D거리만큼 더 진행을 하게 된다. 그 후 Circulator의 Port(4)로 입사된 고주파 신호는 출력 측 Port(3)로 전부 전달되어 결과적으로 신호는 2×D 만큼의 거리를 더 진행하고 신호의 전달이 이루어진 결과가 된다.Referring to the flow of the high frequency signal in Figure 2, the wave traveling through the transmission line of a specific impedance is introduced into the input port (1) of the circulator. The high frequency signal coming into the input port of the circulator is completely transmitted to the port (4) on the side where the reflection occurs, and the signal transmitted to this port (4) has the same impedance value as the input / output impedance. All are transmitted to the microstrip line without reflection. The high frequency signal then travels further along the microstrip line by the distance D. At this time, the high frequency signal meets the Zero Impedance formed by the Capacitor 6 at the point where total reflection occurs, and the Load Impedance becomes Zero by Equation 2 (ZL = 0). Reflection Coefficient) is -1. This means that total reflection of the high frequency signal is achieved. All high-frequency signals are totally reflected back to the circulator further by D distance on the microstrip line. Thereafter, the high frequency signal incident on the port (4) of the circulator is transmitted to the output port (3). As a result, the signal travels further by 2 x D and the signal is transmitted.

이때 신호의 Time Delay는 수학식 3 으로 구할 수 있으며, 신호는 Time Delay가 생기게 되고 신호의 전달이 이루어진다.At this time, the time delay of the signal can be obtained from Equation 3, and the signal has a time delay and the signal is transmitted.

또한 선로의 특정 지점 Impedance 값을 Zero가 되게 하는 Capacitor(6)의 위치를 바꿈으로써, 신호가 진행 거리D를 조절 할 수 있어 Time Delay를 쉽고, 정확하게 변화시킬 수 있다.In addition, by changing the position of the capacitor (6) that makes the impedance value of the line to zero, the signal can adjust the travel distance D can easily and accurately change the time delay.

이상에서 상술한 바와 같이 본 발명은 특정 Impedance에서 진행하던 신호가 Zero Impedance나 무한대 Impedance점에서 신호의 전반사가 이루어지는 원리에 의해 Time Delay 회로를 구성하였다. 또한 Time Delay를 변화시켜야 할 때마다 Capacitor의 위치 즉 Zero Impedance 점의 위치를 조금 씩 변화시킴으로써, Nanosecond의 Delay Time을 맞춰야 하는 System에서 보다 쉽고, 정확히 Time Delay를 조정할 수 있게 하였다.As described above, the present invention constitutes a time delay circuit based on the principle that the signal proceeding at a specific impedance is totally reflected at a zero impedance or an infinite impedance point. Also, whenever the time delay needs to be changed, the position of the capacitor, that is, the position of the zero impedance point, is changed little by little, making it easier and more accurate to adjust the time delay in the system that needs to adjust the delay time of the nanosecond.

Claims (1)

고주파 신호를 다루는 각종 회로의 Time Delay 회로에서, Microstrip Line 상에 Circulator 에서 Capacitor로 구현한 Zero Impedance 점까지의 거리로 Time Delay를 하거나 Time Delay를 조절하는 회로In the time delay circuit of various circuits that handle high frequency signals, the circuit that adjusts the time delay or adjusts the time delay with the distance from the circulator to the zero impedance point implemented as a capacitor on the microstrip line. 상기 회로에 있어서, Microstrip Line과 같은 용도로 Coplanar Waveguide, Waveguide, Strip Line, Coaxial Cable 등의 형태로 구현한 회로In the circuit, a circuit implemented in the form of a coplanar waveguide, waveguide, strip line, coaxial cable, etc. for the same purpose as a microstrip line. 상기 회로에서, Circulator 와 같은 용도로 90˚Hybrid Coupler혹은 Ring Hybrid를 이용한 회로In this circuit, a circuit using 90˚Hybrid Coupler or Ring Hybrid for the same purpose as Circulator 상기 회로에 있어서, Capacitor 대신 Wire등으로 Zero Impedance를 구성한In the above circuit, Zero Impedance is composed of wires instead of capacitors. 회로Circuit 상기 회로에 있어서, Zero Impedance 점에서의 전반사 대신 Coplanar Waveguide, Waveguide, Strip Line, Coaxial Cable 상에서 전반사 점을 Open Circuit으로 구현하여 Circulator 등에서 Open Circuit, 즉 전반사 점까지의 거리를 조절하여 Time Delay Circuit을 만들거나 Time Delay를 조절하는 회로In the above circuit, instead of total reflection at the zero impedance point, the total reflection point is implemented as an open circuit on the coplanar waveguide, waveguide, strip line, and coaxial cable to make a time delay circuit by adjusting the distance from the circulator to the open circuit, that is, the total reflection point. Circuitry or time delay adjustment
KR1020020004985A 2002-01-29 2002-01-29 Microwave Variable Time Delay Circuit KR20020035013A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5815803A (en) * 1996-03-08 1998-09-29 The United States Of America As Represented By The Secretary Of The Navy Wideband high isolation circulatior network
JPH1168409A (en) * 1997-08-18 1999-03-09 Kokusai Electric Co Ltd Delay circuit
KR20000022918A (en) * 1998-09-04 2000-04-25 루센트 테크놀러지스 인크 Reflection mode phase shifter
KR20010047733A (en) * 1999-11-23 2001-06-15 최춘권 System for Combining RF Transmitter and Receiver Using Circulator and Method for Cancelling Transmission Signal thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5815803A (en) * 1996-03-08 1998-09-29 The United States Of America As Represented By The Secretary Of The Navy Wideband high isolation circulatior network
JPH1168409A (en) * 1997-08-18 1999-03-09 Kokusai Electric Co Ltd Delay circuit
KR20000022918A (en) * 1998-09-04 2000-04-25 루센트 테크놀러지스 인크 Reflection mode phase shifter
KR20010047733A (en) * 1999-11-23 2001-06-15 최춘권 System for Combining RF Transmitter and Receiver Using Circulator and Method for Cancelling Transmission Signal thereof

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