KR20020017804A - Method for fabricating pinned photodiode in CMOS image sensor - Google Patents
Method for fabricating pinned photodiode in CMOS image sensor Download PDFInfo
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- KR20020017804A KR20020017804A KR1020000051318A KR20000051318A KR20020017804A KR 20020017804 A KR20020017804 A KR 20020017804A KR 1020000051318 A KR1020000051318 A KR 1020000051318A KR 20000051318 A KR20000051318 A KR 20000051318A KR 20020017804 A KR20020017804 A KR 20020017804A
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- 238000000034 method Methods 0.000 title claims abstract description 22
- 238000005468 ion implantation Methods 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 230000003647 oxidation Effects 0.000 claims abstract description 8
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 8
- 239000012535 impurity Substances 0.000 claims description 40
- 239000004065 semiconductor Substances 0.000 claims description 10
- 230000003139 buffering effect Effects 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 6
- 229910052710 silicon Inorganic materials 0.000 abstract description 6
- 239000010703 silicon Substances 0.000 abstract description 6
- 150000002500 ions Chemical class 0.000 abstract description 5
- 150000004767 nitrides Chemical class 0.000 abstract description 4
- 239000002019 doping agent Substances 0.000 abstract 5
- 230000003287 optical effect Effects 0.000 abstract 2
- 238000004519 manufacturing process Methods 0.000 description 7
- 238000002955 isolation Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 206010034960 Photophobia Diseases 0.000 description 1
- 210000003323 beak Anatomy 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 208000013469 light sensitivity Diseases 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14685—Process for coatings or optical elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14698—Post-treatment for the devices, e.g. annealing, impurity-gettering, shor-circuit elimination, recrystallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
Abstract
Description
본 발명은 씨모스 이미지센서(CMOS Image Sensor)의 핀드 포토다이오드(Pinned Photodiode) 제조방법에 관한 것으로, 특히 핀드 포토다이오드의 커패시턴스를 향상시키기 위한 방법에 관한 것이다.The present invention relates to a method for manufacturing a pinned photodiode of a CMOS image sensor, and more particularly, to a method for improving the capacitance of a pinned photodiode.
잘 알려진 바와 같이, CMOS 이미지센서의 단위 화소는 광감지소자로서 핀드 포토다이오드(Pinned Photodiode)와 상기 핀드 포토다이오드에 생성된 광전하(photo generated charge)의 전기적 신호 처리를 위한 모스트랜지스터들로 구성된다.As is well known, a unit pixel of a CMOS image sensor is composed of a pinned photodiode as a photosensitive device and morph transistors for electrical signal processing of photo generated charge generated in the pinned photodiode. .
도1a 및 도1b는 종래기술에 따른 핀드 포토다이오드 제조 공정을 보여준다.1A and 1B show a pinned photodiode manufacturing process according to the prior art.
도1a는 실리콘기판(101)상에 광감지소자영역(A)이 모두 덮히도록 산화마스크(102)를 형성하고, 필드스탑이온주입에 의한 필드스탑불순물층(103)을 형성한 다음, 산화공정에 의해 필드산화막(104)을 형성한 상태이다. 필드스탑불순물층(103)은 소자분리막 하부에서 소자간의 누설전류를 막기위하여 형성된다. 상기 산화마스크(102)는 적층된 패드산화막과 질화막이며, 버즈비크 억제 등을 목적으로 패드산화막/폴리실리콘막/질화막 등을 사용할 수도 있다.In FIG. 1A, an oxide mask 102 is formed to cover all of the photosensitive device regions A on the silicon substrate 101, and a field stop impurity layer 103 is formed by field stop ion implantation, followed by an oxidation process. In this state, the field oxide film 104 is formed. The field stop impurity layer 103 is formed to prevent leakage current between devices under the device isolation film. The oxide mask 102 is a laminated pad oxide film and a nitride film, and a pad oxide film, a polysilicon film, a nitride film, or the like may be used for suppressing burj beak.
이어서, 먼저 도1b는 소자분리마스크(102)를 제거하고 광감지소자영역(A)이 오픈된 이온주입마스크(도면에 도시되지 않음)를 형성하고, 저농도 고에너지 N-타입 이온주입을 실시하여 N형 불순물층(105)을 형성한 다음, 고농도 저에너지 P타입 이온주입을 실시하여 P형 불순물층(106)을 형성한 상태이다. 이에 의해 P형실리콘기판/N형불순물층/P형불순물층으로 이루어진 핀드 포토다이오드가 형성된다.Subsequently, FIG. 1B first removes the device isolation mask 102 and forms an ion implantation mask (not shown) in which the photosensitive device region A is opened, and then performs a low concentration high energy N-type ion implantation. After the N-type impurity layer 105 is formed, a high concentration low energy P-type ion implantation is performed to form the P-type impurity layer 106. As a result, a pinned photodiode consisting of a P-type silicon substrate / N-type impurity layer / P-type impurity layer is formed.
이러한 핀드 포토다이오드는 CMOS 이미지센서에서 외부로부터의 빛을 감지하여 광전하를 생성 및 집적하는 소자로 사용되며, 기판 내부에서 매립된 PNP(또는 NPN) 접합 구조를 갖고 있어 베리드 포토다이오드(Buried Photodiode)라 불리우기도 한다.The pinned photodiode is used as a device for generating and accumulating photocharges by sensing light from the outside in a CMOS image sensor. A buried photodiode has a PNP (or NPN) junction structure embedded in a substrate. It is also called).
핀드 포토다이오드는 소스/드레인 PN 접합(Junction) 구조나 모스캐패시터 구조 등 다른 구조의 포토다이오드에 비해 여러 가지 장점을 갖고 있으며, 그 장점중 하나가 공핍층의 깊이를 증가시킬 수 있어 입사된 광자(Photon)를 전자(Electron)로 바꾸어 주는 능력이 우수하다는 것이다(High Quantum Efficiency). 즉, PNP 접합 구조의 핀드 포토다이오드는 N영역이 완전공핍되면서 N영역을 개재하고 있는 두 개의 P영역으로 공핍층이 형성되므로 그 만큼 공핍층 깊이를 증가시켜 광전하생성효율(Quantum Efficiency)을 증가시킬 수 있다. 또한 이에 의해 광감도(Light Sensitivity)가 매우 우수하다.The pinned photodiode has several advantages over other photodiodes such as source / drain PN junction structure or MOS capacitor structure, and one of the advantages is to increase the depth of the depletion layer. The ability to convert Photon into Electron is excellent (High Quantum Efficiency). In other words, the pinned photodiode of the PNP junction structure has a depletion layer formed by two P regions intervening the N region while the N region is completely depleted, thereby increasing the depth of the depletion layer, thereby increasing the quantum efficiency. You can. In addition, the light sensitivity is very excellent.
한편, 포토다이오드에 형성되는 공핍층은 입사하는 빛을 전자로 바꾸는 역할 뿐만아니라 바뀐 전하를 모으기 위한 커패시터로써의 역할을 한다. 포토다이오드가 입사하는 빛을 전자로 바꾸는 능력인 광전하생성효율(Quantum efficiency)이 어느정도인가 하는 문제 외에도 전자를 모아 둘 수 있는 용량이 어느 정도인가에 따라 이미지센서의 특성이 달라지게 된다.Meanwhile, the depletion layer formed on the photodiode not only converts incident light into electrons, but also serves as a capacitor for collecting the changed charges. In addition to the problem of quantum efficiency, which is the ability of a photodiode to convert incident light into electrons, the characteristics of an image sensor vary depending on the capacity of electrons.
따라서, 보다 개선된 영상을 얻기 위해서는 핀드 포토다이오드가 전하를 축적할 수 있는 용량을 더 크게 늘려야 하는 바, 즉 핀드 포토다이오드의 커패시턴스를 크게하여야 하는 바, 고집적 CMOS 이미지센서에서는 핀드 포토다이오드의 면적을 늘리기에는 한계가 있기 때문에 이에 대한 해결이 절실히 요구되고 잇다.Therefore, in order to obtain an improved image, the pinned photodiode needs to increase the capacity to accumulate charges, that is, to increase the capacitance of the pinned photodiode. There is a limit to increase, so a solution is urgently needed.
본 발명은 CMOS 이미지센서의 영상 특성을 향상시키기 위하여 핀드 포토다이오드의 커패시턴스를 증대시키기 위한 핀드 포토다이오드 제조방법을 제공하는데 그 목적이 있다.SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a pinned photodiode for increasing capacitance of a pinned photodiode in order to improve image characteristics of a CMOS image sensor.
도1a 및 도1b는 종래기술에 따른 핀드 포토다이오드 제조 공정도,Figures 1a and 1b is a pinned photodiode manufacturing process according to the prior art,
도2a 내지 도2c는 본 발명의 제1실시예에 따른 핀드 포토다이오드 제조 공정도,2a to 2c is a manufacturing process diagram of the pinned photodiode according to the first embodiment of the present invention,
도3a 내지 도3c는 본 발명의 제2실시예에 따른 핀드 포토다이오드 제조 공정도,3a to 3c is a process diagram of a pinned photodiode according to a second embodiment of the present invention,
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
201 : 실리콘기판201: Silicon substrate
202, 203 : 산화마스크202, 203: oxide mask
204 : 필드스탑이온주입마스크204: Field stop ion implantation mask
205 : 광감지영역(A)내에서의 산화마스크 오픈부205: Oxide mask opening in the light sensing area (A)
206 : 필드스탑불순물층206: field stop impurity layer
207 : 필드산화막207: field oxide film
207a : 더미산화막207a: dummy oxide film
208 : N형 불순물층208 N-type impurity layer
209 : P형 불순물층209 P-type impurity layer
상기 목적을 달성하기 위한 제1특징적인 본 발명은, CMOS 이미지센서의 핀드포토다이오드 형성 방법에 있어서, 제1도전형의 반도체기판 상에 필드영역이 오픈되되, 핀드포토다이오드가 형성될 영역이 국부적으로 다수군데 오픈된 산화마스크를 형성하는 단계; 상기 핀드포토다이오드가 형성될 영역의 오픈부를 덮도록 이온주입마스크를 형성하고 필드스탑불순물을 이온주입하여 상기 필드영역의 반도체기판에 필드스탑불순물층을 형성하는 단계; 상기 이온주입마스크를 제거하고 산화공정에 의해 상기 필드영역에 필드산화막을 형성하고 상기 핀드포토다이오드영역에이온주입완충을 위한 더미산화막을 형성하는 단계; 및 상기 핀드포토다이오드영역의 상기 반도체기판 내에 제2도전형의 불순물 및 제1도전형의 불순물을 이온주입한 후 열공정을 실시하여 핀드포토다이오드를 형성하는 단계를 포함하여 이루어진다.According to a first aspect of the present invention, in the method for forming a pinned photodiode of a CMOS image sensor, a field region is opened on a first conductive semiconductor substrate, and a region where a pinned photodiode is to be formed is localized. Forming a plurality of open oxide masks; Forming a field stop impurity layer on the semiconductor substrate of the field region by forming an ion implantation mask to cover the open portion of the region where the pinned photodiode is to be formed and implanting the field stop impurity; Removing the ion implantation mask, forming a field oxide film in the field region by an oxidation process, and forming a dummy oxide layer for buffering ion implantation in the pinned photodiode region; And forming a pinned photodiode by ion implanting impurities of a second conductivity type and impurities of the first conductivity type into the semiconductor substrate of the pinned photodiode region.
또한 제2특징적인 본 발명은, CMOS 이미지센서의 핀드포토다이오드 형성 방법에 있어서, 제1도전형의 반도체기판 상에 필드영역이 오픈되고 핀드포토다이오드가 형성될 영역이 모두 덮힌 산화마스크를 형성하고 필드스탑불순물 이온주입 및 필드 산화를 실시하는 단계; 상기 산화마스크를 제거하고 상기 핀드포토다이오드 영역에 국부적으로 다수군데 이온주입완충을 위한 절연막을 형성하는 단계; 및 상기 핀드포토다이오드영역의 상기 반도체기판 내에 제2도전형의 불순물 및 제1도전형의 불순물을 이온주입한 후 열공정을 실시하여 핀드포토다이오드를 형성하는 단계를 포함하여 이루어진다.According to a second aspect of the present invention, in the method of forming a pinned photodiode of a CMOS image sensor, an oxide mask is formed on a semiconductor substrate of a first conductivity type, in which a field region is opened and a region in which a pinned photodiode is to be formed is covered. Performing field stop impurity ion implantation and field oxidation; Removing the oxide mask and forming an insulating film for buffering ion implantation locally in the pinned photodiode region; And forming a pinned photodiode by ion implanting impurities of a second conductivity type and impurities of the first conductivity type into the semiconductor substrate of the pinned photodiode region.
상기한 바와 같이 본 발명은, 광감지소자영역내에 국부적으로 이온주입완충패턴을 형성하여 평면적이 아닌 입체적으로 굴곡지게 핀드 포토다이오드를 형성하므로써, 그의 커패시턴스를 증가시켜 고집적화되어가는 CMOS 이미지센서의 이미지 특성을 개선시키게 된다.As described above, the present invention forms a pinned photodiode in which the ion implantation buffer pattern is locally formed in the photosensitive device region so as to be bent in three dimensions rather than planarly, thereby increasing its capacitance and thereby increasing the image characteristics of the CMOS image sensor. To improve.
이하, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명의 기술적 사상을 용이하게 실시할 수 있을 정도로 상세히 설명하기 위하여, 본 발명의 가장 바람직한 실시예를 첨부된 도면을 참조하여 설명하기로 한다.DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.
도2a 내지 도2c는 본 발명의 제1실시예에 따른 핀드 포토다이오드 제조 공정도이다.2A to 2C are flowcharts of manufacturing a pinned photodiode according to a first embodiment of the present invention.
도2a를 참조하면, 소자분리막(FOX)을 형성하기 위하여 실리콘기판(201)에 산화마스크(202, 203)을 형성하되, 광감지소자영역(A)에서도 국부적으로 다수군데가 오픈(205)되도록 산화마스크(202, 203)를 형성한 다음, 상기 광감지영역(A)내에서의 오픈부(205)를 모두 덮도록 필드스탑이온주입마스크(204)를 형성한 다음, 필드스탑이온주입을 실시하여 필드스탑불순물층(206)을 형성한다. 결국, 필드스탑불순물층(206)은 소자분리영역에만 형성되고 광감지소자영역(A)에는 형성되지 않는다. 산화마스크는 패드산화막(202)/질화막(203)으로 형성되어 있다.Referring to FIG. 2A, the oxide masks 202 and 203 are formed on the silicon substrate 201 to form the device isolation film FOX, but are locally opened 205 in the photosensitive device region A. After the oxide masks 202 and 203 are formed, the field stop ion implantation mask 204 is formed to cover all the open portions 205 in the light sensing region A, and then the field stop ion implantation is performed. The field stop impurity layer 206 is formed. As a result, the field stop impurity layer 206 is formed only in the device isolation region and not in the photosensitive device region A. FIG. The oxide mask is formed of a pad oxide film 202 / nitride film 203.
도2b를 참조하면, 상기 필드스탑이온주입마스크(204)를 제거한 다음, 산화공정에 의해 오픈 지역의 기판을 산화시키므로써 필드산화막(FOX)(207)과 더미산화막(207a)을 형성한다. 더미산화막(207a)는 후속 공정에서 형성되는 핀드 포토다이오드의 N형 불순물층이 굴곡진 형상을 갖도록 하여 핀드 포토다이오드의 커패시턴스를 증대시키는 목적으로 사용된다.Referring to FIG. 2B, the field stop ion implantation mask 204 is removed, and then a field oxide film (FOX) 207 and a dummy oxide film 207a are formed by oxidizing the substrate in an open area by an oxidation process. The dummy oxide film 207a is used for the purpose of increasing the capacitance of the pinned photodiode so that the N-type impurity layer of the pinned photodiode formed in a subsequent process has a curved shape.
이어서, 도2c는 저농도 고에너지로 n형 불순물을 이온주입하고, 이어서 고농도 저에너지 P형 불순물을 이온주입한 다음, 열공정을 거친 후의 단면도로서, N형 불순물층(208) 및 P형 불순물층(209)이 형성되되, N형 불순물층(208)은 그 구조가 굴곡진 형상을 가진다. 즉, 더미산화막(207a)는 N형 불순물 이온주입시 완충 역할을 하기 때문에 그 부분에서는 이온주입 농도가 약하여 N형 불순물층은 굴곡이 지게된다. 이때 더미산화막의 두께 및 이온주입에너지 등을 조절하여 더미산화막의 하부에도 N형 불순물이 이온주입되도록 하여야 하며, 더미산화막의 두께 및 이온주입에너지를 조절하면 원하는 핀드 포토다이오드의 프로파일을 얻을 수 있다.Next, FIG. 2C is a cross-sectional view of ion implantation of n-type impurities at low concentration and high energy, followed by ion implantation of high concentration and low energy P-type impurities, followed by a thermal process. 209 is formed, and the N-type impurity layer 208 has a curved shape. That is, since the dummy oxide film 207a functions as a buffer when the N-type impurity ions are implanted, the ion implantation concentration is weak at that portion, and the N-type impurity layer is bent. At this time, N-type impurities must be implanted into the lower portion of the dummy oxide film by adjusting the thickness and ion implantation energy of the dummy oxide film, and the desired pinned photodiode profile can be obtained by adjusting the thickness and ion implantation energy of the dummy oxide film.
도3a 내지 도3c는 본 발명의 제2실시예에 따른 핀드 포토다이오드 제조 공정도이다.3A to 3C are flowcharts of manufacturing a pinned photodiode according to a second embodiment of the present invention.
본 발명의 제2실시예에서는 종래와 동일하게 광감지소자영역(A)을 모두 덮은 상태에서, 소자분리를 수행하고 후속 공정에서 별도의 절연막을 광감지소자영역에 형성하여 N형 불순물층에 굴곡을 주는 것이다.In the second embodiment of the present invention, as in the prior art, all the photosensitive device regions A are covered, and device isolation is performed, and a separate insulating film is formed in the photosensitive device region in a subsequent process to bend the N-type impurity layer. To give.
도3a는 광감지소자영역(A)을 모두 덮는 마스크를 사용하여 필드스탑이온주입 및 필드 산화 공정을 수행하므로써 실리콘기판(301)에 필드산화막(302)와 필드스탑불순물층(303)을 형성한 상태이다.FIG. 3A shows that a field oxide film 302 and a field stop impurity layer 303 are formed on a silicon substrate 301 by performing a field stop ion implantation and a field oxidation process using a mask covering all of the photosensitive device regions A. FIG. It is a state.
이어서, 도3b와 같이 광감지소자영역(A)에 국부적으로 다수군데 얇은 절연막(304)을 형성하고, 도3c와 같이 저농도 고에너지로 n형 불순물을 이온주입하고, 고농도 저에너지 P형 불순물을 이온주입한 다음, 열공정을 실시하여, N형 불순물층(305) 및 P형 불순물층(306)을 형성한다. N형 불순물층(208)은 얇은 절연막(304)이 이온주입시 완충 역할을 하므로 그 구조가 굴곡진 형상을 갖게 된다.Subsequently, as shown in FIG. 3B, a plurality of thin insulating films 304 are formed locally in the photosensitive device region A, ion-implanted n-type impurities at low concentration and high energy as shown in FIG. 3C, and ions are implanted with high concentration low energy P-type impurities. After implantation, a thermal process is performed to form an N-type impurity layer 305 and a P-type impurity layer 306. The N-type impurity layer 208 has a curved shape because the thin insulating film 304 serves as a buffer for ion implantation.
이때 얇은 산화막 및 이온주입에너지 등을 조절하여 얇은 산화막(304) 하부에도 N형 불순물이 이온주입되도록 하여야 하며, 상기 얇은 절연막(304)의 두께 및 이온주입에너지를 조절하면 원하는 핀드 포토다이오드의 프로파일을 얻을 수 있다.At this time, N-type impurities should be implanted into the lower portion of the thin oxide film 304 by adjusting the thin oxide film and the ion implantation energy, and by adjusting the thickness and the ion implantation energy of the thin insulating film 304, the desired pinned photodiode profile is You can get it.
한편 상기 절연막(304)의 광투과도 등을 고려하여 상기 절연막(304)은 추후공정에서 제거할수도 있고 그대로 놔둘수 있다.On the other hand, in consideration of the light transmittance of the insulating film 304, the insulating film 304 may be removed in a later step or may be left as it is.
본 발명의 기술 사상은 상기 바람직한 실시예에 따라 구체적으로 기술되었으나, 상기한 실시예는 그 설명을 위한 것이며 그 제한을 위한 것이 아님을 주의하여야 한다. 또한, 본 발명의 기술 분야의 통상의 전문가라면 본 발명의 기술 사상의 범위내에서 다양한 실시예가 가능함을 이해할 수 있을 것이다.Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.
상기한 본 발명은 칩 면적의 확장 없이 핀드 포토다이오드의 커패시턴스를 증대시키므로해서 고집적 CMOS 이미지센서의 특성을 크게 개선하며, 아울러 수율 또한 증대 시킬수 있어 원가절감이 가능하다.According to the present invention, the capacitance of the pinned photodiode can be increased without increasing the chip area, thereby greatly improving the characteristics of the highly integrated CMOS image sensor, and also increasing the yield, thereby reducing the cost.
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