KR20020004281A - Circuit for driving liquid crystal display device - Google Patents

Abstract

PURPOSE: A drive circuit of an LCD is provided to control chromaticity and white balance by applying each reference voltage to an R, a G, and a B channel decoder to output different channel voltage. CONSTITUTION: The first digital/analog converter(33) is used for converting inputted R color digital data to analog data by using an output of the first reference voltage generation portion(31). The second digital/analog converter(37) is used for converting inputted G color digital data to analog data by using an output of the second reference voltage generation portion(35). The third digital/analog converter(41) is used for converting inputted B color digital data to analog data by using an output of the third reference voltage generation portion(39). The first, the second, the third digital/analog converters(33,37,41) include the first decoder portion(43) and the second decoder portion(45), respectively. An output selection portion(47) outputs alternately the outputs of the first and the second decoder portions(43,45).

Description

Circuit for driving liquid crystal display device

The present invention relates to a display device, and more particularly to a driving circuit of a liquid crystal display device.

Cathode Ray Tube (CRT), one of the display devices, has been used mainly for monitors such as TVs, measuring devices, and information terminal devices.However, due to the weight or size of the CRT itself, Couldn't respond positively.

In order to replace the CRT, Liquid Crystal Dispaly (LCD), which has the advantages of light and thin, has been actively developed, and recently, the liquid crystal display (LCD) has been developed enough to perform a role as a flat panel display device. Demand is on the rise.

In general, a low cost and high performance thin film transistor liquid crystal display (TFT-LCD) uses an amorphous silicon thin film transistor as a switching device. Currently, the liquid crystal display device is a VGA (Video Graphic Array; maximum resolution is 640 x 480 pixels). It aims at high resolution with SVGA (800 × 600) and XVGA (1024 × 768).

The development of the TFT-LCD industry and its application has been accelerated by the increase in size and the increase in resolution, and much effort has been made in terms of simplification of the manufacturing process and improvement of yield for the purpose of increasing productivity and low cost.

The liquid crystal display device includes a liquid crystal panel, a gate drive IC, and a source drive IC. The gate drive IC sequentially outputs a gate driving signal to a plurality of scan lines formed in the liquid crystal panel, and the source drive IC of the liquid crystal panel Outputs R, G, and B video signals to the data line.

Here, the source drive IC will be described in more detail as follows.

1 is a block diagram of a general source drive IC, and includes a shift register 11, a sampling latch 13, a holding latch 15, a digital / analog converter 17, and an amplifier 19. do.

The shift register 11 shifts the horizontal synchronizing signal pulse HSYNC by the source pulse clock HCLK and outputs the latch clock to the sampling latch unit 13.

The sampling latch unit 13 latches the digital R, G, and B data by column lines according to the latch clock output from the shift register unit 11.

The holding latch unit 15 simultaneously receives and latches R, G, and B data latched to the sampling latch unit 13 by a load signal.

The digital / analog converter unit 17 converts the digital R, G, and B data stored in the holding latch unit 15 into analog R, G, and B data.

The amplifier 19 amplifies the R, G, and B data converted into the analog signal by the digital / analog converter 17 to a predetermined level and outputs the data to the panel data line.

Such a source drive IC generates one data output during one horizontal period, that is, analog R, G, and B data after sample & hold of digital R, G, and B data during one horizontal period. When the holding latch unit 15 holds R, G, and B data corresponding to the nth column line, the sampling latch unit 13 is n + 1. The R, G, and B data corresponding to the first column line are sampled.

Hereinafter, a driving circuit of a liquid crystal display according to the related art will be described with reference to the accompanying drawings.

FIG. 2 illustrates a driving circuit of a liquid crystal display according to the related art, and is a detailed configuration diagram of a digital / analog converter unit for converting R, G, and B digital signals into analog signals among components of a source drive IC.

As shown in FIG. 1, the first and second decoders 21 and 23 decoding an analog voltage corresponding to each of the R, G, and B digital data to be inputted by the selection signal POLC. A mux unit 25 for selectively outputting either the output of the first decoder unit 21 or the output of the second decoder unit 23, and the first decoder unit 21 can decode the analog voltage. A reference voltage output unit 27 for outputting a reference voltage divided to a level from VH63 to VH0 and a reference voltage divided to a level from VL63 to VL0 so that the second decoder 22 can decode the analog voltage. It consists of.

Here, the first decoder 21 outputs an analog voltage of a level corresponding to the digital data input by using the reference voltage divided from VH63 to VH0, which is a voltage for positively driving the liquid crystal. . The second decoder 23 outputs an analog voltage having a level corresponding to the input digital data by using the reference voltage divided from VL63 to VL0, and is a voltage for negatively driving the liquid crystal. At this time, the digital data is simultaneously input to the first and second decoders 21 and 23.

The R, G, and B digital data are R (1) [5: 0], G (1) [5: 0], B (1) [5: 0] to R (n) [5: 0], G (n) [5: 0], up to B (n) [5: 0], where [5: 0] means 6-bits driving, and if 8-bits driving, [7: 0] Is indicated. In this example, 6-bit driving is used.

As described above, the VH63 to VHO are positive reference voltages for the decoder and are divided into VH255 to VH0 in the case of 8-bit driving. VL63 to VL0 are negative decoder reference voltages, and are divided into VL255 to VL0 in the case of 8-bit driving.

The mux unit 25 alternately outputs the output voltage of the first decoder unit 21 and the output voltage of the second decoder unit 23, which alternates the liquid crystal to be positive (+) or negative (-). It is controlled by the selection signal POLC for driving.

The operation of the driving circuit of the conventional liquid crystal display will be described as follows.

First, the digital-to-analog converter (DAC) converts R, G, and B digital data into analog data, and inputs the R, G, and B digital data to drive a liquid crystal positively. The first and second decoders 21 and 23 decode to output a voltage for negative driving. At this time, the first decoder unit 21 decodes using the reference voltage divided into VH63 to VH0, and the second decoder unit 23 decodes using the reference voltage divided into VL63 to VL0.

Thereafter, the output voltage of the first decoder unit 21 decoded by the analog voltage and the output voltage of the second decoder unit 23 are alternately output by the mux unit 25, and output from the mux unit 25. R, G, and B analog data are transferred to the data line through the buffer unit 29.

However, the driving circuit of the conventional liquid crystal display device has the following problems.

The reference voltage is uniformly applied to the decoder for each channel of R, G, and B. In this case, when the same data is input to each channel, the R, G, and B output voltages are also output with the same value.

Therefore, it is impossible to adjust the color coordinates or the white balance of the image and thus cannot satisfy the consumer's desire for color and chromaticity adjustment.

The present invention has been made to solve the above-described problems of the prior art, by adjusting the output voltage for each channel by applying a reference voltage for each decoder for each of the R, G, and B channels, thereby adjusting the chromaticity adjustment and the white balance adjustment. It is an object of the present invention to provide a driving circuit of a liquid crystal display device.

1 is a configuration diagram of a general source driver

2 is a block diagram of a driving circuit according to a conventional liquid crystal display device.

3 is a configuration diagram of a driving circuit of the liquid crystal display device of the present invention.

4 is an enlarged view of a digital / analog converter according to a driving circuit of the present invention;

Explanation of symbols for main parts of drawings

31: first reference voltage generator

33: first digital / analog converter

35: second reference voltage generator

37: second digital / analog converter

39: third reference voltage generator

41: third digital / analog converter

43, 45: first and second decoder unit 47: output selection unit

49: buffer part

The driving circuit of the liquid crystal display device of the present invention for achieving the above object is a driving circuit of the liquid crystal display device for converting the inputted R, G, B digital data into analog data, and outputs the reference voltage for each R, G, B channel A first, second and third reference voltage generators for outputting the digital signal; a digital / analog converter unit for outputting an analog voltage corresponding to digital data for each channel by using the output voltage of the reference voltage generator; And a buffer unit for buffering the output of the analog converter unit and temporarily outputting the output to the data line by a control signal.

The driving circuit of the liquid crystal display device according to the present invention applies different reference voltages to each of the channels R, G, and B so that the chromaticity and the white balance can be adjusted for each of the R, G, and B channels. To satisfy the needs of consumers.

Hereinafter, a driving circuit of the liquid crystal display of the present invention will be described with reference to the accompanying drawings.

3 illustrates a driving circuit of the liquid crystal display device according to the present invention, in which digital data for each of R, G, and B channels is converted into analog data using separate reference voltages. That is, the first digital-to-analog converter 33 converts the input R color digital data into analog data using the output of the first reference voltage generator 31, and converts the input G color digital data into the second reference voltage. The second digital / analog converter 37 converts the analog data by using the output of the generator 35, and the digital data of the input B color by using the output of the third reference voltage generator 39. And a third digital-to-analog converter 41 for converting the data into the first and second digital-to-analog converters 41, 37, and 41, respectively. And an output selector 47 for alternately outputting the outputs of the first and second decoders 43 and 45.

The first, second, and third reference voltage generators 31, 35, and 39 are divided into voltages divided at levels of VHn to VH0 and voltages divided to levels of VLn to VL0, respectively. The first decoder 43 of the first digital-to-analog converter 33 uses the voltage divided by the level of VHn to VH0 among the output voltages of the first reference voltage generator 31 to positively (+) the liquid crystal. Decoded to an analog voltage for driving, and the second decoder unit 45 uses the voltage divided by the level of VLn to VL0 among the output voltages of the first reference voltage generator 31 to negative (-). Decode to analog voltage to drive.

In addition, the first decoder unit 43 of the second digital / analog converter unit 37 uses the voltage divided by the level of VHn to VH0 among the output voltages of the second reference voltage generator 35. Is decoded into an analog voltage for positive driving, and the second decoder unit 45 uses the voltage divided by the level of VLn to VL0 among the output voltages of the second reference voltage generator 35. Decodes into analog voltage to drive negative.

The first decoder unit 43 of the third digital / analog converter unit 41 may set the liquid crystal by using a voltage divided to a level of VHn to VH0 among the output voltages of the third reference voltage generator 39. The second decoder 45 decodes an analog voltage for driving, and the second decoder 45 negatively uses the voltage divided by the level of VLn to VL0 among the output voltages of the third reference voltage generator 39. -) Decode to analog voltage to drive.

Here, each of the reference voltage generators 31, 35, and 39 serially connects a plurality of resistors between a power supply voltage terminal and a ground terminal to output a voltage of the level through resistance distribution. The first decoder units 43 and the second decoder units 45 of the analog converter units 33, 37, and 41 are digitally input by selectively combining a plurality of levels of a plurality of levels output through the resistance distribution. Output as much voltage as the data.

In addition, at least one of the plurality of resistors constituting each of the reference voltage generators 31, 35, and 39, for example, the resistor having the largest value among the plurality of resistors connected in series, may be external to the source drive IC. It consists of a variable resistor that can be adjusted.

Therefore, a reference voltage serving as an output reference for each of the R, G, and B channels may be differently applied to each of the first, second, and third digital / analog converters 33, 37, and 41. This makes it possible to adjust the chromaticity and the white balance.

3 illustrates data of one pixel of R, G, and B, but is a digital / analog converter according to VGA (Video Graphic Array; maximum resolution is 640 × 480 pixels), SVGA (800 × 600), and XVGA (1024 × 768). The structure of has a repetitive structure as shown in FIG.

Referring to the operation of the driving circuit according to the present invention as follows.

When digital data of a corresponding channel is input to the first, second, and third digital / analog converters 33, 37, and 41, each of the digital / analog converters 33, 37, and 41 is input to the corresponding channel. It decodes the voltage for positive driving and the voltage for negative driving according to the digital data. That is, the first decoder unit 43 of the first digital / analog converter unit 33 selectively combines the level among the levels between VH63 and VH0 output from the first reference voltage generator 31 to the corresponding digital unit. Decoded to an analog voltage corresponding to the data, and the second decoder 45 selectively combines any level among the levels from VL63 to VL0 output from the first reference voltage generator 31 to correspond to the corresponding digital data. Decode to analog voltage.

In addition, the first decoder unit 43 of the second digital-to-analog converter unit 37 selectively combines any level among the levels from VH63 to VH0 output from the second reference voltage generator 35 to perform the corresponding digital operation. Decoded to an analog voltage corresponding to the data, and the second decoder 45 selectively combines any level among the levels from VL63 to VL0 output from the second reference voltage generator 35 to correspond to the corresponding digital data. Decode to analog voltage.

In addition, the first decoder 43 of the third digital-to-analog converter 41 selectively combines any level among the levels of VH63 to VH0 output from the third reference voltage generator 39 to provide the corresponding digital data. The second decoder 45 selectively combines any level among the levels from VL63 to VL0 output from the third reference voltage generator 39 to correspond to the corresponding digital data. Decode to analog voltage.

Thereafter, the output selector 47 alternately outputs an analog voltage for positive driving and an analog voltage for negative driving for each of the R, G, and B channels according to the input selection signal POLC. . Here, the output selector 47 is composed of a switching element that alternately switches the output voltages of the first and second decoders 43 and 45 or a multiplexer operated by the selection signal.

The output signals of the respective digital / analog converters 33, 37, and 41 selected by the output selector 47 are input to the corresponding buffer unit 49 and then output to the corresponding data lines.

For reference, the driving circuit according to the embodiment of the present invention is an example that the R, G, B data is 6 bits, but is not limited to 6 bits.

As described above, the driving circuit of the liquid crystal display device of the present invention applies chromaticity control and white balance by applying reference voltages for each of R, G, and B channels to convert R, G, and B channel digital data into analog voltages. (White balance) can be adjusted, thereby providing a good image quality to the consumer.

Claims (10)

In a driving circuit of a liquid crystal display device for converting inputted R, G, B digital data into analog data and outputting the same, First, second, and third reference voltage generators for outputting reference voltages for R, G, and B channels; A digital / analog converter configured to output an analog voltage corresponding to digital data for each channel by using an output voltage of the reference voltage generator; And a buffer unit for buffering an output of the digital / analog converter unit and temporarily outputting the digital / analog converter unit to a data line by a control signal. The method of claim 1, wherein the digital to analog converter, A first digital / analog converter for outputting an analog voltage corresponding to digital data of R color using the output voltage of the first reference voltage generator; A second digital / analog converter for outputting an analog voltage corresponding to digital data of G color using the output voltage of the second reference voltage generator; And a third digital / analog converter configured to output an analog voltage corresponding to digital data of B color using the output voltage of the third reference voltage generator. The method of claim 2, wherein each of the digital to analog converter, A first decoder to decode the liquid crystal to a voltage for positive driving; And a second decoder section for decoding the liquid crystal into a voltage for negative driving. The driving circuit of claim 2, wherein an output selector for selectively outputting the output of the first decoder unit and the output of the second decoder unit is further provided at an output terminal of each digital / analog converter. . The method of claim 4, wherein the output selector, And an output voltage of the first decoder unit and an output voltage of the second decoder unit are alternately output. The method of claim 4, wherein the output selector, A driving circuit for a liquid crystal display device, characterized by comprising a multiplexing or switching element controlled by a selection signal. 4. The driving circuit of claim 3, wherein each of the first decoders decodes the reference voltages divided by a level from VHn to VH0 output from the reference voltage generator. 4. The driving circuit of claim 3, wherein each of the second decoders decodes the reference voltage divided by the level of VLn to VL0 output from the reference voltage generator. The method of claim 1, wherein each reference voltage generator, A driving circuit of a liquid crystal display device, characterized in that a plurality of resistors are connected in series between the power supply voltage terminal and the ground terminal. 10. The driving circuit of claim 9, wherein at least one of the plurality of resistors is a variable resistor that can adjust its value outside the driving circuit unit.