KR200145194Y1 - Test apparatus for semiconductor chip - Google Patents

Test apparatus for semiconductor chip Download PDF

Info

Publication number
KR200145194Y1
KR200145194Y1 KR2019940018985U KR19940018985U KR200145194Y1 KR 200145194 Y1 KR200145194 Y1 KR 200145194Y1 KR 2019940018985 U KR2019940018985 U KR 2019940018985U KR 19940018985 U KR19940018985 U KR 19940018985U KR 200145194 Y1 KR200145194 Y1 KR 200145194Y1
Authority
KR
South Korea
Prior art keywords
semiconductor chip
test pin
holder
lead
contact
Prior art date
Application number
KR2019940018985U
Other languages
Korean (ko)
Other versions
KR960006348U (en
Inventor
이상의
Original Assignee
윤종용
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 윤종용, 삼성전자주식회사 filed Critical 윤종용
Priority to KR2019940018985U priority Critical patent/KR200145194Y1/en
Publication of KR960006348U publication Critical patent/KR960006348U/en
Application granted granted Critical
Publication of KR200145194Y1 publication Critical patent/KR200145194Y1/en

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2855Environmental, reliability or burn-in testing
    • G01R31/286External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2865Holding devices, e.g. chucks; Handlers or transport devices
    • G01R31/2867Handlers or transport devices, e.g. loaders, carriers, trays
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2855Environmental, reliability or burn-in testing
    • G01R31/286External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2863Contacting devices, e.g. sockets, burn-in boards or mounting fixtures
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2884Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2887Features relating to contacting the IC under test, e.g. probe heads; chucks involving moving the probe head or the IC under test; docking stations

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Environmental & Geological Engineering (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

반도체칩 검사장치에 관한 것으로, 반도체칩에 전혀 손상을 가하지 않고 그 기능 및 성능을 시험하여 신뢰성있게 불량품을 판단할 수 있는 반도체칩 검사장치를 제공함에 있어, 반도체칩을 검사하기 위하여 반도체칩 리드가 있는 반도체칩이 위치되는 반도체칩 홀더와, 상기 반도체칩 홀더의 주변에 죄우로 이동 가능하게 설치되는 테스트핀 홀더와, 상기 테스트핀 홀더에 설치되어 상기 반도체칩의 리드에 접촉하는 테스트핀과, 상기 테스트핀이 상기 반도체칩의 리드에 접촉하도록 상기 테스트핀을 이동시키는 이동수단을 구비하여, 반도체칩 리드가 소켓에 삽입되고 빠질 때 상기 접속단자와 반도체칩 리드의 마찰로 인한 긁힘이 발생하는 문제점을 해결할 수 있을 뿐만 아니라 리드가 휘어지는 것을 방지할 수 있다.The present invention relates to a semiconductor chip inspecting apparatus, and to providing a semiconductor chip inspecting apparatus capable of reliably determining a defective product by testing its function and performance without damaging the semiconductor chip at all, A semiconductor chip holder in which the semiconductor chip is located, a test pin holder movably installed around the semiconductor chip holder, a test pin installed in the test pin holder and in contact with a lead of the semiconductor chip; It is provided with a moving means for moving the test pin so that the test pin is in contact with the lead of the semiconductor chip, when the semiconductor chip lead is inserted into and pulled out of the socket, the scratch caused by friction between the connection terminal and the semiconductor chip lead Not only can this be solved, but it can also prevent the lead from bending.

Description

반도체칩 검사장치Semiconductor chip inspection device

제1도는 종래 반도체칩 검사장치의 주요부를 도시한 사시도.1 is a perspective view showing the main part of a conventional semiconductor chip inspection apparatus.

제2도는 본 고안에 따른 반도체칩 검사장치의 주요부를 도시한 사시도.Figure 2 is a perspective view showing the main part of the semiconductor chip inspection apparatus according to the present invention.

제3도는 본 고안에 따른 반도체칩 검사장치에 반도체칩을 올려 놓은 상태를 도시한 측면도.Figure 3 is a side view showing a state in which the semiconductor chip on the semiconductor chip inspection apparatus according to the present invention.

제4도는 본 고안에 따른 반도체칩 검사장치에 반도체칩을 올려 놓고 테스트핀이 반도체칩 리드에 접촉하여 검사하는 상태를 도시한 측면도.4 is a side view showing a state in which a test pin is placed on a semiconductor chip inspection device according to the present invention and the test pins are in contact with the semiconductor chip lead to be inspected.

제5도는 본 발명에 따른 반도체칩 홀더에 진공용 홀이 설치된 반도체칩 검사장치의 주요부를 도시한 사시도.Figure 5 is a perspective view showing the main part of the semiconductor chip inspection apparatus provided with a vacuum hole in the semiconductor chip holder according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

10 : 회로기판 20 : 소켓10: circuit board 20: socket

21 : 접속단자 30 : 반도체칩21: connection terminal 30: semiconductor chip

31 : 반도체칩 리드 40 : 반도체칩 홀더31: semiconductor chip lead 40: semiconductor chip holder

41 : 진공용 홀 42 : 파이프41: vacuum hole 42: pipe

43 : 밸브 50 : 테스트핀 홀더43: valve 50: test pin holder

51 : 테스트핀 52 : 스프링51: test pin 52: spring

53 : 엑츄에이터 54 : 슬라이드53: Actuator 54: Slide

55 : 가이드 56 : 배선55: guide 56: wiring

60 : 측정용 보드 70 : 운반용 헨드60: measuring board 70: transport hand

본 고안은 검사장치에 관한 것으로서, 특히 반도체칩을 신뢰성있게 검사할 수 있는 반도체칩 검사장치에 관한 것이다.The present invention relates to an inspection apparatus, and more particularly, to a semiconductor chip inspection apparatus capable of reliably inspecting a semiconductor chip.

제 1 도는 종래에 따른 반도체칩 검사장치의 주요부를 도시한 사시도이다. 도시된 바와 같이, 반도체칩을 검사하기 위하여 회로기판(10) 위에 검사 소켓(connecter,20)이 설치되고, 반도체칩 리드(31)가 삽입되는 소켓의 삽입부에는 접속단자(21)가 U형으로 절곡되어 설치되어 있다. 그 절곡된 접속단자(21) 사이로 반도체칩의 리드(31)를 삽입하고 상기 접속단자는 반도체칩 리드를 밀착하면서 접촉한다.1 is a perspective view showing the main part of a conventional semiconductor chip inspection apparatus. As shown in the drawing, an inspection socket 20 is installed on the circuit board 10 to inspect the semiconductor chip, and the connection terminal 21 is U-shaped at an insertion portion of the socket into which the semiconductor chip lead 31 is inserted. It is bent and installed. The lead 31 of the semiconductor chip is inserted between the bent connection terminals 21, and the connection terminal is in contact with the semiconductor chip lead.

이와 같이, 반도체칩의 리드(31)를 시험 소켓(20)의 접속단자(21)에 삽입시켜 검사하기 때문에 반도체칩 리드(31)가 소켓(20)의 접속단자(21)에 삽입 또는 빠질 때, 과도한 힘이 가해지는 경우 상기 접속단자와 반도체칩 리드의 마찰로 인해 반도체칩 리드 및 접속단자에 긁힘이 발생할 뿐만 아니라 반도체칩 리드가 휘어질 수 있다. 그리고 검사 소켓(20)을 장시간 사용할 때는 그 절곡된 접속단자(21)의 사이가 벌어여 반도체칩(30)의 리드(31)와의 접촉상태가 불량하여 검사 도중 불량제품으로 오판하여 불량제품이 아닌 양호한 제품을 불량품으로 처리하여 폐기 처분하는 문제점이 있었다.In this way, when the lead 31 of the semiconductor chip is inserted into and removed from the connection terminal 21 of the test socket 20, the semiconductor chip lead 31 is inserted into or removed from the connection terminal 21 of the socket 20. When excessive force is applied, the semiconductor chip lead and the connection terminal may be scratched as well as the semiconductor chip lead may be bent due to the friction between the connection terminal and the semiconductor chip lead. When the test socket 20 is used for a long time, the bent connection terminal 21 is opened, and the contact state with the lead 31 of the semiconductor chip 30 is poor. There was a problem in that a good product was disposed of as a defective product.

따라서, 본 고안의 목적은 상술한 문제점을 개선하여 제품에 전혀 손상을 가하지 않고 그 기능 및 성능을 시험하여 신뢰성있게 불량품을 판단할 수 있는 반도체칩 검사장치를 제공하는데 있다.Accordingly, an object of the present invention is to provide a semiconductor chip inspection apparatus which can reliably determine a defective product by testing its function and performance without damaging the product at all by improving the above problems.

상기 본 고안의 목적을 달성하기 위한 반도체칩 검사장치는 반도체칩을 검사하기 위하여 반도체칩이 놓여지는 반도체칩 홀더와, 상기 반도체칩 홀더의 주변에 좌우로 이동 가능하게 설치되는 테스트핀 홀더와, 상기 테스트핀 홀더에 설치되어 상기 반도체칩 리드에 접촉하는 테스트핀과, 상기 테스트핀이 상기 반도체칩의 리드에 접촉 및 분리되도록 상기 테스트 홀더를 이동시키는 이동수단을 구비하는 것을 특징으로 한다.The semiconductor chip inspection apparatus for achieving the object of the present invention is a semiconductor chip holder on which the semiconductor chip is placed to inspect the semiconductor chip, a test pin holder installed to be movable left and right around the semiconductor chip holder, And a test pin installed in the test pin holder and in contact with the semiconductor chip lead, and moving means for moving the test holder such that the test pin is in contact with and separated from the lead of the semiconductor chip.

이하 첨부된 도면을 참조하면서, 본 고안의 바람직한 실시예를 상세히 설명한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

제 2도는 본 고안에 따른 반도체칩 건사장치의 주요부를 도시한 사시도이다. 도시된 바와 같이, 반도체칩을 테스트하기 위하여 반도치칩(30)이 놓여지는 반도체칩 홀더(40)의 좌우에는 테스트핀 홀더(50)가 다수 정렬된다. 상기 테스트핀 홀더(50)에는 반도체칩 홀더(40)에 놓여지는 반도체칩의리드(31)에 접촉하는 테스트핀(52)이 설치된다. 그리고 상기 테스트핀 홀더(50)에는 테스트핀 홀더를 좌우로 이동시키기 위하여 액츄에이터(53)가 설치되어 있으며, 상기 테스트핀(51)이 상기 반도체 칩의 리드에 접촉하도록 테스트핀 홀더의 이동을 안내하기 위하여 상기 테스트핀 홀더의 하부에 슬라이드(54)와 이 슬라이드를 안내하는 가이드(55)가 설치되어 있다.2 is a perspective view showing the main part of the semiconductor chip drying apparatus according to the present invention. As shown, a plurality of test pin holders 50 are arranged on the left and right sides of the semiconductor chip holder 40 on which the semiconductor chip 30 is placed to test the semiconductor chip. The test pin holder 50 is provided with a test pin 52 in contact with the lead 31 of the semiconductor chip placed on the semiconductor chip holder 40. In addition, an actuator 53 is installed in the test pin holder 50 to move the test pin holder from side to side, and guides the movement of the test pin holder such that the test pin 51 contacts the lead of the semiconductor chip. To this end, a slide 54 and a guide 55 for guiding the slide are installed at the lower portion of the test pin holder.

상기 테스트핀(52)에는 테스트핀이 상기 반도체칩의 리드(31)에 접촉할 때 충준히 밀착되어 접촉될 수 있도록 스프링(51)에 의해 탄성바이어스되며, 상기 테스트핀(51)에는 이 테스트핀에 의해 반도체칩(30)을 검사할 수 있도록 배선(56)이 측정용보드(60)에 연결되어 있다.The test pin 52 is elastically biased by a spring 51 so that the test pin is in close contact with the lead 31 of the semiconductor chip, and the test pin 51 is elastically biased. The wiring 56 is connected to the measurement board 60 so that the semiconductor chip 30 can be inspected.

제 5도는 본 발명에 따른 반도체칩 홀더에 진공용 홀이 설치된 반도체칩 검사장치의 주요부를 도시한 사시도이다. 도시된 바와 같이, 상기 반도체칩(30)의 리드(31)에 테스트핀(51)이 정확하게 접촉할 수 있도록 하기 위하여, 반도체칩 운반용 핸드(70)에 의해 운반되는 반도체칩이 반도체칩 홀더(40)에 위치될 때 이 반도체칩(30)을 그 위치에 고정시키기 위하여 반도체칩 홀더(40)의 중앙에는 도시되지 않은 진공발생원으로 부터 진공을 발생시키기 위하여 호스 또는 파이프에는 진공을 발생 또는 차단 및 연결시키기 위한 밸브(43)가 설치되었다. 그리고 상기 구멍(41)은 반도체칩을 효과적으로 흡착될 수 있도록 하기 위하여 오목하게 파여진 형상을 하고 있다.5 is a perspective view showing the main part of a semiconductor chip inspection device provided with a vacuum hole in the semiconductor chip holder according to the present invention. As shown, in order to allow the test pin 51 to accurately contact the lead 31 of the semiconductor chip 30, the semiconductor chip carried by the semiconductor chip carrying hand 70 is a semiconductor chip holder 40. In order to generate a vacuum from a vacuum source not shown in the center of the semiconductor chip holder 40 in order to fix the semiconductor chip 30 in its position. Valve 43 was installed. In addition, the hole 41 has a concave shape in order to effectively adsorb the semiconductor chip.

상술한 바와 같이 구성된 본 발명의 반도체칩 검사장치는 다음과 같이 작동된다.The semiconductor chip inspection apparatus of the present invention configured as described above operates as follows.

제 3도에 도시된 바와 같이, 반도체칩 운반용 핸드(70)에 의해 운송되는 반도체칩(30)은 반도체칩 반도체칩 홀더(40)위에 놓여진다. 이어서 액추에이터(53)가 작동하여 테스트핀 홀더(50)는 가이드(55)위의 슬라이드(54)가 미끄러지면서, 테스트핀 홀더(50)에 설치된 테스트핀(51)이 상기 반도체 칩 리드(31)에 제 4도에 도시된 바와 같이 각각 접촉한다. 이때 상기 테스트핀(51)에 설치되 스프링(52)은 이 테스트핀을 반도체칩 리드에 충분하게 밀찰하여 접촉할 수 있도록 한다.As shown in FIG. 3, the semiconductor chip 30 carried by the semiconductor chip carrying hand 70 is placed on the semiconductor chip semiconductor chip holder 40. Subsequently, the actuator 53 is operated so that the test pin holder 50 slides the slide 54 on the guide 55, and the test pin 51 installed on the test pin holder 50 is connected to the semiconductor chip lead 31. In contact with each other as shown in FIG. At this time, the spring 52 is installed on the test pin 51 to allow the test pin to sufficiently contact the semiconductor chip lead.

계속해서 반도체칩의 검사가 끝나고, 상기 액츄에이터(53)가 작동하여 테스트핀 홀더(50)는 가이드와 슬라이드에 의해 후퇴하며, 테스트핀 홀더에 설치된 테스트핀(51)은 반도체칩 리드에서 분리되어 원 위치로 복귀한다. 그리고 검사가 끝난 반도체칩은 반도체칩 운반용 핸드에 의해 이송되고 다시 검사할 반도체칩이 반도체칩 홀더로 이송된다.After the inspection of the semiconductor chip is finished, the actuator 53 is operated so that the test pin holder 50 is retracted by the guide and the slide, and the test pin 51 installed on the test pin holder is separated from the semiconductor chip lead. Return to position After the inspection, the semiconductor chip is transferred by the semiconductor chip carrying hand and the semiconductor chip to be inspected again is transferred to the semiconductor chip holder.

제 5 도에 도시된 바와 같이, 반도체칩 홀더의 중앙에 진공을 발생시켜 반도체칩을 흡착하는 구멍(41)이 형성시켜 검사를 행할 때에는, 반도체칩 운반용 핸드(70)에 의해 운송되는 반도체칩(30)은 반도체칩 반도체칩 홀더(40)위에 놓여지면 상기 밸브(43)를 열어 상기 반도체칩을 흡착하여 반도체칩 홀더에 고정시키고 이어서 상기 액츄에이터(53)가 작동하여 테스트핀 홀더(50)는 가이드(55)위의 슬라이드(54)가 미끄러지면서, 테스트핀 홀더(50)에 설치된 테스트핀(51)이 상기 반도체칩 리드(31)에 제4도에 도시된 바와 같이 각각 접촉한다.As shown in FIG. 5, when a hole 41 for generating a vacuum in the center of the semiconductor chip holder to adsorb the semiconductor chip is formed and subjected to inspection, the semiconductor chip transported by the semiconductor chip carrying hand 70 ( 30 is placed on the semiconductor chip semiconductor chip holder 40, the valve 43 is opened to suck the semiconductor chip to fix it to the semiconductor chip holder, and then the actuator 53 is operated so that the test pin holder 50 is guided. As the slide 54 on the 55 slides, the test pins 51 provided on the test pin holder 50 come into contact with the semiconductor chip leads 31, respectively, as shown in FIG.

계속해서 반도체칩의 검사가 끝나고, 상기 액츄에이터(53)가 작동하여 테스트핀 홀더(50)는 가이드와 슬라이드에 의해 후퇴하며, 테스트핀 홀더에 설치된 테스트핀(51)은 반도체칩 리드(31)에서 분리되어 원 위치로 복귀한다. 그리고 상기 밸브(43)를 차단시키고 검사가 끝난 반도체칩은 반도체칩 운반용 핸드에 의해 이송되고 다시 검사할 반도체칩이 반도체칩 홀더로 이송된다.After the inspection of the semiconductor chip is finished, the actuator 53 is operated to retreat the test pin holder 50 by the guide and the slide, and the test pin 51 installed on the test pin holder is removed from the semiconductor chip lead 31. Separate and return to original position. Then, the valve 43 is shut off and the tested semiconductor chip is transferred by the semiconductor chip carrying hand, and the semiconductor chip to be inspected is transferred to the semiconductor chip holder.

상술한 바와 같이, 반도체칩의 리드를 시험 소켓에 삽입시키지 않고 검사를 행함으로써 반도체칩 리드가 소켓에 삽입되고 빠질 때 상기 접속단자와 반도체칩 리드의 마찰로 인한 긁힘이 발생하는 문제점을 해결할 수 있을 뿐만 아니라 리드가 휘어지는 것을 방지할 수 있다.As described above, by inspecting the lead of the semiconductor chip without inserting it into the test socket, the problem of scratches caused by the friction between the connection terminal and the semiconductor chip lead when the semiconductor chip lead is inserted into and pulled out of the socket can be solved. In addition, it is possible to prevent the lead from bending.

그리고 본 발명에 의한 반도체 검사장치는 테스트핀과 반도체칩 리드의 접촉불량에 의한 오판의 가능성을 배제하여 완벽한 품질검사를 행할 수 있다.In addition, the semiconductor inspection apparatus according to the present invention can perform a perfect quality inspection by excluding the possibility of misjudgment caused by a poor contact between the test pin and the semiconductor chip lead.

Claims (3)

반도체칩을 검사하기 위하여 반도체칩이 놓여지는 반도체칩 홀더; 상기 반도체칩 홀더의 주변에 좌우로 이동가능하게 설치되는 테스트핀 홀더; 상기 테스트핀 홀더에 설치되어 상기 반도체칩의 리드에 접촉되며, 그 외주면에 스프링이 설치된 테스트핀; 상기 테스트핀이 상기 반도체칩의 리드에 접촉 및 분리되도록 상기 테스트핀 홀더를 이동시키기 위해 상기 테스트핀 홀더에 설치된 액츄에이터; 상기 테스트핀이 상기 반도체칩에 접촉하도록 그 이동을 안내하기 위한 슬라이드; 및 상기 슬라이드를 안내하는 가이드;를 구비하는 것을 특징으로 하는 반도체칩 검사장치.A semiconductor chip holder on which the semiconductor chip is placed to inspect the semiconductor chip; A test pin holder movably installed from side to side around the semiconductor chip holder; A test pin installed in the test pin holder and in contact with a lead of the semiconductor chip, and having a spring installed on an outer circumferential surface thereof; An actuator installed in the test pin holder to move the test pin holder such that the test pin is in contact with and separated from the lead of the semiconductor chip; A slide for guiding the movement of the test pin to contact the semiconductor chip; And a guide for guiding the slide. 제1항에 있어서, 상기 반도체칩의 몸체에 접촉하는 상기 반도체칩 홀더의 면에 형성되며, 이 반도체칩을 흡착할 수 있도록 형성된 적어도 하나의 구멍; 상기 구멍에 연결되어 진공을 차단 및 연결하는 밸브; 및 상기 구멍에 진공을 공급하는 진공원; 을 구비하는 것을 특징으로 하는 반도체칩 검사장치.The semiconductor device of claim 1, further comprising: at least one hole formed in a surface of the semiconductor chip holder in contact with the body of the semiconductor chip, the hole configured to adsorb the semiconductor chip; A valve connected to the hole to block and connect a vacuum; And a vacuum source for supplying a vacuum to the hole. Semiconductor chip inspection apparatus comprising a. 제 2항에 있어서, 상기 구멍의 개구에 접시형 확개부가 형성되어 반도체칩을 흡착고정하는 것을 특징으로 하는 반도체칩 검사장치.3. The semiconductor chip testing device according to claim 2, wherein a dish-shaped extension is formed in the opening of the hole to fix the semiconductor chip.
KR2019940018985U 1994-07-28 1994-07-28 Test apparatus for semiconductor chip KR200145194Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019940018985U KR200145194Y1 (en) 1994-07-28 1994-07-28 Test apparatus for semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019940018985U KR200145194Y1 (en) 1994-07-28 1994-07-28 Test apparatus for semiconductor chip

Publications (2)

Publication Number Publication Date
KR960006348U KR960006348U (en) 1996-02-17
KR200145194Y1 true KR200145194Y1 (en) 1999-06-15

Family

ID=19389607

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019940018985U KR200145194Y1 (en) 1994-07-28 1994-07-28 Test apparatus for semiconductor chip

Country Status (1)

Country Link
KR (1) KR200145194Y1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100481843B1 (en) * 1998-05-11 2005-06-08 삼성전자주식회사 Protection socket for a semiconductor package
KR100499701B1 (en) * 2002-10-16 2005-07-07 주식회사 고영테크놀러지 Test apparatus of protection circuit module

Also Published As

Publication number Publication date
KR960006348U (en) 1996-02-17

Similar Documents

Publication Publication Date Title
US5627473A (en) Connector inspection device
KR20030044827A (en) Socket
JPH1152001A (en) Inspection part of connector-inspection apparatus
JP4813567B2 (en) High temperature open end type zero insertion force (ZIF) test socket
JPH0498167A (en) Ic test device
KR200145194Y1 (en) Test apparatus for semiconductor chip
US5159266A (en) Test socket and method for failure analysis of plastic quad flat pack devices
KR20180121558A (en) Substrate inspection device
KR100466483B1 (en) Socket apparatus for ic packages
US5477140A (en) Terminal inspection device and terminal inspection method
KR0142706B1 (en) Manual socket for the electrical character tester of semiconductor device
KR0177341B1 (en) Module ic holding apparatus for module ic tester
KR100384200B1 (en) Connector terminal inspection device
KR200156803Y1 (en) Road board for semiconductor package inspection
KR200276956Y1 (en) Connection device of test burn-in system
KR19980025594U (en) Contact Sockets for BLP Devices
KR20000042989A (en) Burn-in board for burn-in tester
KR960006912Y1 (en) Pcb testing apparatus for ultra frequency circuit
KR102016504B1 (en) Jig for testing circuit board
JP2000035455A (en) Current carrying inspection device
KR20040076114A (en) Probe needle for probe card
KR950006928Y1 (en) Testing device for jack insert
KR0122279Y1 (en) Tester for a semiconductor device
KR200247733Y1 (en) Socket device for probing chip
JPH03245068A (en) Inspection of terminal

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20070130

Year of fee payment: 9

LAPS Lapse due to unpaid annual fee