KR20010091279A - Programmable resister of semiconductor device - Google Patents

Abstract

PURPOSE: A programmable resistance of a semiconductor device is provided to design correctly a resistance value by providing a programmable resistance without a curved part. CONSTITUTION: An upper resistance series(RRU) is formed by arranging linear unit resistances(URU1-URU2) extended to a column direction to a row direction on a semiconductor substrate. A lower resistance series(RRD) is arranged nearly to the upper resistance series(RRU). The first resistance terminal(10) is contacted with a lower end of one unit resistance of the lower resistance series(RRD). The second resistance terminal(20) is contacted with a lower end of the other unit resistance of the lower resistance series(RRD). A lower connection part(UCD1 to UCDn-1) is used for connecting lower ends of one or more unit resistance(URD2 to URD2n-1) arranged between the first and the resistance terminals(10,20). An upper connection part(UCU1 to UCUn-1) is used for connecting upper ends of one or more unit resistance(URU1 to URU2n-2) of the upper resistance series(RRU) arranged between the first and the resistance terminals(10,20). The upper and lower unit resistance of the same column are contacted with a column intermediate connection part(MC1 to MC2n-2). The unit resistance(URD2n-1, URD2n) are connected by a row intermediate connection part(40).

Description

Programmable Resistor of Semiconductor Device {PROGRAMMABLE RESISTER OF SEMICONDUCTOR DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a programmable resistance of a semiconductor device, and more particularly to a programmable resistance capable of setting an accurate resistance value.

In general, in semiconductor devices, active circuits such as bipolar or MOS transistors and passive devices such as resistors and capacitors are integrated on a substrate to implement a desired circuit.

In general, the resistance of a semiconductor device uses a diffusion resistor, but the diffusion resistance occupies an area in proportion to the magnitude of the resistance value. Therefore, in a highly integrated semiconductor device, a resistor using a polysilicon is used in a high resistance design of several tens to several hundreds of kΩ. .

1 shows a configuration of a programmable resistor formed of conventional polysilicon. The conventional programmable resistor arranges an "n" shaped unit resistor in one direction and the lower right end of the unit resistor URn selected on the lower left side and the right side of the unit resistor UR1 selected on the left side. 2 is provided as a metal contact to form a resistance terminal (10, 20). The other unit resistors UR2 to URn-1 between the selected unit resistors are adjacent to each other and are connected to each other in a train structure by the connection parts UC1 to UCn-1 through metal contacts.

Each unit resistor has a contact portion formed in the middle thereof, and when the resistance value of the unit resistor is reduced to 1/2, the left and right branches of the unit resistor URn are connected by metal contacts in the middle by the intermediate connector MC. .

Therefore, if the resistance value of the resistor R is UR as the resistance value of each unit resistor

It is programmed as R = (n-1) UR + (1/2) UR.

However, such a conventional program resistor has a problem in that the unit resistor is formed of an “n” type structure, so that the resistance value of the bent portion 30 at the upper end of each unit resistor is reduced compared to the resistance value of the straight portion. That is, the resistance value of the curved portion 30 is reduced by about 30 to 40% compared to the straight portion.

Therefore, if the resistance value actually set is a straight line 9 and a bend 1 in 10,

R = 0.6 (1/10) (n-1) UR + (9/10) (n-1) UR + (1/2) UR.

Therefore, the circuit designer has to design in advance such a process change value of the programmable resistance value in advance, which is difficult in design and difficult to design accurate resistance value.

In this case, if the resistance value is not set correctly, the time constant value of the delay circuit is changed. Therefore, the circuit designer should fully consider the margin reflecting this and the margin width is increased to limit the high speed operation of the circuit.

SUMMARY OF THE INVENTION An object of the present invention is to provide a programmable resistance of a semiconductor device capable of designing accurate resistance values by providing a programmable resistance without a bent portion in order to solve the problems of the prior art.

1 is a diagram showing the configuration of a programmable resistor of a conventional semiconductor device.

2 is a diagram showing the configuration of a programmable resistor of a semiconductor device according to the present invention;

<Description of the symbols for the main parts of the drawings>

10: first resistance terminal 20: second resistance terminal

30: bend 40: low intermediate connection

RRU: Upper resistance row RRD: Lower resistance row

URU1 ~ URU2n: Upper unit resistor URD1 ~ URD2n: Lower unit resistor

UCU1 ~ UCUn-1: Upper connection part UCD1 ~ UCDn-1: Lower connection part

MC1 ~ MC2n-2: Intermediate column connection

In order to achieve the above object of the present invention, the apparatus of the present invention is a top unit of resistance resistors are arranged on the semiconductor substrate, the linear unit resistors extending a predetermined length in the first direction at regular intervals in the second direction, A lower resistance row arranged adjacent to the first resistance row in the first direction and extending in a predetermined length in the first direction, the lower resistance row being arranged at regular intervals in the second direction; A first resistor terminal contacting the bottom of one unit resistor, a second resistor terminal contacting the bottom of the other unit resistor disposed on the right side of one unit resistor of the lower row of resistors, and the first resistor terminal A lower connection portion which contacts the lower ends of at least one pair of unit resistor adjacent pairs disposed between the second resistor terminal and the second resistor terminal; An upper connection portion contacting an upper end of at least one pair of unit resistor adjacent pairs of the upper resistance lines disposed between the terminal and the second resistance terminal, the upper portion disposed between the first resistance terminal and the second resistance terminal; An intermediate connection portion for contacting an upper end and a lower end of at least one pair of adjacent pairs of unit resistors corresponding to the upper and lower sides of the lower resistance row or interconnecting the lower end of the adjacent pairs of the upper resistance row and the upper end of the adjacent pairs of the lower resistance row; The resistance value is programmed by combining the upper and lower resistance lines by forming metals of the first and second resistance terminals and the upper, lower and intermediate connecting portions.

Hereinafter, with reference to the accompanying drawings, it will be described in detail the present invention through an embodiment of the present invention.

2 shows a configuration of a programmable resistor of a semiconductor device according to the present invention.

The programmable resistors of FIG. 2 include the upper row of resistors RRU having linear unit resistors URU1 to URU2n extending in a column direction in a row direction at regular intervals in a row direction on the semiconductor substrate, and the unit resistors URD1 to FIG. URD2n) has a lower resistance row (RRD).

Each of the unit resistors URU1 to URU2n and URD1 to URD2n of the upper row of resistors RRU and the lower row of resistors RRR is disposed in the same column.

The upper and lower resistance strings RRU and RRD are polysilicon used to form the gate electrode of the MOS transistor, and are formed in the peripheral circuit region in the same process. Since each unit resistor is divided into upper and lower parts to form a small length, the change in line width can be minimized during the photolithography process. That is, compared to the polysilicon pattern of long length, the change by the process can be reduced by a small length.

The resistance program sets a desired resistance value by selecting a number of unit resistors corresponding to the resistance value and interconnecting the selected unit resistors in the metallization process. That is, the first resistor terminal 10 is contacted to the lower end of the selected unit resistor URD1 of the leftmost lower row of resistors RRD among the selected unit resistors, and the other selected unit resistor of the lowermost row of resistors RRD is selected. The second resistor terminal 20 is set in contact with the bottom of (URD2n).

In addition, n-1 of 2n-2 unit resistors URD2 to URD2n-1 disposed between the first and second resistor terminals 10 and 20 to interconnect upper and lower unit resistors. The lower ends of adjacent pairs are mutually contacted with lower connection parts UCD1 to UCDn-1.

In addition, n-1 of 2n-2 unit resistors URU1 to URU2n-2 of the upper resistance row RRU disposed between the first resistor terminal 10 and the second resistor terminal 20. The upper ends of the adjacent pairs are mutually contacted with the upper connections UCU1 to UCUn-1.

The upper and lower unit resistors of the same column are connected to each other by contact by the column intermediate connectors MC1 to MC2n-2. In addition, the unit resistors URD2n−1 and URD2n are interconnected in the horizontal direction by the row intermediate connector 40.

Therefore, the resistance value of the resistor R shown is as follows if the resistance value of each upper unit resistor is URU, and the resistance value of the lower unit resistor is URD.

R = (2n-2) URU + 2nURD

That is, in the present invention, since each unit resistor is formed only with a straight portion and there is no bend, the change in resistance value of each unit resistor due to process variables is minimized, thereby making it possible to set an accurate resistance value.

Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.

As described above, in the present invention, since the unit resistor is formed in a straight line without bending, the process variable can be minimized, and by dividing the length of each linear portion into a predetermined length, the resistance value change due to the line width change in the process can be achieved. Accurate resistance can be set by minimizing, facilitating circuit design and enabling tighter margins in circuit operation, thereby contributing to high speed operation.

In addition, since the process deviation of the center portion and the peripheral portion of the wafer is reduced, it is possible to maintain a uniform resistance value regardless of the position on the wafer.

Claims (3)

An upper row of resistance on the semiconductor substrate, in which linear unit resistors extending in a first length in a first direction are arranged at regular intervals in a second direction; A lower resistance row disposed on the semiconductor substrate adjacent to the first resistance row in the first direction and having linear unit resistors extending a predetermined length in the first direction at regular intervals in the second direction; A first resistor terminal contacting a lower end of any one of the unit resistors of the lower resistor row; A second resistor terminal contacting a lower end of the other unit resistor disposed on the right side of one unit resistor of the lower row of resistors; A lower connection part which contacts bottom ends of at least one pair of adjacent pairs of unit resistors disposed between the first resistor terminal and the second resistor terminal; An upper connection part contacting an upper end of at least one pair of adjacent pairs of unit resistors of the upper row of resistors disposed between the first resistor terminal and the second resistor terminal; The upper and lower ends of at least one pair of adjacent pairs of unit resistors corresponding to the upper and lower portions of the upper and lower resistance lines disposed between the first and second resistor terminals are mutually contacted, or the lower and lower ends of adjacent pairs of the upper resistor row. An intermediate connection for interconnecting the upper ends of adjacent pairs of resistive columns; Programmable resistance of the semiconductor device, characterized in that for programming the resistance value by the combination of the upper and lower resistance string by the metal forming of the first and second resistance terminal and the upper, lower and intermediate connection. The programmable resistor of claim 1, wherein the unit resistor is polysilicon. 3. The programmable resistor of claim 2, wherein the unit resistor is formed at the same time as forming the gate electrode of the MOS transistor.