KR20010082405A - Plasma dicing method and apparatus - Google Patents

Abstract

PURPOSE: A plasma dicing apparatus and a method thereof are to selectively and equally perform a dry-etching process at high speed on only a dicing line processing surface of a wafer, and also form high density plasma region at a desired portion. CONSTITUTION: A wafer is disposed at a processing chamber. The processing chamber discharges gas under reduced pressure. A gas supplying portion supplies reacting gas to the processing chamber. The first electrode(105) and second electrode are disposed in the processing chamber to be opposite to each other. High frequency power is applied to the processing chamber to form glow discharge and thus to form the etching gas into plasma. A dicing line of the wafer is etched by the plasma. The plasma is selectively generated on an entire surface area of the dicing line of the wafer. Therefore, the etching process is performed at only the dicing line of the wafer.

Description

Plasma dicing method and apparatus

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for dicing wafers, generally referred to as a dicing process or a sawing process, and is located between the wafer manufacturing process and the packaging process in the semiconductor production process, and the wafer is divided into individual chips. Separation process. A typical conventional dicing process as shown in FIGS. 1 and 2 is shown and briefly described as follows.

FIG. 1 is a perspective view of a conventional wafer, and as shown, a dicing line (street) is formed between the chips 1 of the wafer 100. As shown in FIG. 2, the wafer 100 configured as described above is fixed to the chuck while the tape 3 is attached to the lower surface of the wafer, and the dicing line 2 is formed using the cutter 4. ), And cut into individual chips (1).

Dicing method can be divided into scribing and breaking (breaking), dicing with a diamond blade, dicing with a laser, etc. In addition, high-pressure water is sprayed (water-jet Or cutting by applying thermal stress.

The most commonly used diamond blade dicing is to cut the wafer by rotating a blade with a very thin blade thickness. In this method, it is important that the blades are thin and hard to be broken.In this regard, since the Japanese disco company developed a 40 micron-thick raceoid cutting wheel in 1968, it can now process up to 15 microns. In semiconductor wafer cutting, cutting lines of 60 to 100 microns are cut with blades of 15 to 60 microns.

However, the problem of dicing is to reduce chipping, which is a cracking phenomenon that is likely to occur at the time of cutting, and to maintain a high resistance strength of the chip. In particular, the backside chipping generated on the backside of the wafer affects the resistance strength of the chip for measuring chip strength, and there is a problem in that the yield decreases in the subsequent process or increases the defective rate of the product. In the case of ultra-thin chips and 300 mm large-diameter wafers used for smart cards, the need for corresponding wafer dicing equipment is increasing. 300 mm wafers are thin and have a large wafer diameter, which makes them difficult to handle without damaging the wafer. As a semiconductor chip is highly integrated, a conventional wafer dicing method of dicing in the above-described method under the current trend of dicing of the dicing street, which is a cutting area between chips, becomes thinner and thinner, Has technical limitations. Therefore, the development of more precise dicing technology and the device which can do this is required.

The present invention was created to solve the above problems, and applies the plasma dry etching technique to solve the above problems. In order to facilitate the winry of the present invention will be described first by summarizing the technique of a conventional general industrial plasma. In general, plasma refers to an "ionized gas." This state is sometimes referred to as the "fourth state of matter," not solid, liquid, or gas. Plasma can compress to higher densities than solids and exists at low pressures, such as in the gaseous state. To make a plasma, one must ionize atoms or molecules in their natural state. To do this, you must apply high heat. In other words, a high temperature of hundreds of thousands to millions of degrees is required. However, applying a high electric field allows the atom or molecule to ionize even at low temperatures.

The present invention is in the proper use of the salp DC bias in an asymmetrical structure in generating a plasma.

As shown in FIG. 3A, the generation of the salp DC bias in an asymmetrical system of the electrode area is explained using the motion of the particles. When the high-frequency oscillation at high voltage in the RF generator 40 looks at the movement speed and movement distance between the ion and the electron.

3A simultaneously illustrates that the first electrode 30 and the second electrode 35 alternate with the change of the RF value in the case of (AA) and (AA ') with A-A' as a boundary. When the first electrode A1 30 and the second electrode A2 35 have an asymmetrical structure, for example, if the potential is continuously changed by the power value of RF of 13.56 MHz, as shown in (AA) of FIG. If one electrode A1 (30) has a negative (-) and the second electrode A2 (35) has a positive potential, the electrons in the plasma have a positive potential (+) to the second electrode A2 (35). And the electrons gathered in the second electrode 35 A2 are absorbed because the surface area of the second electrode A2 35 is much larger. At this time, due to the electrons 8 which are not canceled, a negative salp DC bias is generated in the A1 30 of the first electrode.

As shown in (AA ′) of FIG. 3A, when the first electrode A1 30 has a positive potential, electrons in the plasma are attracted to the surface A1 30 of the first electrode, but the surface of the first electrode. Since A1 30 is much smaller than the surface area of the second electrode A2 35, they are not all absorbed and remain on the surface of the first electrode A1 30 as shown in (8). When the RF high voltage high frequency power is continuously supplied, the surface of the first electrode A1 30 has a negative potential, which is a salp DC bias in an asymmetric electrode. The ions in the plasma are attracted to the surface of the first electrode A1 30 by the generated sap DC bias. Here, the sheath voltage ratio V1 / V2 according to the surface area ratio A2 / A1 of both the first electrode 30 and the second electrode 35 is represented by Equation 1. Where Ji is the ion flux, A1 and A2 are the electrode area, ε is the dielectric constant, mi is the mass of the ions, d1 and d2 are the thicknesses of the both ends of the whistle, and V1 and V2 are the voltages of the both ends.

As shown in FIG. 3B, the salp DC bias and the Vdc potential in the plasma are almost negative, so that the first electrode element 30: 105: 106: 107 has an almost constant ion bombardment effect. This ion bombardment supplies the energy required for the plasma dry etch reaction. If the workpiece to be subjected to dry etching is placed on the first electrode 30, the smaller the surface area of the first electrode 30 is, the more voltage is applied to the whistle therein, resulting in a strong dry etching effect. Koenig, LIMaissel, IBM. J. Res. Develop. 14, p. 168, 1970).

As shown in FIG. 4, when the metal wiring form of the surface of the first electrode element 30 is disposed as the metal wiring electrode 50 having the same shape as the dicing line 102 of the wafer 100 to be processed, as described above. Since the salp DC bias voltage Vdc is calculated as a ratio of (4) of (A2 / A1), a very strong salp DC bias Vdc is applied to the metal wiring electrode 50 of the first electrode element 30, so that the workpiece 100 Only in the dicing line 102 of), the accelerated ions 6 collide with high energy. This means that ion bombardment is directed to the etched atomic layer 103 on the dicing line 102 of the wafer 100 to be processed. At low pressures, there is little collision between ions in the sheath, resulting in anisotrophical etching.

In other words, physical and chemical dry etching involves ions impinging on the surface of a material to be etched by a physical method such as acceleration through an electric field, and radicals generated in the plasma are supplied to the surface of the material to be etched and etched there with reactive species. A chemical reaction occurs between atoms of a substance to produce volatile gases. The wafer to be processed is an Si silicon wafer of element 14 of the Periodic Table of the Elements, wherein the process gas is CF4 / O2, CF2Cl2, CF3Cl, SF6 / O2 / Cl2, Cl2 / H2 / C2F6 / CCl4, C2ClF5 / O2, SiF4 / O2, NF3 It is generally used to include molecules selected from the group consisting of, ClF3, CCl4, CCl3F5, C2ClF5 / SF6, C2F6 / CF3Cl, BR2, CF3Cl / BR2. For example, Si or SiO2, which occupies most of the wafer, is a dissociative ionization process in the plasma in the case of CF4 etching gas, which is widely used in etching and other semiconductor manufacturing processes.

In the plasma reaction chamber, a large amount of radicals such as F are generated in addition to the CF 4 molecules supplied in a large amount and the generated ions and electrons.

Radicals are electrically neutral as atoms or bonds of atoms, but because they have incomplete chemical bonds, they react very well with other materials. Of chemical reaction scheme 1 Absorbs electrons The radicals are changed. At this time, the generation rate of radicals is faster and the survival time is longer than the ions. Compared to ions And The majority of the radicals that do not yet have radicals Ions and electrons are contained. During plasma etching, most of the reaction chamber is filled with etching gas molecules (70-98%), and the radical is only 0.1-20%. Charged particles, including, are composed of extremely small amounts of 0.001 to 0.01%.

FIG. 5A is a schematic diagram of the principle of chemical reaction dry etching on the surface of a Si semiconductor wafer using CF4 gas in a plasma reaction chamber.

Dry etching I On Acts as the most active etchant, and the chemical equations are shown in Schemes 2 and 3.

Also, in general, the etching rate is maximum when oxygen gas (O 2) is added about 12%, so an appropriate amount of O 2 gas is added.

In conclusion, due to the etching mechanism of the Si semiconductor wafer as shown in (A) of FIG. 5B, the Si semiconductor wafer surface is covered with F and reacts with Si to change to SiF2. However, as shown in FIG. In a single line, the actual dry etching does not occur until the recombination of a flyable volatile material called SiF4 by a physical action called ion bombardment energy. As shown in FIG. 4, when the electrode 50 having the same width as the dicing line 102 of the wafer to be diced is disposed in close contact with the wafer under 1: 1, it is generated by the asymmetric structure of the electrode. The Si-Si bonding is broken on the surface of the semiconductor wafer dicing line as shown in FIG. 5B with strong ion bombardment energy by the sufficiently strong Sulf DC bias, and as in FIG. 5C. Join F where the covalent bond is broken. Eventually, plasma dry etching results in volatile molecules of SiF4, and the Si atoms are separated and continuously blown away from the surface atomic layer 103 of the dicing line 2: 102 of the wafer 100 to be diced. It is an object of the present invention to produce the same effect.

1 is a perspective view showing a conventional wafer.

2 is a cross-sectional view showing a state of cutting a conventional wafer.

Figure 3a is a diagram showing the movement of electrons and ions when applying a high frequency voltage in an asymmetric structure.

3b is a graph showing the motion of electrons and ions in an asymmetric structure.

4 shows the motion of ions in a dicing line in a plasma.

5a illustrates the reaction mechanism of radicals generated in the plasma.

5B illustrates the reaction mechanism with radicals in the wafer.

6 is a longitudinal sectional view of a processing chamber of an embodiment of the plasma processing apparatus according to the present invention;

7A is a plan view of an electrode element showing the first embodiment of the treatment apparatus according to the present invention.

FIG. 7B is a cross-sectional view along the line A-A 'in FIG. 7A;

8A is a plan view of an electrode element showing the second embodiment of the treatment apparatus according to the present invention.

8B is a cross-sectional view along the line A-A 'in FIG. 8A;

9A is a plan view of an electrode element showing the second embodiment of the treatment apparatus according to the present invention.

FIG. 9B is a cross-sectional view along the line A-A 'in FIG. 9A;

* Explanation of symbols for main parts of the drawings

10 processing chamber 11 wafer inlet and outlet

14 insulation material 30 first electrode element

40: RF power supply 44: RF power supply line

50: metal wiring 52: pad for RF power supply

According to the present invention, a plasma suitable for obtaining an effect of selectively anisotropic dry etching and dicing the dicing line 102 of the wafer to be processed deeply by the action of the first electrode element 30 which can increase the salp DC bias voltage. A dicing method and apparatus. An embodiment of the present invention will be described with reference to FIG. As shown in FIG. 6, the inlet / outlet 11 and the vacuum exhaust port 12 of the workpiece 100 to be processed are formed on the sidewall of the processing chamber 10. A negative vacuum chamber (not shown) is provided at the inlet / outlet 11 via a gate valve (not shown), for example. A well-known conveyance means (not shown) which conveys the to-be-processed wafer 100 between the secondary vacuum chamber and the reaction chamber 10 via the gate valve is provided. The exhaust port 12 is connected to a vacuum exhaust means (not shown) through an exhaust pipe (not shown). The second electrode is positioned at the center of the upper ceiling of the reaction chamber 10, and the gas supply port 13 is formed at the edge of the upper ceiling. The gas supply port 13 is connected to a gas source 16 provided with a gas cylinder via a gas flow rate control means 17 through a supply pipe 15. In the lower center of the reaction chamber 10, the first electrode element 30 forms part of the wafer support 21 through the insulating material 14, and the wafer 100 to be processed is disposed on the first electrode element 30. It is fixed. The RF high-frequency power supply 40 installed outside the processing chamber 10 is controlled by the RF high-frequency power supply controller 41 in the first electrode element 30, and sequentially passes through the matching box 42 and the condense 43. It is connected to the RF power supply pad 52 of the one electrode element 30 via the RF power supply terminal 44. The frequency of the high frequency voltage is a general industrial high frequency. For example, set it to 13.56 MHz. In the processing chamber 10, a discharge space 45 is provided between the first electrode 30 and the second electrode element 35.

<First Embodiment of First Electrode Element>

Here, the first electrode element 30 is made of a non-conductive substrate such as a ceramic or glass substrate as a flat plate 105, as shown in Figs. 7a and 7b, the die of the wafer 100 to be processed in a conventional semiconductor metal wiring manufacturing process A power supply pad 52 for disposing a metallization 50 in a shape of 1: 1 matching a street 2: 102 and supplying RF power to the edges of the metallizations 50. ) Is made of a metal wiring (53) connecting the metal wiring (50) of the dicing line form and the power supply pad (52) for power supply, and then made a circuit protection film (59) with an insulator or the like. This is used as a first electrode element using a flat plate.

Second Embodiment of First Electrode Element

As shown in FIG. 8A, an insulating layer 51 such as SiO2 is formed on the entire surface of the conventional semiconductor wafer 106, and the dicing lines 2: 102 and 1: of the wafer 100 to be processed in a conventional semiconductor device metallization manufacturing process. 1 to make a metallization (50) to match the shape of 1 and to create a power supply pad (52) for supplying RF power to the edges of the metallization (50) and the metallization (50) of the dicing line type After making the connection metal wiring 53 for connecting the power supply pad 52 for power supply is made of a circuit protection film 59 with an insulator or the like. This is used as a first electrode element using a wafer.

Third Embodiment of First Electrode Element

As shown in FIG. 9A, metallization is performed on the entire surface of the conventional photomask 107 in a shape of 1: 1 matching with the dicing street 102 of the wafer 100 to be processed by a conventional photomask manufacturing process. 50 to make a power supply pad 52 for supplying RF power to the edges of the metal wires 50 and to connect the metal wire 50 of the dicing line type and the power supply power pad 52 for power supply. After the connection metal wiring 53 is made of an insulator 59 or the like to make a circuit protective film (59). This is used as a first electrode element using a photomask.

Here, in the configuration of the first electrode means (30: 105: 106: 107) and the wafer support (21), the metal wiring 50 face down and the SF6 (sulfur hexafluoride) in the sealed space 46 A gas can be put in and the insulation between the metals can be configured well. That is, the phenomenon in which gas molecules are combined with free electrons to form anions is called electron attachment. When electron attachment occurs, recombination is vigorously performed because electrons with higher speeds are converted to anions with smaller speeds. This is because SF6 (sulfur hexafluoride) gas is suitable for insulation and extinction of plasma as an electrically negative gas.

The dicing apparatus using the plasma constructed as shown in FIG. 6 is an electrode of the metal wiring of the dicing line 102 of the processed wafer 100 and the second electrode element by means of a position control apparatus or the like (not shown). The arrangement of 50 is matched, and at the same time, the inside of the reaction chamber 10 is evacuated to a predetermined pressure by a vacuum exhaust device (not shown). The etching gas is supplied through the gas supply means 13 to the discharge space 45 formed between the first electrode element 30: 105: 106: 107 and the second electrode 35 via the gas introduction part 13. do. In this state, the high frequency power supply 40 applies the high frequency voltage 40 to the first electrode element 30 and the second electrode 35. Therefore, glow discharge occurs in the discharge space 45, and the etching gas is plasma-formed. As shown in FIG. 4, the ion-promoting chemical reaction performed by the ions present in the plasma impacting the etching target and the chemical reaction naturally occurring by the active radicals of the reactive gas perform the etching. The ion-promoting chemical reaction here is the driving force of the directional etching, and the chemical reaction gives the shape of the isotropic etching. Therefore, the greater the contribution of the ion-promoting chemical reaction, the better the etching direction is, and the shape is closer to the vertical.

As a result, in the electrode having the asymmetric structure, the value of the salp DC bias is proportional to the square of the area ratio of the electrode, so that the uniformity is uniformly distributed over the entire surface of the processing surface 103 of the dicing line 2: 102 of the wafer 100 to be processed. And exposed to a strong plasma, and as a result, dry etching occurs at a high speed and uniformly only in the dicing lines 2: 102 of the target wafer 100. In addition, the wafer 100 to be processed by which dry etching is completed is transferred from the first electrode element 30: 105: 106: 107 to a conveying means (not shown), and then the inlet and outlet 11 from the processing chamber 10 by the conveying means. And a vacuum chamber (not shown) via the gate valve. Therefore, the present invention can produce a structure having a vertical etching wall while obtaining a high selectivity. In addition, by varying the RF power value and the amount of processor gas, the distribution of plasma intensity in the dicing line 102 to be processed 103 of the wafer 100 can be controlled, and the uniformity of the etching treatment in the dicing line to be processed of the wafer 100 can be controlled. Is to control.

On the other hand, in addition to semiconductor wafers made of silicon, semiconductor wafers made of Group 3-5 compounds, for example, GaAs, GaP, GaN, InP and the like, are also mass-produced.

A semiconductor wafer made of a group 3-5 compound is also produced in a rectangular chip 1 such as 0.3 mm long and 0.5 mm wide. For this reason, semiconductor devices such as devices and circuits are actually assembled in semiconductor chips that have a dead space of about 20 mu m from the outer periphery. The wafer made of such a group 3-5 compound is disposed in the photomask 107 to the metal wiring 50 in the photomask 107 as in the third embodiment of the first electrode element, BCl3 / Ar, Cl2 / O2 Different reaction gases such as / H2, CCl2F2 / O2 / Ar / He, CCl4, CH4 / H2, C2H6 / H2 and Cl2 / Ar can be overcome by the plasma dicing method according to the present invention.

In addition to the above, other substrates such as glass substrates may be used. However, when the glass substrate is used, the glass substrate itself is etched because the main component is silicon oxide. Semiconductor devices in which thin film transistors are formed on glass substrates or other substrates may be increasingly integrated later. It is expected that the application of the present invention to the manufacture of such a semiconductor device can bring a very desirable effect.

Although the embodiment of the present invention has been described with reference to the case of a dry etching apparatus, the present invention is not limited to the etching apparatus of the above-described examples, and is, for example, a helicon vacuum type RIE, a transformer coupled plasma (TCP), and an ECR (Electron). Even in the case of other devices such as Cyclotron Resonance (DPS), Decoupled Plasma System (DPS), Magnetically Enhanced Reactive Ion Etch (MERIE), etc., there is no essential change in the effects of the present invention, and therefore it is naturally included within the scope of the present invention.

In this embodiment, the following effects can be obtained.

(1) Since the plasma is generated on the metal wiring 50 of the dicing line shape of the first electrode element 30: 105: 106: 107, only on the dicing line to be processed (2: 102) of the wafer 100 to be processed. Selective, high speed and uniform dry etching is possible.

(2) Since the first electrode elements 30: 105: 106: 107 are disposed evenly over the entire surface in a 1: 1 correspondence with the wafer dicing line 2: 102 to be processed, the surface to be processed 103 of the wafer to be processed. The high density plasma region on the can be selectively made only where necessary.

(3) Since the width of the salp DC bias voltage that determines the irradiation energy of ions can be wide, it is easy to control the RF power.

(4) Since the total dicing line area is the total area to be etched, the etching process can be performed with a very small amount of injected process gas, and the degree of vacuum can be kept stable due to the small amount of gas injected into the process chamber. A stable anisotropic etching can be achieved throughout.

(5) Since the size of the electrode element should be such that the strong plasma region covers the entire surface of the wafer dicing line to be treated as much as possible, the space required for the installation of the electrode element can be reduced, and the dry etching apparatus can be further miniaturized. Can be.

(6) Since the first electrode elements 30: 105: 106: 107 are parallel in shape, it is easy to implement the outer surface protective material and the protective film 59 of the electrode element to be implemented as necessary.

(7) The electric field density at any position from the electrode 50 in the dicing line form of the electrode element is equal to the average electric field density distribution on the metal wiring electrode 50 at any position. Therefore, the dicing line to-be-processed surface 103 of the to-be-processed wafer 100 is exposed to a more uniform plasma over the whole surface, and the uniformity of the etching of the to-be-processed surface of a wafer can be improved further.

(8) As semiconductor chips are highly integrated, dicing lines, which are cutting areas between chips, are increasingly required for fine and precise dicing techniques, but anisotropic dry etching etching is possible, so that accurate patterns can be formed.

(9) Chipping, which is an easy cracking phenomenon that may occur during cutting, which is a problem of the conventional dicing method because an ion bombardment and etching radicals anisotropic dry etch the dicing lines (2: 102) of the wafer 100 to be processed. Since chipping can be reduced and the chip's resistance strength can be kept high, the chip's resistance strength is improved.

(10) The presence or absence of the above-mentioned chipping becomes a problem of lowering the yield in the post-process and increasing the defective rate of the product. However, the above-mentioned problem is solved because dicing of the wafer is performed by dry etching.

(11) Since dry etching selectively anisotropically etches the dicing lines 2: 102 of the wafer, dicing can be performed with uniform accuracy over the entire wafer.

(12) High yield and high production because wafer dicing can be automated.

(13) It is a clean process because it is processed in a vacuum atmosphere without the problem of contamination caused by the cut dregs, which is a problem in the conventional diamond blade dicing method as in FIG. 2, and there is no problem of waste disposal and safety of the operator. Is high.

(14) Dicing of ultra-thin wafers for ultra-thin chips used in smart cards and the like can be performed more safely and accurately.

(15) Dicing 300mm wafers, which will be mainstream in the future, is more economical in terms of uniformity and productivity by maintaining the same degree of processing of the dicing line (2: 102) compared to the conventional dicing method.

Preferred embodiments of the present invention are disclosed for purposes of illustration, and those skilled in the art will be able to make various modifications, changes, substitutions and additions through the spirit and scope of the present invention as set forth in the appended claims.

Claims (15)

Means (not shown) for installing the processing chamber 10, the wafer 100 to be processed in the processing chamber, and evacuating the processing chamber 10 through the exhaust port 12 (not shown), and reacting in the processing chamber 10. A gas supply means 13 for introducing gas, a first electrode 30 provided in the processing chamber 10, and a first electrode 30 facing the second electrode 35. ), A means for applying high frequency power (40: 42: 43: 44), and a glow discharge is generated through the application of the high frequency power, and the etching gas is converted into a dicing line of the wafer 100 to be processed. In the plasma dicing apparatus for dry etching (2: 102), plasma is selectively generated over the entire surface of the dicing line (2: 102) of the wafer 100 to be processed to Plasma dicing apparatus, characterized in that dry etching occurs uniformly only in the dicing line (2: 102) . The metal wiring 50 of the first electrode element 30: 105: 106: 107 is correspondingly arranged in a plane 1: 1 under the dicing line 102 of the wafer 100 to be processed. In the first electrode element 30: 105: 106: 107, the ion generated in the plasma causes ion collision only to occur in the processing surface 103 of the dicing line (2: 102) of the wafer 100 to be processed. A first electrode element, characterized in that the metal wiring 50 is disposed. 3. The non-conductive substrate 105 and the metallization 50 having a shape 1: 1 matching the dicing lines 2: 102 of the wafer 100 to be processed on the non-conductive substrate. And a power supply pad 52 for supplying RF power to the edges of the metal wires 50, the metal wire 50, a connection metal wire 53 connecting the power pads 52, and the metal. In a first electrode element 105 made of a circuit protection film 59 made of an insulator or the like on a wiring, a first electrode, wherein a metal wiring of the first electrode element 105 is disposed on a non-conductive substrate 105. Element. 3. The semiconductor wafer (106) according to claim 2, wherein the semiconductor wafer (106), the metallization (50) on the wafer in a shape that coincides 1: 1 with the dicing lines (2: 102) of the workpiece 100, A power supply pad 52 for supplying RF power to the edges of the metal wires 50, the metal wire 50, a connection metal wire 53 connecting the power pads 52, and the gold wire wires; A first electrode element made of a circuit protection film (59) made of an insulator or the like above, wherein the metal wiring of the first electrode element is provided on the semiconductor wafer (106). The metallization 50 of claim 2, wherein the photomask 107 and the metallization 50 are formed on the photomask to coincide with the dicing line 2: 102 of the wafer 100 to be processed. And a power supply pad 52 for supplying RF power to the edges of the metal wires 50, the metal wire 50, a connection metal wire 53 connecting the power pads 52, and the metal. A first electrode element made of a circuit protection film (59) made of an insulator or the like on a wiring, wherein the metal wiring of the first electrode element is provided in the photomask (107). 2. The plasma dicing apparatus according to claim 1, wherein an oscillation frequency of 100 KHz or more is applied to a power supply pad of the first electrode element at an oscillation frequency of a high frequency voltage in the plasma dicing step. The plasma dicing apparatus according to claim 1, wherein an oscillation frequency of 13.56 MHz is applied to a power supply pad of the first electrode element at an oscillation frequency of a high frequency voltage in the plasma dicing process. 2. The workpiece wafer according to claim 1, wherein in the configuration of the first electrode means 30: 105: 106: 107 and the wafer support 21, the surface of the metal wiring 50 of the first electrode means faces upward. Plasma dicing apparatus characterized in that it is configured in close contact with the back (114) of the (100). The process of claim 1, wherein in the configuration of the first electrode means 30: 105: 106: 107 and the wafer support 21, the surface of the metal wiring 50 of the first electrode means faces downward. And a back surface (104) of the first electrode means (30) in close contact with the back surface (114) of the semiconductor wafer. 10. The method according to claim 9, wherein the structure of the first electrode means (30: 105: 106: 107) and the wafer support (21) includes the surface of the metal wiring 50 facing downward and the SF6 (into the sealed space 46). Sulfur hexafluoride) gas is added to improve insulation between the metals. Means (not shown) for installing the processing chamber 10, the wafer 100 to be processed in the processing chamber, and evacuating the processing chamber 10 through the exhaust port 12 (not shown), and reacting in the processing chamber 10. A gas supply means 13 for introducing gas, a first electrode 30 provided in the processing chamber 10, and a first electrode 30 facing the second electrode 35. ), A means for applying high frequency power (40: 42: 43: 44), and a glow discharge is generated through the application of the high frequency power, and the etching gas is converted into a dicing line of the wafer 100 to be processed. In the plasma dicing method for dry etching (2: 102), plasma is selectively generated over the entire surface of the dicing line (2: 102) of the wafer 100 to be processed to Plasma dicing method characterized in that dry etching occurs uniformly only in the dicing line (2: 102) . The plasma dicing method according to claim 11, wherein a gas containing rare gas and oxygen is added to the gas. 12. The method of claim 11, further comprising inserting a wafer into a dry etching apparatus, supplying a gas containing at least carbon and fluorine into the dry etching apparatus, and generating a plasma in the dry etching apparatus. A dicing method, wherein the gas contains fluorine for carbon, and a high frequency voltage is applied to the first electrode. 12. The method of claim 11, wherein the semiconductor wafer is Si silicon wafer of element 14 of the Periodic Table of the Elements, the gas is CF4 / O2, CF2Cl2, CF3Cl, SF6 / O2 / Cl2, Cl2 / H2 / C2F6 / CCl4, C2ClF5 / O2 And SiF4 / O2, NF3, ClF3, CCl4, CCl3F5, C2ClF5 / SF6, C2F6 / CF3Cl, BR2, CF3Cl / BR2. 12. The compound wafer of claim 11, wherein the semiconductor wafer comprises a compound semiconductor wafer of Group 3-5 of the Periodic Table of the Elements, wherein the gas comprises molecules selected from the group consisting of BCl3 / Ar, Cl2 / O2 / H2, and CCL2F2 / O2 / Ar / He. Plasma dicing method characterized in that.