KR20010064514A - Polishing plate for fabricating semiconductor - Google Patents
Polishing plate for fabricating semiconductor Download PDFInfo
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- KR20010064514A KR20010064514A KR1019990064721A KR19990064721A KR20010064514A KR 20010064514 A KR20010064514 A KR 20010064514A KR 1019990064721 A KR1019990064721 A KR 1019990064721A KR 19990064721 A KR19990064721 A KR 19990064721A KR 20010064514 A KR20010064514 A KR 20010064514A
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- South Korea
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- abrasive
- polishing
- grooves
- plate
- grinding
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/11—Lapping tools
- B24B37/12—Lapping plates for working plane surfaces
- B24B37/16—Lapping plates for working plane surfaces characterised by the shape of the lapping plate surface, e.g. grooved
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- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
Abstract
Description
본 발명은 반도체 제조에 사용되는 연마판에 대한 것으로써, 더욱 상세하게는 웨이퍼의 평탄화 공정 및 웨이퍼 후면 연마공정에서 웨이퍼가 연마되는 연마면에 연마제가 균일하게 분포되도록 한 반도체 제조용 연마판이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing plate used in semiconductor manufacturing, and more particularly, to a polishing plate for semiconductor manufacture in which an abrasive is uniformly distributed on a polishing surface on which a wafer is polished in a wafer flattening process and a wafer backside polishing process.
일반적으로 웨이퍼 상에 증착 및 식각 등의 공정을 진행시키는 과정에서 웨이퍼에 형성된 중간절연층 또는 증착막 등의 박막을 주변과의 단차를 줄이기 위해 평탄화 공정 또는 웨이퍼 후면 공정을 진행하게 된다.In general, during the process of depositing and etching on the wafer, the planarization process or the wafer backside process is performed to reduce the step difference between the thin film such as the intermediate insulating layer or the deposition film formed on the wafer.
이러한 공정에는 반도체 제조용 연마판이 사용되며, 제 1 도를 참조하면 종래의 반도체 제조용 연마판(10)은 웨이퍼가 연마되는 연마면(12)에 사각 격자 형태의 홈(11)이 형성되며, 연마면(12)의 중심위치에 형성된 연마제 공급공(미도시)을 통해 연마 및 마찰열 억제에 사용되는 미세한 산화 실리콘(SiO₂) 파티클(particle) 등의 재질로 이루어진 연마제가 공급된다.In this process, an abrasive plate for manufacturing a semiconductor is used. Referring to FIG. 1, in the conventional abrasive plate for manufacturing a semiconductor, a groove 11 having a square lattice shape is formed on an abrasive surface 12 on which a wafer is polished. An abrasive made of a material such as fine silicon oxide (SiO 2) particles used for polishing and suppressing frictional heat is supplied through an abrasive supply hole (not shown) formed at the center position of (12).
이러한 구성으로 이루어진 반도체 제조용 연마판(10)에 의한 연마과정은 제 2 도를 참조하면, 연마판(10)을 회전축(30)으로 회전시키고, 연마면(12)으로 연마제가 공급된다.Referring to FIG. 2, the polishing process by the polishing plate 10 for manufacturing a semiconductor having such a configuration is performed by rotating the polishing plate 10 on the rotation shaft 30 and supplying an abrasive to the polishing surface 12.
연마면(12)에 공급된 연마제는 연마판(10)의 회전에 의해 원심력을 받아 사각 격자 형태로 형성된 홈(11)으로 흘러 가장자리로 흘러나가면서 웨이퍼(20)의 평탄화 또는 후면 연마 등의 공정이 진행된다.Abrasives supplied to the polishing surface 12 are subjected to centrifugal force by the rotation of the polishing plate 10 to flow into the grooves 11 formed in the shape of a square lattice, and flow out to the edges to planarize or polish the back surface of the wafer 20. This is going on.
그러나, 이러한 종래의 반도체 제조용 연마판은 홈으로 흐르는 연마제의 분포가 불균일한 문제점이 있다.However, such a conventional polishing plate for semiconductor manufacturing has a problem in that the distribution of the abrasive flowing into the grooves is nonuniform.
즉, 홈이 격자 형태로 형성됨으로써 공급된 연마제는 연마판이 정지된 상태에서는 균일하게 분포되지만, 연마판이 회전하는 상태에서는 원심력을 받아 홈에 균일하게 분포되기 전에 연마면 가장자리로 흘러나가게 되어 홈과 홈 사이에 균일하게 분포되지 못한다.In other words, the grooves are formed in the form of lattice, and the abrasive supplied is uniformly distributed in the state where the abrasive plate is stopped, but in the state where the abrasive plate is rotated, it flows to the edge of the polishing surface before it is uniformly distributed in the groove under centrifugal force. Not evenly distributed between
또한, 원심력에 의해 급속하게 연마판 중심에서 가장자리로 빠져나가므로 연마제의 소모가 많게 된다.In addition, the abrasive is rapidly exited from the center of the polishing plate to the edge by the centrifugal force, thus increasing the consumption of the abrasive.
따라서, 이러한 불균일하게 분포되는 연마제는 연마과정에서 마찰열을 국부적으로발생시켜 웨이퍼 소자불량을 발생시키며, 웨이퍼의 평탄화 공정 및 웨이퍼 후면 연삭 불량을 초래하게 된다.Accordingly, such non-uniformly distributed abrasives locally generate frictional heat during polishing, resulting in wafer device defects, and inferior wafer flattening processes and wafer backside grinding failures.
이에 본 발명은 상기 종래의 문제점을 해결하고자, 연마제를 연마면에 균일하게 분포시켜 연마과정의 불량 발생을 억제하며, 연마제의 소모량을 감소시킨 반도체 제조용 연마판을 제공하는데 있다.Accordingly, the present invention is to provide a polishing plate for semiconductor manufacturing to reduce the consumption of the abrasive, suppressing the occurrence of defects in the polishing process by uniformly distributed abrasive on the polishing surface to solve the above problems.
따라서, 본 발명인 반도체 제조용 연마판은 상기의 목적을 달성하고자, 웨이퍼를 연마하기 위한 반도체 제조용 연마판에 있어서, 웨이퍼의 연마면에 중심에서 가장자리 방향으로 방사형태의 홈을 형성하고, 연마면에 동심원 형태의 홈을 다수개 추가로 더 형성한다.Accordingly, in order to achieve the above object, the abrasive plate for semiconductor manufacture according to the present invention, in the abrasive plate for semiconductor manufacture for polishing a wafer, forms radial grooves in a center-to-edge direction on the polished surface of the wafer, and concentric circles on the polished surface. Further form a plurality of further grooves.
또한, 방사 형태의 홈은 연마판의 회전방향과 동일한 방향으로 만곡되게 형성한다.In addition, the radial groove is formed to be curved in the same direction as the rotation direction of the abrasive plate.
제 1 도는 종래의 반도체 제조용 연마판에 대한 평면도.1 is a plan view of a conventional polishing plate for manufacturing semiconductors.
제 2 도는 종래의 반도체 제조용 연마판을 이용한 연마공정을 설명하기 위한 도면.2 is a view for explaining a polishing process using a conventional polishing plate for semiconductor manufacturing.
제 3 도는 본 발명에 따른 반도체 제조용 연마판에 대한 평면도.3 is a plan view of an abrasive plate for manufacturing a semiconductor according to the present invention.
■도면의 주요부분에 대한 간략한 부호설명 ■■ Brief description of the main parts of the drawings ■
10,100 : 연마판 11,101 : 홈10,100: abrasive plate 11,101: groove
12,102 : 연마면 20 : 웨이퍼12,102: polished surface 20: wafer
30 : 회전축30: axis of rotation
이하, 첨부된 도면을 참조하여 본 발명에 따른 반도체 제조용 연마판에 대한 바람직한 일실시예를 상세하게 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the abrasive plate for manufacturing a semiconductor according to the present invention.
제 3 도는 본 발명에 따른 반도체 제조용 연마판의 평면도로써, 본 발명에 따른 반도체 제조용 연마판(100)은 웨이퍼와 접촉되어 평탄화 또는 후면 연마하는 연마면(102)에 방사형태의 홈(101a)을 형성한다.3 is a plan view of an abrasive plate for manufacturing a semiconductor according to the present invention, wherein the abrasive plate 100 for manufacturing a semiconductor according to the present invention has radial grooves 101a formed on the polishing surface 102 which is in contact with a wafer to planarize or polish the back surface. Form.
여기서, 방사형태의 홈(101a)은 미도시된 연마제 공급라인으로 연마제가 공급되는 연마면(102)의 중심에서 가장자리 방향으로 사이 간격이 확대되게 형성하며, 연마판의 회전방향과 동일한 방향으로 만곡지게 형성한다.Here, the radial groove 101a is formed such that the interval between the centers of the polishing surfaces 102 to which the abrasives are supplied to the abrasive supply line is enlarged in the edge direction, and curved in the same direction as the rotation direction of the abrasive plate. To form.
또한, 연마면(102)의 중심에서 가장자리 방향으로 확대된 동심원 형태의 홈(101b)을 다수개 더 형성하여 방사 및 만곡된 형태의 홈(101a)에 교차되게 한다.In addition, a plurality of concentric grooves 101b extending in the edge direction from the center of the polishing surface 102 are further formed to intersect the grooves 101a of the radial and curved shapes.
이와 같은 방사 및 만곡된 형태의 홈(101a) 및 동심원 형태의 홈(101b)이 형성된 본 발명에 따른 반도체 제조용 연마판(100)은 연마제가 연마면(102)에 효율적으로 분포하게 된다.In the polishing plate 100 for manufacturing a semiconductor according to the present invention in which the grooves 101a of the radial and curved shapes and the grooves 101b of the concentric circles are formed, the abrasives are efficiently distributed on the polishing surface 102.
즉, 연마면(102)에 방사 및 연마판(100)의 회전방향과 동일한 방향으로 만곡된 형태의 홈(101a)이 형성되므로 연마제가 원심력에 의해 중심에서 가장자리 방향으로 흐르면서 홈(101a)에 고루 분포하게 된다.That is, since the grooves 101a are formed on the polishing surface 102 in the same direction as the rotational direction of the spinning and polishing plate 100, the abrasive flows from the center to the edge direction by centrifugal force and is evenly applied to the grooves 101a. Will be distributed.
그리고, 연마면(102)에 동심원 형태의 홈(101b)이 형성되므로 홈(101a)을 흐르는 연마제가 분기되어 홈(101b)에 흐르게 되어 연마면(102) 전체에 균일하게 연마제가 분포된다.In addition, since the groove 101b having a concentric shape is formed on the polishing surface 102, the abrasive flowing through the groove 101a branches and flows into the groove 101b, so that the abrasive is uniformly distributed throughout the polishing surface 102.
또한, 동심원 형태의 홈(101b)으로 방사 및 만곡 형태의 홈(101a)에서 연마제가 분기되어 흐르므로, 연마제가 원심력에 의해 연마면(102) 가장자리로 급속하게 흐르는 것이 방지된다.Further, since the abrasive is branched from the radial and curved grooves 101a into the concentric groove 101b, the abrasive is prevented from flowing rapidly to the edge of the polishing surface 102 by centrifugal force.
따라서, 연마면(102)전체에 연마제가 분포가 균일하게 되며, 연마제의 소모가 줄어들게 된다.Therefore, the distribution of the abrasive is uniform throughout the polishing surface 102, and the consumption of the abrasive is reduced.
상기에서 상술한 바와 같이, 본 발명에 따른 반도체 제조용 연마판은 연마면에 형성된 홈에 의해 연마제가 균일한 분포되므로 웨이퍼 연마시 국부적인 마찰열에 발생을 억제하며, 평탄화 공정 및 후면 연마 공정의 불량 발생이 억제된다.As described above, in the polishing plate for semiconductor manufacturing according to the present invention, since the abrasive is uniformly distributed by the grooves formed in the polishing surface, it suppresses the occurrence of local frictional heat during polishing of the wafer, and causes the defect of the planarization process and the back polishing process. This is suppressed.
또한, 본 발명에 따른 반도체 제조용 연마판은 연마면 외부로 흘러나가는 연마제의 량이 감소되므로 반도체 소자 생산의 원가를 절감시키게 된다.In addition, the abrasive plate for manufacturing a semiconductor according to the present invention reduces the amount of abrasive flowing out of the polishing surface, thereby reducing the cost of semiconductor device production.
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KR1019990064721A KR100575857B1 (en) | 1999-12-29 | 1999-12-29 | Polishing plate for fabricating semiconductor |
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KR1019990064721A KR100575857B1 (en) | 1999-12-29 | 1999-12-29 | Polishing plate for fabricating semiconductor |
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KR100575857B1 KR100575857B1 (en) | 2006-05-03 |
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KR20180096121A (en) * | 2017-02-20 | 2018-08-29 | 한국전기연구원 | Method for thinning a semiconductor wafer |
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US5650039A (en) * | 1994-03-02 | 1997-07-22 | Applied Materials, Inc. | Chemical mechanical polishing apparatus with improved slurry distribution |
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KR20180096121A (en) * | 2017-02-20 | 2018-08-29 | 한국전기연구원 | Method for thinning a semiconductor wafer |
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