KR20010061372A - Apparatus for data transmitting and receiving between host system and microcontroller of local system using memory - Google Patents

Abstract

PURPOSE: An apparatus for transmitting and receiving data is provided to reduce the development cost by using an existing memory element equipped in a local system to a communication with a host system, and to transmit/receive data between microcomputers inside of the host system and the local system by using a memory capable of adding and removing transmission information. CONSTITUTION: A host system(100) and a local system are connected through a PCI(Peripheral Component Interconnect) bus. The host system(100) includes a microcomputer(101), host memories(101,102). The local system(120) is composed of a microcomputer(121), a local memory(122) connected to the microcomputer(121) through a local bus and a plurality of registers(123) which support an interface with the host system(100).

Description

Device for transmitting and receiving data between the host system using a memory and a microcontroller in the local system {APPARATUS FOR DATA TRANSMITTING AND RECEIVING BETWEEN HOST SYSTEM AND MICROCONTROLLER OF LOCAL SYSTEM USING MEMORY}

The present invention relates to a mutual communication between a host system such as a computer and a microcontroller provided in a local system in the form of a card connected through a Peripheral Component Interconnect (PCI) bus or the like, and in particular, a host system using a memory inside the local system. And a device for transmitting or receiving data.

In general, intercommunication between the host system and the microcontroller of the local system uses first-in-first-out (First In First Out, FIFO) direction in the receive (Rx) / transmit (Tx) direction, for special data and instructions. It is in the form of a message that encompasses information.

For communication between the local system and the host system, conventionally, two FIFOs in the Rx / Tx direction transmit or receive data in a buffering operation, or register the data in the local system to read or write access the data. Or received.

This conventional intercommunication technique will be described in more detail.

First, when the FIFO is provided in the local system or between the local system and the host system to communicate with each other between the host system and the local system, the FIFO serves as a buffer to compensate for the time difference between the data Rx / Tx. For example, the host system is so slow that it can't read the local system's data for a while. At this time, the data is buffered in the FIFO to prevent data loss. The size of the FIFO is arbitrarily determined to such an extent that no data loss occurs. As such, when the FIFO is used, a simple structure and a stable system can be constructed, while an expensive device such as a FIFO is additionally used to increase the development cost of the entire system.

Next, without using a separate FIFO externally, the information to be communicated in the local system is determined in advance, and a register is configured, and when the communication between the host system and the local system is made through the configured internal register, Including a register in the chip increases the development cost by increasing the chip area, and there is a problem that information may be lost due to insufficient buffering effect when one type of information needs to be transmitted continuously. In addition, when the addition and deletion of information to be transmitted in the development process is impossible, there is a problem that the chip must be redesigned.

The present invention has been made to solve the above problems, by using the existing memory device provided in the local system for mutual communication with the host system to lower the development cost, and the addition and deletion of transmission information in software It is an object of the present invention to provide an apparatus for transmitting and receiving data between a microcontroller inside a local system and a memory using a memory.

1 is a block diagram of an apparatus for transmitting and receiving data between a host controller and a microcontroller within a local system according to an embodiment of the present invention.

* Description of the main parts of the drawing

100: host system 101: MPU

102: host memory 120: local system

121: MCU 122: local memory

123: multiple registers

In order to achieve the above object, the present invention provides a data transmission and reception device between a host system and a microcontroller in a local system having a local memory, wherein a part of the local memory is used when the data is transmitted and received. And first to sixth registers for use as a device and for controlling an address of the first-in, first-out memory device of the host system.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

In general, a local system includes basic local memory for communication with a host system, and reads and writes local memory through a memory controller.

The present invention utilizes this basic local memory provided in the local system, allocates a portion of the local memory for communication with the host system, and implements a FIFO-like structure through additional logic.

1 is a block diagram of an apparatus for transmitting and receiving data between a host controller and a microcontroller inside a local system according to an embodiment of the present invention.

As shown in the figure, the host system 100 and the local system 120 are connected via a PCI bus, and the host system 100 has a microprocessor (MPU) 101 and host memories 101 and 102 therein. The local system 120 includes a microcontroller (MCU) 121, a local memory 122 connected to the MCU through a local bus, and a portion of the local memory 122 to realize a FIFO structure. To this end, it consists of a plurality of registers 123 to support the interface with the host system 100. At this time, some space of the local memory 122 is allocated to operate as a FIFO for communication with the host system 100.

Since the internal components of the host system and the local system illustrated in FIG. 1 are well known in the art, a plurality of registers 123 related to the FIFO implementation using local memory for communication between the host system and the local system are disclosed herein. ) To be limited.

First, the BaseRx register is a register that stores an initial address of a memory space for mapping a FIFO in the Rx direction (data transfer from the local system to the host system) to the local memory 122. The MCU 121 initializes the local system. The value is determined by and can be changed by the host system 100.

The Ini_addr_rx register is a register that stores the FIFO address on the local memory 122 to which the host system 100 should initially access in the Rx direction, and the host system 100 reads data from the local system 120. Read the Ini_addr_rx register before generating to generate the Rx address.

Next, the BaseTx register is a register that stores the initial address of the memory space for mapping the FIFO in the Tx direction (data transfer from the host system to the local system) to the local memory 122, and performs the same function as the BaseRx register. do. When the local system is initialized, the default value is set by the MCU 121 but may be changed by the host system 100.

The Ini_addr_tx register is a register that stores the FIFO address on the local memory 122 where the host system 100 should store data for the first time in the Tx direction, and the host system 100 stores the data in the local system 120. Read the Ini_addr_tx register and generate an Rx address before reading it.

Next, the Fifo_full_rx register is a register indicating that data is contained in the FIFO on the local memory 122 in the Rx direction. The Fifo_full_rx register reads the register every predetermined time to see whether there is data to be read in the host system 100.

Finally, the Fifo_empty_tx register is a register indicating that memory is available to receive data from the host system 100 in the Tx direction. When the value of the register is “high,” the host system 100 may register the local system 120. Send the data. At this time, the host system 100 checks the FIFO state by reading the register value at regular intervals.

For reference, in the description of the registers, the FIFO address is a virtual address for the FIFO on the local memory 122. When a 1K word is defined as one FIFO unit, a 10-bit address is required. . That is, the lower 10 bits of the 32-bit address bits of the local system 120 are used to allocate the FIFO on the local memory 122.

Meanwhile, the MCU 121 of the local system 120 further includes two registers, ie, Addr_rx and Addr_tx registers (not shown), which additionally designate addresses for data transmission. Here, the Addr_rx register is a register in which the MCU 121 stores one more address than the FIFO address in which the previous data is filled for data transmission in the Rx direction, that is, the first address of the newly storeable space. After transmitting the data to the host system 100 in the new address value is changed. The Addr_tx register is a register that stores the initial address of the data when the MCU 121 reads the data transmitted from the host system 100. The address value is newly changed after the MCU 121 reads all the data. .

Referring to the operation of the present invention configured as described above, as follows.

First, in order to transmit data in the Rx direction, the MCU 121 of the local system 120 generates an address by the Addr_rx register, stores the data in a FIFO on the local memory 122, and then adds the address of the Addr_rx register to the Ini_addr_rx register. Copy the file, add the data length to the address stored in the Addr_rx register, and set the Fifo_full_rx register to "high" to indicate that data is contained in the FIFO. The host system 100 reads the value of the set Fifo_full_rx register to check the state of the FIFO, reads the Ini_addr_rx register to generate the initial address to be accessed, reads the data stored at the generated initial address, and reads the length of the read data. Therefore, a new address is generated. At this time, the Fifo_full_rx register is automatically changed to "low" after reading all the data.

Next, to transmit data in the Tx direction, check that the Fifo_empty_tx register is set, generate an address, and read the Ini_addr_tx register to generate an initial address to be accessed. At this time, an address for storing data to be transmitted next is determined in response to the length of the first data. The last data is transmitted from the host system 100, the MCU 121 detects it, copies the value of the Ini_addr_tx register into the Addr_tx register, stores the value of the Ini_addr_tx register plus the data length, and stores the Fifo_empty_tx register. Change to "low".

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention made as described above is a conventional technique using an external FIFO or an internal register by performing a data transmission and reception operation in the same manner as the conventional FIFO method by using a basic local memory required internally in communication with the host system. Compared to the prior art using an internal register, it is possible to add and delete transmission information in software compared to the prior art using an internal register.

Claims (10)

A data transmission and reception device between a host system and a microcontroller inside a local system having a local memory, Data transfer and reception comprising a portion of the local memory as a first-in, first-out memory device for transmitting and receiving the data, and including first to sixth registers for controlling an address of the first-in, first-out memory device of the host system. Device. The method of claim 1, wherein the first register, And an initial address of a memory space for mapping the first-in, first-out device to the local memory during data transmission from the local system to the host system. The method of claim 2, wherein the value of the first register, And a device determined by the microcontroller upon initialization of the local system and changeable by the host system. The method of claim 1, wherein the second register, And storing the address of the first-in, first-out device to which the host system first accesses when transmitting data from the local system to the host system. The method of claim 1, wherein the third register, And an initial address of a memory space for mapping the first-in, first-out device to the local memory during data transmission from the host system to the local system. The method of claim 5, wherein the value of the third register, And a device determined by the microcontroller upon initialization of the local system and changeable by the host system. The method of claim 1, wherein the fourth register, And storing the address of the first-in, first-out device to which the host system should first store data when transmitting data from the host system to the local system. The method of claim 1, wherein the fifth register, And transmitting information informing that the first-in, first-out device contains data when transmitting data from the local system to the host system. The method of claim 1, wherein the sixth register, And storing information indicating that the first-in, first-out device capable of receiving data from the host system is secured when data is transmitted from the host system to the local system. The method of claim 1, wherein the microcontroller, A seventh register for storing a first address of the first-in, first-out device, which can be stored, increased by one than the address of the first-in, first-out device in which previous data is filled when transferring data from the local system to the host system; And An eighth register that stores an initial address when reading data transmitted from the host system Data transmission and reception device comprising a.