KR20010061058A - Method for manufacturing image sensor - Google Patents

Method for manufacturing image sensor Download PDF

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KR20010061058A
KR20010061058A KR1019990063539A KR19990063539A KR20010061058A KR 20010061058 A KR20010061058 A KR 20010061058A KR 1019990063539 A KR1019990063539 A KR 1019990063539A KR 19990063539 A KR19990063539 A KR 19990063539A KR 20010061058 A KR20010061058 A KR 20010061058A
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image sensor
photodiode
insulating layer
layer
manufacturing
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KR1019990063539A
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Korean (ko)
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KR100683390B1 (en
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박기남
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박종섭
주식회사 하이닉스반도체
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14685Process for coatings or optical elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1462Coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14625Optical elements or arrangements associated with the device

Abstract

PURPOSE: A method for manufacturing an image sensor is provided to improve quantum efficiency and sensitivity, by additionally depositing a dielectric layer of a low absorption rate between a photodiode and an initial interlayer dielectric to improve illuminance of incident light. CONSTITUTION: A photodiode region and a peripheral device are formed on a substrate(41). The first insulating layer in which an index of refraction, Nx is a square root of N0N and a thickness, Tx is (2n-1)lambda/4Nx(n=0,1,2,3,...), is formed on the photodiode region. The first insulating layer is eliminated to be left only on the photodiode region. The second insulating layer is formed on the resultant structure.

Description

이미지센서의 제조 방법{METHOD FOR MANUFACTURING IMAGE SENSOR}Manufacturing Method of Image Sensor {METHOD FOR MANUFACTURING IMAGE SENSOR}

본 발명은 이미지센서에 관한 것으로, 특히 입사광의 조도(Illuminance)를 향상시킨 CMOS 이미지센서(Image sensor)에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image sensor, and more particularly, to a CMOS image sensor which improves illuminance of incident light.

일반적으로 이미지센서에는 CCD(Charged Coupled Device) 이미지센서와 CMOS 이미지센서를 이용하는데, 통상의 CCD 이미지센서는 외부의 피사체이미지를 촬상한 빛을 흡수하여 광전하를 모으고 축적하는 광전변환 및 전하축적부, 상기 광전변환 및 전하축적부에서 발생된 전하를 운송하기 위한 전하운송부 및 상기 전하운송부로부터 운송된 광전하를 전기적신호로 출력하는 신호변환부로 구성된다.In general, a CCD (Charged Coupled Device) image sensor and a CMOS image sensor are used. A conventional CCD image sensor absorbs light captured by an external subject image and collects and accumulates photocharges. And a charge transport unit for transporting charges generated by the photoelectric conversion and charge accumulation unit, and a signal converter for outputting the photocharges transported from the charge transport unit as an electric signal.

여기서 광전변환 및 전하축적부는 주로 포토다이오드(Photodiode;PD)를 사용하는데, 포토다이오드(PD)는 PN접합을 이용하여 포텐셜웰(Pontential well)을 형성시키고 빛(Light)에 의해 발생된 전하를 포텐셜웰에 축적해 두는 소자이다. 그리고 전하축적부에서 발생된 전하는 포토다이오드(PD)의 포텐셜웰에 갇혀있는데, 이 포텐셜웰을 움직임으로써 필요한 곳으로 전하를 운송할 수 있다. 또한 신호변환부는 운송된 전하로부터 전압을 발생시킨다. 한편, 신호검출이 끝나면 다음 차례를 기다리는 전하를 위하여 현재 포텐셜웰의 전하는 배출할 필요가 있는데, 이를 위하여 신호변환부의 포텐셜웰의 장벽을 제거하여 전하를 배출하는데 이를 리셋(Reset)이라고 한다.The photoelectric conversion and charge storage unit mainly uses a photodiode (PD). The photodiode (PD) forms a potential well by using a PN junction and potential of the charge generated by light. It is an element that accumulates in a well. The charge generated in the charge accumulator is trapped in the potential well of the photodiode (PD). By moving the potential well, the charge can be transported to the required place. The signal converter also generates a voltage from the transferred charges. On the other hand, after the signal detection is finished, it is necessary to discharge the charge of the current potential well for the charge waiting for the next turn, for this purpose, the charge is removed by removing the barrier of the potential well of the signal conversion unit, which is called a reset.

이처럼 CCD 이미지센서는 CMOS 이미지센서와 달리 트랜지스터에 의한 스위칭방식이 아니라 전하결합에 의해서 신호를 검출한다. 그리고, 단위화소(Unit pixel)에 해당하고 광감지역할을 하는 포토다이오드(PD)는 광전류를 즉시 추출하지 않고일정시간 누적시킨 다음 추출하므로 신호전압을 누적시간만큼 증가시킬 수 있어 광감도(Sensitivity)가 좋고, 노이즈(Noise)를 감소시킬 수 있는 장점이 있는 반면, 광전하를 계속 운송해야 하므로 구동방식이 복잡하고, 약 8∼10V의 고전압 및 1W이상의 고전력이 소모된다.As such, unlike the CMOS image sensor, the CCD image sensor detects signals by charge coupling rather than switching by a transistor. In addition, the photodiode (PD), which corresponds to a unit pixel and performs a photosensitive region, accumulates for a predetermined time instead of immediately extracting a photocurrent, and thus extracts the signal voltage so that the signal voltage can be increased by the accumulated time. While good, there is an advantage that can reduce noise, the driving method is complicated because the photoelectric charge must be transported continuously, high voltage of about 8-10V and high power of more than 1W is consumed.

반면 CMOS 이미지센서는 CCD 이미지센서에 비하여 전기광학적 특성에서 열세를 보이고 있으나, 저소비전력과 집적도 측면에서는 CMOS 이미지센서가 CCD 이미지센서보다 우수하다.On the other hand, CMOS image sensors are inferior in electro-optical characteristics to CCD image sensors, but CMOS image sensors are superior to CCD image sensors in terms of low power consumption and integration.

이러한 전기광학적 특성 중 외부양자효율(External Quantum Efficiency) 및 광감도(Sensitivity) 특성은 이미지센서의 품질(Quality)을 좌우하는 특성으로서, 특히 단위 시간당 포획할 수 있는 이미지프레임(Image frame) 및 이미지품질(Image quality)등을 결정하는 매우 중요한 특성이다.Among these electro-optic characteristics, external quantum efficiency and sensitivity are characteristics that determine the quality of the image sensor, and in particular, image frame and image quality that can be captured per unit time ( Image quality) is very important characteristic.

도 1은 통상의 CMOS 이미지센서의 단위화소를 나타낸 등가회로도로서, 1개의 포토다이오드(PD)와 4개의 NMOS트랜지스터(Tx,Rx,Sx,Dx)로 구성되며, 상기 4개의 NMOS트랜지스터(Tx,Rx,Sx,Dx)는 포토다이오드(PD)에서 집속된 광전하를 플로팅노드 (Floating node; X)로 운송하기 위한 트랜스퍼트랜지스터(Tx), 원하는 값으로 노드의 전위를 세팅하고 전하를 배출하여 플로팅노드를 리셋(Reset)시키기 위한 리셋트랜지스터(Rx), 소오스팔로워 버퍼증폭기(Source Follower Buffer Amplifier) 역할을 하는 드라이브트랜지스터(Dx), 스위칭(Switching)역할로 어드레싱(Addressing)을 할 수 있도록 하는 셀렉트트랜지스터(Sx)로 구성된다.FIG. 1 is an equivalent circuit diagram illustrating a unit pixel of a conventional CMOS image sensor, and includes one photodiode PD and four NMOS transistors Tx, Rx, Sx, and Dx, and the four NMOS transistors Tx, Rx, Sx, and Dx are transfer transistors (Tx) for transporting the concentrated photocharges from the photodiode (PD) to the floating node (X) .The potentials of the nodes are set to the desired values and the charges are discharged. Reset transistor (Rx) to reset the node, drive transistor (Dx) that acts as a source follower buffer amplifier (Dx), and a select transistor that allows addressing as a switching role. (Sx).

도 2 는 종래기술에 따른 CMOS 이미지센서의 단위화소 제조 방법을 개략적으로 나타낸 도면이다.2 is a view schematically showing a unit pixel manufacturing method of a CMOS image sensor according to the prior art.

도 2 에 도시된 바와 같이, 종래기술의 CMOS 이미지센서의 단위화소는, P형 반도체기판(11)에 국부적으로 P형 웰(12)을 형성한 다음, 단위화소간의 분리를 위한 필드절연막(13)을 형성한다. 이어 상기 P형 반도체기판(11) 내부에 P-N접합층 (17a,17b)을 형성하여 포토다이오드(PD)를 이루고, 상기 반도체기판(11)에 상기 포토다이오드(PD)로부터 생성된 전하를 전달받아 저장하는 플로팅접합층(18a)을 형성한다.As shown in FIG. 2, a unit pixel of a conventional CMOS image sensor includes a P well 12 formed locally on a P type semiconductor substrate 11 and then a field insulating film 13 for separation between unit pixels. ). Subsequently, PN junction layers 17a and 17b are formed inside the P-type semiconductor substrate 11 to form a photodiode PD, and the charge generated from the photodiode PD is transferred to the semiconductor substrate 11. A floating bonding layer 18a for storing is formed.

이어 상기 포토다이오드(PD)로부터 플로팅접합층(18a)으로 상기 광전하를 전달하기 위한 트랜스퍼트랜지스터(Tx)의 게이트전극을 형성하며, 상기 플로팅접합층 (18a)을 리셋시키기 위한 리셋트랜지스터(Rx)의 게이트전극을 형성한다. 이어 상기 플로팅접합층(18a)에 전기적으로 접속된 게이트전극을 갖는 드라이브트랜지스터 (Dx)와 어드레싱을 위한 신호를 자신의 게이트전극으로 인가받는 셀렉트트랜지스터 (Sx)를 형성한다. 이 때, 상기 리셋트랜지스터(Rx)와 드라이브트랜지스터(Dx)는 공통접합층(18b)을 가지며, 상기 공통접합층(18b)은 상기 반도체기판(11)과 P형 웰(12)의 경계에 형성된다. 이어 상기 필드절연막(13)의 일측에 셀렉트트랜지스터 (Sx)의 게이트전극을 형성하며, 상기 드라이브트랜지스터(Dx)와 셀렉트트랜지스터 (Sx)는 LDD(Lightly Doped Drain)구조의 불순물접합층(19)이 형성된다. 여기서 게이트전극은 게이트산화막(14), 폴리실리콘(15)과 텅스텐실리사이드(16)로 이루어지며, 게이트전극의 측벽에는 측벽스페이서(20)가 형성된다.Subsequently, a gate electrode of a transfer transistor Tx for transferring the photocharges from the photodiode PD to the floating junction layer 18a is formed, and a reset transistor Rx for resetting the floating junction layer 18a. To form a gate electrode. Subsequently, a drive transistor Dx having a gate electrode electrically connected to the floating junction layer 18a and a select transistor Sx for receiving a signal for addressing as its gate electrode are formed. At this time, the reset transistor Rx and the drive transistor Dx have a common junction layer 18b, and the common junction layer 18b is formed at the boundary between the semiconductor substrate 11 and the P-type well 12. do. Next, a gate electrode of the select transistor Sx is formed on one side of the field insulating layer 13, and the impurity junction layer 19 of the lightly doped drain (LDD) structure is formed in the drive transistor Dx and the select transistor Sx. Is formed. The gate electrode is formed of a gate oxide film 14, polysilicon 15 and tungsten silicide 16, and sidewall spacers 20 are formed on the sidewalls of the gate electrode.

그리고 상기 4개의 트랜지스터(Tx,Rx,Dx,Sx) 상부에 광투과를 위한 제1층간절연막(21,22)과 제2층간절연막(23,24,25)을 형성하고, 상기 제1,2층간절연막들 (21,22,23,24,25)을 선택적으로 식각하여 상기 트랜지스터들(Tx,Rx,Dx,Sx)을 외부소자와 연결하기 위해 티타늄/알루미늄/티타늄나이트라이드(26,27,28)의 적층막으로 이루어진 제1,2금속배선을 형성한다. 또한 상기 제2금속배선 상부에 습기 또는 스크래치(Scratch)로부터 소자를 보호하기 위해 산화막(29) 및 질화막(30)으로 이루어진 소자보호막을 형성하며, 상기 소자보호막 상부에 컬러이미지 구현을 위해서 상기의 단위화소 배열위에 적색, 초록색 및 청색 또는 황색, 자홍색, 청록색으로 구성된 컬러필터(31)의 배열(Color Filter Array; CFA) 공정을 진행한다. 이어 상기 컬러필터(31)의 배열 상부에 평탄층(32)을 형성한 다음, 상기 평탄층(32) 상부에 컬러필터(31) 배열에 대향하는 마이크로렌즈(33)를 형성한다.First interlayer insulating films 21 and 22 and second interlayer insulating films 23, 24 and 25 for light transmission are formed on the four transistors Tx, Rx, Dx and Sx. Titanium / aluminum / titanium nitrides (26, 27, < RTI ID = 0.0 > 26) < / RTI > The first and second metal wirings formed of the laminated film of 28) are formed. In addition, a device protection film including an oxide film 29 and a nitride film 30 is formed on the second metal wiring to protect the device from moisture or scratches, and the unit is formed on the device protection film to realize a color image. A color filter array (CFA) process of a color filter 31 composed of red, green, blue, yellow, magenta, and cyan is performed on the pixel array. Subsequently, the flat layer 32 is formed on the array of the color filters 31, and then the microlens 33 is formed on the flat layer 32 to face the array of the color filters 31.

이와 같은 공정이 모두 완료된 후 광감지영역인 포토다이오드 상부에는 광투과를 위한 제1,2층간절연막(21,22,23,24,25), 소자보호막(29,30), 컬러필터(31) 및 마이크로렌즈(33)만이 위치하게 된다.After all of the above processes are completed, the first and second interlayer insulating films 21, 22, 23, 24, and 25 for light transmission, the device protection layers 29 and 30, and the color filter 31 are disposed on the photodiode, which is a light sensing region. And only the microlens 33 is positioned.

상술한 바와 같이, 종래기술에서는 외부양자효율 및 광감도의 특성을 향상시키기 위해 단위화소마다 마이크로렌즈(33)를 형성하여 입사광을 집속시키고 있으나, 마이크로렌즈(33)로 집속된 입사광은 마이크로렌즈(33)의 중심부와 주변부의 입사각도가 달라지므로 같은 수의 광량(Photon flux)이 집속되었다 하더라도 단위화소의 중심부와 주변부로 입사되는 광자(Photon)의 조도는 달라지게 된다.As described above, in the related art, in order to improve external quantum efficiency and light sensitivity, the microlens 33 is formed for each unit pixel to focus incident light, but the incident light focused on the microlens 33 is a microlens 33. Since the incident angles of the center and the periphery of the) are different, even if the same number of photon fluxes are focused, the illuminance of the photons incident on the center and the periphery of the unit pixel is changed.

즉 단위화소의 중심(θ=θc=0)으로 입사되는 광자의 조도를 ic라 하면, 단위화소의 주변으로 입사각도 θ=θE로 입사되는 광자의 조도 iE는 ic×cos4θ에 비례하므로 cos4θ만큼 감소하게 된다. 따라서 단위화소로 입사되는 광자의 입사각도를 줄여주어야만 한다.That is, if the illuminance of photons incident to the center of the unit pixel (θ = θ c = 0) is i c , the illuminance i E of photons incident at the incident angle θ = θ E around the unit pixel is i c × cos 4 Since it is proportional to θ, it is reduced by cos 4 θ. Therefore, the angle of incidence of photons incident on the unit pixel must be reduced.

이러한 이미지센서의 특성을 향상시키기 위해 반도체기판(11)은 동일한 가시광선영역에서 4.72∼3.48의 굴절율(NS)을 가지며, 단위화소의 포토다이오드(PD)를 형성한 후 포토다이오드(PD) 표면에 최초로 증착되는 절연층(PMD)(21,22)은 통상적으로 가시광선영역대(450~635nm)에서 1.48∼1.46의 굴절율(NO)을 갖는다. 그리고 마이크로렌즈(33)는 폭이 7.5㎛, 높이가 2.6㎛로 형성된다.In order to improve the characteristics of the image sensor, the semiconductor substrate 11 has a refractive index (N S ) of 4.72 to 3.48 in the same visible light region, and after forming the photodiode PD of a unit pixel, the surface of the photodiode PD The insulating layers (PMDs) 21 and 22 deposited for the first time typically have a refractive index (N 0 ) of 1.48 to 1.46 in the visible region (450 to 635 nm). The microlens 33 is 7.5 mu m wide and 2.6 mu m high.

이와 같은 조건의 단위화소로 입사되는 입사광의 최초 입사각은 0(degree)이지만, 마이크로렌즈(33)에 부딪히는 순간 입사광의 입사각은 공기에서 마이크로렌즈로(33)의 매질차와 마이크로렌즈(33)의 곡률에 의하여 변하게 된다. 즉, 최초 공기중에서 입사각이 0(degree)인 입사광이 마이크로렌즈(33)의 중심부로 입사될 때의 입사각은 0(degree)이 되고 마이크로렌즈(33)의 가장자리 부분으로 입사될 때의 입사각은 33.5(degree)가 된다. 이렇게 단위화소의 포토다이오드(PD) 부분으로 입사광이 전파되어 입사되며, 최종 포토다이오드(PD)로 입사되는 입사광의 입사각도가 포토다이오드(PD)에로의 입사광 조도를 결정하게 된다.The initial angle of incidence of incident light incident on the unit pixel under such a condition is 0 (degree), but the incident angle of incident light at the moment of hitting the microlens 33 is determined by the medium difference of air from the air to the microlens 33 and of the microlens 33. It is changed by curvature. That is, when the incident light having an incident angle of 0 (degree) in the first air enters the center of the microlens 33, the incident angle becomes 0 (degree) and the incident angle when the incident light enters the edge of the microlens 33 is 33.5. (degree) In this way, incident light propagates through the photodiode PD of the unit pixel, and the incident angle of the incident light incident on the final photodiode PD determines the incident light intensity of the photodiode PD.

따라서, 이미지센서에서 포토다이오드(PD)로 최종 입사되는 입사각도는 37 (degree)가 된다. 그러므로 단위화소의 포토다이오드(PD)가 받아들일 수 있는 중심대비 주변의 상대 조도량은 cos4(37)=0.488 이 된다. 다시말하면, 포토다이오드(PD) 중심에서의 조도가 100%이면 마이크로렌즈(33)의 가장자리에서 입사된 입사광이 포토다이오드(PD)로 입사될 때의 조도는 48,8% 로, 포토다이오드(PD)의 주변부에서는 약 51.2%의 광량이 손실되는 문제점이 있다.Therefore, the incident angle of the incident incident from the image sensor to the photodiode PD becomes 37 (degree). Therefore, the relative illuminance around the center that can be accepted by the photodiode (PD) of the unit pixel is cos 4 (37) = 0.488. In other words, when the illuminance at the center of the photodiode PD is 100%, the illuminance when the incident light incident at the edge of the microlens 33 is incident on the photodiode PD is 48,8%, and the photodiode PD At the periphery of), the amount of light of about 51.2% is lost.

본 발명은 상기의 문제점을 해결하기 위해 안출한 것으로서, 포토다이오드와 최초 층간절연막 사이에 흡수율이 낮은 유전층을 추가로 증착하므로써 입사광의 조도를 향상시켜 양자효율 및 광감도를 개선하는데 적합한 이미지센서의 제조 방법을 제공함에 그 목적이 있다.The present invention has been made to solve the above problems, a method of manufacturing an image sensor suitable for improving the quantum efficiency and light sensitivity by improving the intensity of incident light by further depositing a dielectric layer having a low absorption rate between the photodiode and the first interlayer insulating film. The purpose is to provide.

도 1 은 일반적인 CMOS 이미지센서의 단위화소를 나타낸 등가회로도,1 is an equivalent circuit diagram illustrating a unit pixel of a general CMOS image sensor;

도 2 는 종래기술의 이미지센서의 단위화소 제조 방법을 나타낸 제조 공정 단면도,2 is a cross-sectional view of a manufacturing process showing a method of manufacturing a unit pixel of an image sensor of the related art;

도 3a 내지 도 3f 는 본 발명의 실시예에 따른 이미지센서의 단위화소 제조 방법을 나타낸 제조 공정 단면도,3A to 3F are cross-sectional views illustrating a manufacturing method of a unit pixel manufacturing method of an image sensor according to an exemplary embodiment of the present invention;

*도면의 주요 부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *

41 : 반도체 기판 47 : 포토다이오드41 semiconductor substrate 47 photodiode

51 : 버퍼유전층 53 : PMD51: buffer dielectric layer 53: PMD

57 : 제1금속배선 60 : 층간절연막57: first metal wiring 60: interlayer insulating film

63 : 소자보호막 64 : 컬러필터63 element protection film 64 color filter

66 : 마이크로렌즈66: microlens

상기의 목적을 달성하기 위한 본 발명의 일실시예에 따른 이미지센서 제조 방법은 기판에 포토다이오드영역 및 주변소자를 형성하는 제 1 단계, 상기 포토다이오드영역 상부에 굴절율이고 두께인 제1절연층을 형성하는 제 2 단계, 상기 포토다이오드영역의 상부에만 남도록 상기 제1절연층을 제거하는 제 3 단계, 상기 결과물 상에 제2절연층을 형성하는 제 4 단계를 포함하여 이루어짐을 특징으로 한다.According to an aspect of the present invention, there is provided a method of manufacturing an image sensor, the method including forming a photodiode region and a peripheral device on a substrate, and having a refractive index on the photodiode region. And thickness And a third step of forming a first insulating layer, a third step of removing the first insulating layer so that only the upper portion of the photodiode region remains, and a fourth step of forming a second insulating layer on the resultant product. It is characterized by.

이하, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명의기술적 사상을 용이하게 실시할 수 있을 정도로 상세히 설명하기 위하여, 본 발명의 가장 바람직한 실시예를 첨부 도면을 참조하여 설명하기로 한다.Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention. .

첨부도면 도 3a 내지 도 3f는 본 발명의 실시예에 따른 이미지센서의 단위화소 제조 방법을 나타낸 공정단면로서, 본 발명의 이미지센서의 단위화소는 통상의 단위화소와 동일한 구조를 갖는다.3A through 3F are cross-sectional views illustrating a method of manufacturing a unit pixel of an image sensor according to an exemplary embodiment of the present invention, wherein the unit pixel of the image sensor of the present invention has the same structure as a conventional unit pixel.

도 3a에 도시된 바와 같이, 실리콘기판(41)에 웰 형성을 위한 마스크공정을 실시하고 보론이온을 주입한 다음, 열공정을 실시하여 측면확산(Lateral diffusion)에 의한 P형 웰(42)을 형성한다. 여기서 상기 P형 웰(42)은 셀렉트트랜지스터(Sx)와 드라이브트랜지스터(Dx)가 형성되는 영역이다.As shown in FIG. 3A, the silicon substrate 41 is subjected to a mask process for forming a well, implanted boron ions, and then thermally processed to form a P-type well 42 by Lateral diffusion. Form. The P type well 42 is a region in which the select transistor Sx and the drive transistor Dx are formed.

이어 단위화소간의 분리막 필드절연막(43)을 형성한 후 게이트산화막(44)을 형성하고 상기 게이트산화막(44) 상부에 단위화소 내 트랜지스터들의 게이트전극을 형성하기 위해 폴리실리콘(45)과 텅스텐실리사이드막(46)을 연속적으로 형성하고 마스크 및 식각 공정을 통해 다수의 게이트전극을 형성한다. 여기서 상기 다수의 게이트전극들은 각각 트랜스퍼트랜지스터(Tx), 리셋트랜지스터(Rx), 드라이브트랜지스터(Dx), 셀렉트트랜지스터(Sx)의 게이트전극으로 이용된다.Subsequently, after forming the separator field insulating layer 43 between the unit pixels, the gate oxide layer 44 is formed and the polysilicon 45 and the tungsten silicide layer are formed on the gate oxide layer 44 to form gate electrodes of the transistors in the unit pixel. 46 is formed continuously, and a plurality of gate electrodes are formed through a mask and an etching process. The plurality of gate electrodes are used as gate electrodes of a transfer transistor (Tx), a reset transistor (Rx), a drive transistor (Dx), and a select transistor (Sx), respectively.

이어 상기 결과물 상부에 포토다이오드(PD)를 형성하기 위한 마스크 공정을 실시하고 N-도핑영역과 P0도핑영역을 형성하기 위한 N-이온주입과 P0이온주입을 트랜스퍼트랜지스터(Tx)의 게이트전극 일측면에서 자기정렬하도록 실시한다. 이 때 상기 P형 기판(41), N-도핑영역(47a) 및 P0도핑영역(47b)은 PNP구조의 포토다이오드(47)를 형성한다.Subsequently, a mask process for forming a photodiode (PD) is performed on the resultant, and N - ion implantation and P 0 ion implantation for forming an N - doped region and a P 0 doped region are performed through the gate electrode of the transfer transistor (Tx). Self-alignment is performed on one side. In this case, the P-type substrate 41, the N doped region 47a and the P 0 doped region 47b form a photodiode 47 having a PNP structure.

이어 드라이브트랜지스터(Dx)와 셀렉트트랜지스터(Sx)의 N형 LDD(Lightly Doped Drain)이온주입을 위한 마스크패턴을 형성하고 보론이온을 주입하여 LDD영역 (49a)을 형성한다.Subsequently, a mask pattern for implanting N-type LDD (Lightly Doped Drain) ions of the drive transistor Dx and the select transistor Sx is formed, and boron ions are implanted to form the LDD region 49a.

이어 트랜지스터들의 소오스/드레인 영역을 형성하기 위해 저압화학적기상증착법(Low Pressure Chemical Vapor Deposition; LPCVD)을 이용하여 저압산화막(LP-Oxide)을 증착하고 전면식각하여 게이트전극의 측벽에 접하는 산화막스페이서(50)를 형성한 후, 고농도 N형 불순물 이온을 위한 마스크패턴을 형성하여 N형 불순물 이온주입을 실시하여 불순물접합층들(49b)을 형성한다.In order to form source / drain regions of the transistors, an oxide spacer (LP-Oxide) is deposited using low pressure chemical vapor deposition (LPCVD) and etched to form an entire surface, and then etched to a sidewall of the gate electrode. ), And then a mask pattern for high concentration N-type impurity ions is formed to perform N-type impurity ion implantation to form impurity junction layers 49b.

도 3b에 도시된 바와 같이, 상기 결과물 상부 특히 포토다이오드(PD)의 상부에 버퍼유전층(51)을 형성한다.As shown in FIG. 3B, a buffer dielectric layer 51 is formed on the resultant product, particularly on the photodiode PD.

이 때 버퍼유전층(51)은 가시광선영역인 450∼635nm 범위에 대하여 2.25∼2.65의 굴절율을 갖는 유전층, 425∼2113Å의 두께를 갖는 유전층 또는 가시광의 흡수가 없는 물질 예를 들면, 실리콘이 다수 함유된 산화막(Silicon-rich Oxide), 옥시나이트라이드(Oxynitride) 또는 실리콘나이트라이드(Silicon nitride)를 포함하는 유전층 중 하나를 이용한다. 상기의 버퍼유전층(51)은 상기 포토다이오드(PD)로 입사되는 입사광의 조도를 증가시킨다.At this time, the buffer dielectric layer 51 contains a dielectric layer having a refractive index of 2.25 to 2.65 in the visible light region of 450 to 635 nm, a dielectric layer having a thickness of 425 to 2113 s, or a material having no absorption of visible light, for example, silicon. One of a dielectric layer including a silicon-rich oxide, an oxynitride, or a silicon nitride. The buffer dielectric layer 51 increases the illuminance of incident light incident on the photodiode PD.

이어 상기 버퍼유전층(51) 상부에 감광막을 도포하고 노광 및 현상으로 패터닝한 다음, 상기 패터닝된 감광막을 마스크로 하여 상기 포토다이오드영역을 제외한 부분의 버퍼유전층(51)을 습식 또는 건식식각한다.Subsequently, a photosensitive film is coated on the buffer dielectric layer 51 and patterned by exposure and development. Then, the buffer dielectric layer 51 except the photodiode region is wet or dry-etched using the patterned photosensitive film as a mask.

도 3c에 도시된 바와 같이, 상기 결과물 상부에 저압화학적기상증착법 (LPCVD)으로 제1TEOS(TetraEthylOrthoSilicate)막(52a)을 증착한 후, 상기 제1TEOS막(52a) 상에 상압화학적기상증착법(Atmospheric Pressure CVD; APCVD)을 이용하여 BPSG막(52b)을 증착한다. 이어 열처리를 실시하여 상기 BPSG막(52b)을 리플로우시킨다. 여기서 상기 제1TEOS막(52a) 및 BPSG막(52b)을 PMD(Premetal Dielectric Layer)(53)라 한다.As shown in FIG. 3C, after depositing a first TEOS (TetraEthylOrthoSilicate) film 52a by low pressure chemical vapor deposition (LPCVD) on the resultant, an atmospheric pressure chemical vapor deposition (Atmospheric Pressure) method is applied on the first TEOS film 52a. The BPSG film 52b is deposited using CVD; APCVD. Then, heat treatment is performed to reflow the BPSG film 52b. Here, the first TEOS film 52a and the BPSG film 52b are referred to as a PMD (Premetal Dielectric Layer) 53.

이어 상기 PMD(53) 상에 마스크공정을 거쳐 완충산화막식각용액(BOE)을 이용하여 등방성식각을 하고 플라즈마식각공정을 이용한 비등방성식각을 진행하여 상기 접합층들(49b)의 표면에 콘택홀을 형성한다. 이어 상기 콘택홀을 포함한 전면에 티타늄/알루미늄/티타늄나이트라이드(Ti/Al/TiN)(54,55,56)를 순서대로 증착한다음 마스크공정과 식각공정을 하여 제1금속배선(57)을 형성한다.Subsequently, an isotropic etching is performed on the PMD 53 using a buffered oxide film etching solution (BOE) through a mask process, and anisotropic etching is performed using a plasma etching process to form contact holes on the surfaces of the bonding layers 49b. Form. Subsequently, titanium / aluminum / titanium nitride (Ti / Al / TiN) (54, 55, 56) is deposited on the entire surface including the contact hole, and then the first metal wiring 57 is formed by performing a mask process and an etching process. Form.

도 3d에 도시된 바와 같이, 상기 제1금속배선 상부에 플라즈마화학적기상증착법(Plasma Enhanced CVD; PECVD)을 이용하여 제2TEOS산화막(58)을 증착한 다음, SOG(Spin On Glass)산화막(59)을 두 번 도포하여 형성하고 열처리 및 플라즈마를 이용한 전면식각으로 평탄화한다. 이어 상기 평탄화된 SOG산화막(59) 상부에 플라즈마화학적기상증착(PECVD)법을 이용하여 층간절연막(60)을 증착한다.As shown in FIG. 3D, a second TEOS oxide layer 58 is deposited on the first metal interconnection using plasma enhanced CVD (PECVD), followed by a spin on glass (SOG) oxide layer 59. Is formed by coating twice and planarized by heat treatment and full surface etching using plasma. Subsequently, an interlayer insulating layer 60 is deposited on the planarized SOG oxide layer 59 by using plasma chemical vapor deposition (PECVD).

도 3e에 도시된 바와 같이, 마스크공정을 거쳐 상기 층간절연막(60)을 완충산화막식각용액(BOE)으로 등방성식각하고 플라즈마를 이용한 비등방성식각을 진행하여 제2금속배선을 위한 콘택홀을 형성한다. 이어 상기 콘택홀을 포함한 결과물 상부에 티타늄/알루미늄/티타늄나이트라이드(54a,55a,56a)를 순서대로 증착한 다음, 마스크공정과 식각공정을 하여 제2금속배선(61)을 형성한다. 이어 상기 제2금속배선(61) 상부에 플라즈마화학적기상증착법(PECVD)을 이용하여 소자보호막(63)으로서 산화막(62a)및 질화막(62b)을 증착한다.As shown in FIG. 3E, the interlayer insulating layer 60 is isotropically etched with a buffered oxide etching solution (BOE) through a mask process, and anisotropic etching using plasma is performed to form a contact hole for the second metal wiring. . Subsequently, titanium / aluminum / titanium nitrides 54a, 55a, and 56a are deposited on the resultant including the contact hole in order, and then a second metal wiring 61 is formed by performing a mask process and an etching process. Next, an oxide layer 62a and a nitride layer 62b are deposited on the second metal interconnection 61 as a device protection layer 63 by using plasma chemical vapor deposition (PECVD).

도 3f에 도시된 바와 같이, 패드오픈(Pad open)을 위해 상기 질화막(62b) 및 산화막(62a)을 선택적으로 제거하여 상기 제2금속배선(61)의 소정 표면을 노출시킨다. 이어 상기 패드오픈지역과 단위화소 상부에 컬러물질(Dyed photoresistor;이하 컬러감광막)을 도포하고 현상공정으로 컬러필터(64)를 형성한다. 이어 상기 컬러필터(64) 상부에 마이크로렌즈의 균일한 형성을 위하여 마이크로렌즈평탄층(65)을 형성한 후 상기 마이크로렌즈평탄층(65) 상부에 마이크로렌즈(66)를 형성한다.As shown in FIG. 3F, the nitride layer 62b and the oxide layer 62a are selectively removed to expose a predetermined surface of the second metal wiring 61 for pad open. Then, a color material (Dyed photoresistor) (hereinafter referred to as a color photosensitive film) is coated on the pad open area and the unit pixel, and the color filter 64 is formed by a developing process. Subsequently, the microlens flattening layer 65 is formed to uniformly form the microlens on the color filter 64, and then the microlens 66 is formed on the microlens flattening layer 65.

이와 같이 본 발명에서는 PMD 형성 전 포토다이오드(PD) 상부에 2.25∼2.65의 굴절율을 가지며 425∼2113Å의 두께를 갖는 유전층을 형성하여 포토다이오드로 입사되는 입사광의 조도를 증가시킬 수 있다. 즉 입사광의 조도는 유전층의 굴절율과 두께에 의존한다.As described above, in the present invention, a dielectric layer having a refractive index of 2.25 to 2.65 and a thickness of 425 to 2113 에 can be formed on the photodiode PD before forming the PMD to increase the illuminance of incident light incident on the photodiode. That is, the illuminance of incident light depends on the refractive index and the thickness of the dielectric layer.

상기 유전층 굴절율(Nx)은,The dielectric layer refractive index (Nx),

이고, 또한 상기 유전층의 두께(Tx)는,In addition, the thickness (Tx) of the dielectric layer,

이다. 이 때 상기 NO는 후속공정에서 형성되는 PMD의 굴절율(=1.48∼1.46)이고, NS는 기판(41)의 굴절율(=4.72∼3.48)이다.to be. In this case, N 0 is the refractive index (= 1.48 to 1.46) of the PMD formed in a subsequent step, and N S is the refractive index (= 4.72 to 3.48) of the substrate 41.

이와 같이 흡수율이 낮은 버퍼유전층을 추가로 증착하면 입사광의 가시광선영역대에서 포토다이오드의 중심부 대비 주변부의 상대 조도량을 약 50% 향상시킬 수 있다. 예를 들면 λ=635nm, Nx=2.261, Tx=700Å 조건으로 증착된 버퍼유전층은 중심 대비 주변의 상대 조도량이 71.9%로 입사광의 조도를 현저히 향상시킬 수 있다.In this way, the deposition of the low-absorption buffer dielectric layer may improve the relative illuminance of the peripheral portion relative to the center of the photodiode in the visible ray region of the incident light by about 50%. For example, the buffer dielectric layer deposited under the conditions of λ = 635 nm, Nx = 2.261, and Tx = 700 Å can significantly improve the illuminance of incident light with a relative illuminance of 71.9% relative to the center.

본 발명의 기술 사상은 상기 바람직한 실시예에 따라 구체적으로 기술되었으나, 상기한 실시예는 그 설명을 위한 것이며 그 제한을 위한 것이 아님을 주의하여야 한다. 또한, 본 발명의 기술 분야의 통상의 전문가라면 본 발명의 기술 사상의 범위 내에서 다양한 실시예가 가능함을 이해할 수 있을 것이다.Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

상술한 본 발명은 통상의 CMOS 및 CCD 이미지센서의 제조공정을 적용하고 포토다이오드 상부에 버퍼유전층을 형성하여 입사광에 대한 포토다이오드의 중심부 대비 주변부의 상대 조도량을 증가시키므로써 이미지센서의 양자효율 및 광감도를 향상시킬 수 있는 효과가 있다.The present invention described above applies a conventional CMOS and CCD image sensor manufacturing process and forms a buffer dielectric layer on top of the photodiode to increase the relative illuminance of the periphery of the photodiode with respect to incident light, thereby increasing the quantum efficiency of the image sensor. There is an effect that can improve the light sensitivity.

Claims (7)

이미지센서 제조 방법에 있어서,In the image sensor manufacturing method, 기판에 포토다이오드영역 및 주변소자를 형성하는 제 1 단계;Forming a photodiode region and a peripheral device on the substrate; 상기 포토다이오드영역 상부에 굴절율이고 두께인 제1절연층을 형성하는 제 2 단계;Refractive index on the photodiode region And thickness A second step of forming a first insulating layer; 상기 포토다이오드영역의 상부에만 남도록 상기 제1절연층을 제거하는 제 3 단계; 및A third step of removing the first insulating layer so that only the upper portion of the photodiode region remains; And 상기 결과물 상에 제2절연층을 형성하는 제 4 단계A fourth step of forming a second insulating layer on the resultant product 를 포함하여 이루어짐을 특징으로 하는 이미지센서 제조 방법.Image sensor manufacturing method characterized in that it comprises a. 제 1 항에 있어서,The method of claim 1, 상기 제 4 단계 후,After the fourth step, 상기 결과물 상부에 금속배선 및 소자보호막을 형성하는 제 5 단계를 포함하여 이루어지며,And a fifth step of forming a metal wiring and a device protection film on the resultant, 상기 결과물 상부에 컬러필터와 마이크로렌즈를 형성하는 제 6 단계를 더 포함하여 이루어짐을 특징으로 하는 이미지센서 제조 방법.And a sixth step of forming a color filter and a microlens on the resultant. 제 1 항에 있어서,The method of claim 1, 상기 제 2 단계에서,In the second step, 상기 제1절연층은 425∼2113Å의 두께인 것을 특징으로 하는 이미지센서 제조 방법.And the first insulating layer has a thickness of 425-2113Å. 제 1 항에 있어서,The method of claim 1, 상기 제 2 단계에서,In the second step, 상기 제1절연층은 2.25∼2.65의 굴절율인 것을 특징으로 하는 이미지센서 제조 방법.And the first insulating layer has a refractive index of 2.25 to 2.65. 제 1 항에 있어서,The method of claim 1, 상기 제 2 단계에서,In the second step, 상기 제1절연층으로 무반사층을 이용함을 특징으로 하는 이미지센서 제조 방법.The method of claim 1, wherein the anti-reflective layer is used as the first insulating layer. 제 1 항에 있어서,The method of claim 1, 상기 제 2 단계에서,In the second step, 상기 NO는 상기 제2절연층의 굴절율이고, 상기 NS는 상기 기판의 굴절율인 것을 특징으로 하는 이미지센서 제조 방법.The N 0 is the refractive index of the second insulating layer, the N S is a refractive index of the substrate, the manufacturing method of the image sensor. 제 1 항에 있어서,The method of claim 1, 상기 제 2 단계에서,In the second step, 상기 제1절연층은 실리콘이 다량 함유된 산화막, 옥시나이트라이드 또는 실리콘나이트라이드 중 어느 하나를 이용함을 특징으로 하는 이미지센서 제조 방법.The first insulating layer is a method of manufacturing an image sensor, characterized in that using any one of a silicon-containing oxide film, oxynitride or silicon nitride.
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