JPH11238866A - Solid-state image sensing device - Google Patents
Solid-state image sensing deviceInfo
- Publication number
- JPH11238866A JPH11238866A JP10038584A JP3858498A JPH11238866A JP H11238866 A JPH11238866 A JP H11238866A JP 10038584 A JP10038584 A JP 10038584A JP 3858498 A JP3858498 A JP 3858498A JP H11238866 A JPH11238866 A JP H11238866A
- Authority
- JP
- Japan
- Prior art keywords
- film
- region
- silicon oxide
- oxide film
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 54
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 54
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 239000011229 interlayer Substances 0.000 claims abstract description 13
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 45
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 45
- 238000003384 imaging method Methods 0.000 claims description 22
- 230000001681 protective effect Effects 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 9
- 229910052710 silicon Inorganic materials 0.000 abstract description 9
- 239000010703 silicon Substances 0.000 abstract description 9
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract description 8
- 229910052698 phosphorus Inorganic materials 0.000 abstract description 8
- 239000011574 phosphorus Substances 0.000 abstract description 8
- 230000035945 sensitivity Effects 0.000 abstract description 8
- 229910052796 boron Inorganic materials 0.000 abstract description 7
- 230000003647 oxidation Effects 0.000 abstract description 7
- 238000007254 oxidation reaction Methods 0.000 abstract description 7
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 abstract description 6
- 230000015572 biosynthetic process Effects 0.000 abstract description 5
- 239000010410 layer Substances 0.000 abstract description 5
- 238000000034 method Methods 0.000 abstract description 5
- 230000000694 effects Effects 0.000 abstract description 3
- 150000004767 nitrides Chemical class 0.000 abstract description 2
- 238000005468 ion implantation Methods 0.000 abstract 1
- 108091006146 Channels Proteins 0.000 description 9
- 238000002161 passivation Methods 0.000 description 8
- 238000005229 chemical vapour deposition Methods 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 6
- 239000012535 impurity Substances 0.000 description 6
- 238000002834 transmittance Methods 0.000 description 6
- 238000009825 accumulation Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 239000011521 glass Substances 0.000 description 5
- 108010075750 P-Type Calcium Channels Proteins 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 238000005245 sintering Methods 0.000 description 3
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical compound [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 230000003595 spectral effect Effects 0.000 description 2
- 206010034960 Photophobia Diseases 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- -1 boron ions Chemical class 0.000 description 1
- 229910052810 boron oxide Inorganic materials 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- JKWMSGQKBLHBQQ-UHFFFAOYSA-N diboron trioxide Chemical compound O=BOB=O JKWMSGQKBLHBQQ-UHFFFAOYSA-N 0.000 description 1
- 208000013469 light sensitivity Diseases 0.000 description 1
- 239000000075 oxide glass Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- RLOWWWKZYUNIDI-UHFFFAOYSA-N phosphinic chloride Chemical compound ClP=O RLOWWWKZYUNIDI-UHFFFAOYSA-N 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、固体撮像装置、特
に、分光感度等の感度向上を図った固体撮像装置に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device, and more particularly, to a solid-state imaging device having improved sensitivity such as spectral sensitivity.
【０００２】[0002]
【従来の技術】従来の固体撮像装置の断面構造を図５に
示す。図５において、５１はＮ型シリコン基板、５２は
第１のＰ型ウエル領域、５３は受光部を形成するＮ型不
純物拡散領域、５４はＮ型転送チャネル領域、５５はＰ
型チャネルストッパ領域、５６はＰ型正孔蓄積領域、５
７は第２のＰ型ウエル領域、５８は読み出しゲート部、
５９はゲート絶縁膜（シリコン酸化膜）、６０はゲート
絶縁膜（シリコン窒化膜）、６１はゲート絶縁膜（シリ
コン酸化膜）、６２は第１のゲート電極（ポリシリコン
膜）、６３はゲート電極間絶縁膜（酸化膜）、６４は第
２のゲート電極（ポリシリコン膜）、６５は第２のゲー
ト電極上酸化膜、６６は平坦化膜（ＣＶＤ−Ｓｉ
Ｏ2）、６７は遮光膜（Ａｌ−Ｓｉ）、６８はパッシベ
ーション膜（Ｐ−ＳｉＮ）を示す。図５では、受光部の
感光領域は、熱酸化にて形成されるシリコン酸化膜５９
と平坦化及び絶縁を目的とし、ＣＶＤ法にて形成される
シリコン酸化膜６６と、保護及び水素供給を目的として
形成されるシリコン窒化膜６８により覆われている。2. Description of the Related Art FIG. 5 shows a sectional structure of a conventional solid-state imaging device. 5, reference numeral 51 denotes an N-type silicon substrate; 52, a first P-type well region; 53, an N-type impurity diffusion region forming a light receiving portion; 54, an N-type transfer channel region;
Channel stopper region, 56 is a P-type hole accumulation region, 5
7 is a second P-type well region, 58 is a read gate unit,
59 is a gate insulating film (silicon oxide film), 60 is a gate insulating film (silicon nitride film), 61 is a gate insulating film (silicon oxide film), 62 is a first gate electrode (polysilicon film), and 63 is a gate electrode. An inter-insulating film (oxide film), 64 is a second gate electrode (polysilicon film), 65 is an oxide film on the second gate electrode, and 66 is a planarization film (CVD-Si).
O 2 ) and 67 indicate a light-shielding film (Al-Si), and 68 indicates a passivation film (P-SiN). In FIG. 5, the photosensitive region of the light receiving section is a silicon oxide film 59 formed by thermal oxidation.
And a silicon oxide film 66 formed by a CVD method for the purpose of planarization and insulation, and a silicon nitride film 68 formed for the purpose of protection and hydrogen supply.
【０００３】このように、受光部表面は屈折率の異なる
膜の多層構造にて形成されているため、シリコン酸化
膜、シリコン窒化膜によって、そこを透過する干渉効果
を含めて分光特性上の変化が生じる。そのため、従来に
おいては、シリコン酸化膜の膜厚とシリコン窒化膜の膜
厚との関係を、例えば、人間の目の感度が最も高いグリ
ーンの波長であるλ＝５５０ｎｍの光の透過率が略極大
になるように設定し、固体撮像装置を形成していた。As described above, since the light receiving portion surface is formed in a multilayer structure of films having different refractive indices, the silicon oxide film and the silicon nitride film cause a change in spectral characteristics including an interference effect transmitted therethrough. Occurs. Therefore, in the related art, the relationship between the thickness of the silicon oxide film and the thickness of the silicon nitride film is determined by, for example, that the transmittance of light of λ = 550 nm, which is the wavelength of green at which the human eye has the highest sensitivity, is substantially maximal. , To form a solid-state imaging device.
【０００４】[0004]
【発明が解決しようとする課題】ところで、従来技術に
おいて、シリコン酸化膜は、熱酸化により形成されるシ
リコン酸化膜と、常圧ＣＶＤ等により形成される平坦化
を目的とする、リンガラス（ＰＳＧ）やボロンリンガラ
ス（ＢＰＳＧ）のシリコン酸化膜の多層から形成されて
いた。但し、この多層膜は屈折率が略同じであるので、
一つのシリコン酸化膜とみなす。また、シリコン窒化膜
は、プラズマＣＶＤ法等により形成されていた。By the way, in the prior art, the silicon oxide film is made of a silicon oxide film formed by thermal oxidation and a phosphorus glass (PSG) formed for flattening by normal pressure CVD or the like. ) Or a boron oxide glass (BPSG) silicon oxide film. However, since this multilayer film has substantially the same refractive index,
It is regarded as one silicon oxide film. The silicon nitride film has been formed by a plasma CVD method or the like.
【０００５】この内、常圧ＣＶＤ法等により形成される
リンガラス（ＰＳＧ）やボロンリンガラス（ＢＰＳＧ）
のシリコン酸化膜は、通常平坦化を目的としているた
め、ある程度の膜厚（通常１００〜１０００ｎｍ程度）
が必要なことと、平坦化を目的とし、形成後の熱処理に
よりリフローされることや、常圧ＣＶＤそのものの成膜
時の膜厚バラツキが大きいことから、膜厚制御が困難で
あり、このことが透過する光の可視光領域の光感度の制
御性を困難としていた。これらの膜は不純物濃度によっ
てもリフロー性が大きく変わり、リフロー前の成膜のバ
ラツキも大きいので、トータルで考えると、更にばらつ
きが大きくなる。[0005] Among them, phosphorus glass (PSG) or boron phosphorus glass (BPSG) formed by a normal pressure CVD method or the like.
Since the silicon oxide film is usually intended for planarization, it has a certain thickness (typically about 100 to 1000 nm).
It is difficult to control the film thickness due to the necessity of the method, the reflow by the heat treatment after the formation for the purpose of planarization, and the large variation in the film thickness during the deposition of the atmospheric pressure CVD itself. This makes it difficult to control the light sensitivity in the visible light region of the light transmitted therethrough. The reflow properties of these films vary greatly depending on the impurity concentration, and the variation in film formation before reflow is large.
【０００６】本発明の目的は、常圧ＣＶＤ法等により形
成される平坦化を目的とした、リンガラス（ＰＳＧ）や
ボロンリンガラス（ＢＰＳＧ）のシリコン酸化膜の膜厚
がばらついても、透過するλ＝５５０ｎｍ付近の光の強
度特性に影響を与えず、また、透過する、特に可視光領
域の光の感度特性に影響を与えない固体撮像装置を提供
することにある。An object of the present invention is to provide a flattened silicon oxide film made of phosphorus glass (PSG) or boron phosphorus glass (BPSG) for planarization formed by a normal pressure CVD method or the like, even if the thickness of the silicon oxide film varies. An object of the present invention is to provide a solid-state imaging device that does not affect the intensity characteristics of light near λ = 550 nm and does not affect the sensitivity characteristics of light that is transmitted, particularly in the visible light region.
【０００７】[0007]
【課題を解決するための手段】請求項１に記載の本発明
の固体撮像装置は、同一基板に受光部領域と転送チャネ
ル領域とが形成され、上記受光部領域において光電変換
にて発生された電荷を上記転送チャネル領域に転送する
読み出し領域上にゲート絶縁膜を介して転送電極が形成
され、転送チャネル領域を含む全面に層間絶縁膜が形成
され、該層間絶縁膜上に該転送電極を覆うように遮光膜
が形成され、該遮光膜を含む全面に保護絶縁膜が形成さ
れた固体撮像装置において、少なくとも上記受光部領域
となる基板全面を覆う、所定の膜厚の第１のシリコン酸
化膜と、上記受光部領域となる基板の一部領域を覆う、
所定の膜厚の第１のシリコン窒化膜とが上記基板と上記
層間絶縁膜との間に順次形成されていることを特徴とす
るものである。According to a first aspect of the present invention, there is provided a solid-state imaging device according to the present invention, wherein a light receiving area and a transfer channel area are formed on the same substrate, and the light receiving area is generated by photoelectric conversion in the light receiving area. A transfer electrode is formed via a gate insulating film over a readout region for transferring charges to the transfer channel region, an interlayer insulating film is formed over the entire surface including the transfer channel region, and the transfer electrode is covered over the interlayer insulating film. In a solid-state imaging device in which a light-shielding film is formed as described above and a protective insulating film is formed on the entire surface including the light-shielding film, a first silicon oxide film of a predetermined film thickness covering at least the entire surface of the substrate serving as the light receiving area. And cover a partial area of the substrate to be the light receiving section area,
A first silicon nitride film having a predetermined thickness is sequentially formed between the substrate and the interlayer insulating film.
【０００８】また、請求項２に記載の本発明の固体撮像
装置は、上記第１のシリコン酸化膜及び第１のシリコン
窒化膜の膜厚が共に１ｎｍ以上で、且つ、１００ｎｍ以
下であることを特徴とする、請求項１に記載の固体撮像
装置である。According to a second aspect of the present invention, in the solid-state imaging device, the first silicon oxide film and the first silicon nitride film each have a thickness of 1 nm or more and 100 nm or less. The solid-state imaging device according to claim 1, wherein:
【０００９】また、請求項３に記載の本発明の固体撮像
装置は、上記ゲート絶縁膜が第２のシリコン酸化膜と第
２のシリコン窒化膜とが順次形成され、且つ、上記第１
のシリコン酸化膜と上記第２のシリコン酸化膜とが同じ
厚さで、且つ、上記第１のシリコン窒化膜と上記第２の
シリコン窒化膜とが同じ厚さであることを特徴とする、
請求項１又は請求項２に記載の固体撮像装置である。According to a third aspect of the present invention, in the solid-state imaging device according to the present invention, the gate insulating film is formed by sequentially forming a second silicon oxide film and a second silicon nitride film, and
Wherein the silicon oxide film and the second silicon oxide film have the same thickness, and the first silicon nitride film and the second silicon nitride film have the same thickness.
A solid-state imaging device according to claim 1 or 2.
【００１０】[0010]
【発明の実施の形態】以下、実施の形態に基づいて本発
明について詳細に説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on embodiments.
【００１１】図１は本実施の形態の本発明の固体撮像装
置の断面構造図、図２は図１の固体撮像装置の製造工程
図を示す。図１及び図２において、１はＮ型シリコン基
板、２は第１のＰ型ウエル領域、３は受光部を形成する
Ｎ型不純物拡散領域、４は転Ｎ型転送チャネル領域、５
はＰ型チャネルストッパ領域、６はＰ型正孔蓄積領域、
７は第２のＰ型ウエル領域、８は読み出しゲート部、
９、１２はゲート絶縁膜を形成するシリコン酸化膜、１
０はゲート絶縁膜を形成するシリコン窒化膜、１１は干
渉膜であるシリコン窒化膜であり、ゲート絶縁膜を形成
するシリコン窒化膜１０と同一のものである。また、１
３は第１のゲート電極、１４はゲート電極間絶縁膜、１
５は第２のゲート電極、１６は第２のゲート電極上のシ
リコン酸化膜、１７は平坦化膜、１８は遮光膜、１９は
パッシベーション膜を示す。FIG. 1 is a sectional structural view of a solid-state imaging device according to the present invention of this embodiment, and FIG. 2 is a manufacturing process diagram of the solid-state imaging device of FIG. 1 and 2, 1 is an N-type silicon substrate, 2 is a first P-type well region, 3 is an N-type impurity diffusion region forming a light receiving section, 4 is an N-type transfer channel region,
Is a P-type channel stopper region, 6 is a P-type hole accumulation region,
7 is a second P-type well region, 8 is a read gate unit,
Reference numerals 9 and 12 denote silicon oxide films for forming a gate insulating film;
Reference numeral 0 denotes a silicon nitride film forming a gate insulating film, and 11 denotes a silicon nitride film serving as an interference film, which is the same as the silicon nitride film 10 forming a gate insulating film. Also, 1
3 is a first gate electrode, 14 is an insulating film between gate electrodes, 1
Reference numeral 5 denotes a second gate electrode, 16 denotes a silicon oxide film on the second gate electrode, 17 denotes a flattening film, 18 denotes a light shielding film, and 19 denotes a passivation film.
【００１２】本発明は、受光部領域の第１のＰ型ウエル
領域２上に所定の膜厚のシリコン酸化膜９上に受光部領
域の一部を覆うように干渉膜となる、所定の膜厚のシリ
コン窒化膜１１が形成されていることを特徴としてい
る。特に、図１に示すように、受光部領域の第１のＰ型
ウエル領域２上にゲート絶縁膜を形成する、膜厚が１ｎ
ｍ以上で、且つ、１００ｎｍ以下のシリコン酸化膜９上
に受光部領域の一部を覆うように干渉膜となる、膜厚が
１ｎｍ以上で、且つ、１００ｎｍ以下のシリコン窒化膜
１１が形成されていることを特徴としている。According to the present invention, a predetermined film serving as an interference film is formed on a silicon oxide film 9 having a predetermined thickness on the first P-type well region 2 in the light receiving portion region so as to partially cover the light receiving portion region. It is characterized in that a thick silicon nitride film 11 is formed. In particular, as shown in FIG. 1, a gate insulating film is formed on the first P-type well region 2 in the light receiving portion region, and has a thickness of 1 n.
A silicon nitride film 11 having a film thickness of 1 nm or more and 100 nm or less is formed on the silicon oxide film 9 having a film thickness of 1 nm or more and 100 nm or less so as to cover a part of the light receiving region. It is characterized by having.
【００１３】以下、図２を用いて、本発明の一実施の形
態の固体撮像装置の製造工程を説明する。Hereinafter, a manufacturing process of the solid-state imaging device according to one embodiment of the present invention will be described with reference to FIG.
【００１４】まず、図２（ａ）に示すように、Ｎ型シリ
コン基板１の全面にボロンをイオン注入し、その後熱拡
散により、第１のＰ型ウエル領域７を形成する。次に、
第２のＰ型ウエル領域２及びＮ型転送チャネル領域４を
形成するため、第２のＰ型ウエル領域７及びＮ型転送チ
ャネル領域４が形成される領域を開口したフォトレジス
トを用いて、ボロン及びリンをイオン注入する。First, as shown in FIG. 2A, boron is ion-implanted over the entire surface of the N-type silicon substrate 1, and then a first P-type well region 7 is formed by thermal diffusion. next,
In order to form the second P-type well region 2 and the N-type transfer channel region 4, boron is formed using a photoresist having an opening in the region where the second P-type well region 7 and the N-type transfer channel region 4 are formed. And phosphorus are ion-implanted.
【００１５】フォトレジスト除去後、Ｐ型チャネルスト
ッパ領域５を形成するため、Ｐ型チャネルストッパ領域
５形成領域が開口したフォトレジストを用いてボロンを
イオン注入する。After removing the photoresist, boron ions are implanted using a photoresist having an opening in the region where the P-type channel stopper region 5 is to be formed, in order to form the P-type channel stopper region 5.
【００１６】フォトレジストを除去後、熱酸化により、
ゲート絶縁膜を形成する、１ｎｍ以上で、且つ、１００
ｎｍ以下の膜厚のシリコン酸化膜９を形成し、次に、ゲ
ート絶縁膜を形成する、１ｎｍ以上で、且つ、１００ｎ
ｍ以下の膜厚のシリコン窒化膜１０を形成した後、該シ
リコン窒化膜１０を酸化することにより、１ｎｍ以上
で、且つ、３０ｎｍ以下のゲート絶縁膜を形成するシリ
コン酸化膜１２を形成する。ここで、ＭＯＮＯＳ（Ｍｅ
ｔａｌ Ｏｘｉｄｅ Ｎｉｔｒｉｄ ＯｘｉｄｅＳｉｌ
ｃｏｎ）ゲート構造を用いているが、ＣＣＤ転送部は通
常のＭＯＳ構造であっても何ら問題はない。After removing the photoresist, thermal oxidation
Forming a gate insulating film, 1 nm or more and 100
forming a silicon oxide film 9 having a thickness of not more than 1 nm and then forming a gate insulating film;
After forming the silicon nitride film 10 having a thickness of not more than m, the silicon nitride film 10 is oxidized to form a silicon oxide film 12 for forming a gate insulating film having a thickness of 1 nm or more and 30 nm or less. Here, MONOS (Me
tal Oxide Nitride OxideSil
con) A gate structure is used, but there is no problem even if the CCD transfer unit has a normal MOS structure.
【００１７】次に、第１のゲート電極１３を形成するた
めに、ＣＶＤ法によりポリシリコン膜を堆積した後、Ｐ
ＯＣｌ3法によりリンをドープし、第１のゲート電極１
３形成領域を覆うフォトレジストを用いて、反応性イオ
ンエッチングにより、第１のゲート電極１３を形成す
る。フォトレジストを除去した後、ゲート電極間を絶縁
するために、熱酸化により、ゲート電極間絶縁膜１４を
形成する。Next, in order to form the first gate electrode 13, after depositing a polysilicon film by the CVD method,
The first gate electrode 1 is doped with phosphorus by the OCl 3 method.
The first gate electrode 13 is formed by reactive ion etching using a photoresist covering the formation region. After removing the photoresist, an insulating film 14 between the gate electrodes is formed by thermal oxidation to insulate between the gate electrodes.
【００１８】次に、図２（ｂ）に示すように、第２のゲ
ート電極１５を形成するために、ＣＶＤ法によりポリシ
リコン膜を堆積した後、ＰＯＣｌ3法によりリンをドー
プし、第２のゲート電極１５形成領域を覆うフォトレジ
ストを用いて、反応性イオンエッチングにより、第２の
ゲート電極１５を形成する。このとき、ゲート絶縁膜を
形成するシリコン窒化膜１０はエッチングしない。Next, as shown in FIG. 2B, in order to form a second gate electrode 15, a polysilicon film is deposited by a CVD method, and then phosphorus is doped by a POCl 3 method. The second gate electrode 15 is formed by reactive ion etching using a photoresist covering the region where the gate electrode 15 is to be formed. At this time, the silicon nitride film 10 forming the gate insulating film is not etched.
【００１９】フォトレジストを除去後、絶縁のために、
熱酸化により、第２のゲート電極上絶縁膜１６を形成
し、次に受光部を形成するＮ型不純物拡散領域３及び受
光部表面のＰ型正孔蓄積層６を形成するために、受光部
を形成するＮ型不純物拡散領域３形成領域及び受光部表
面のＰ型正孔蓄積層６形成領域が開口したフォトレジス
トを用いて、リン及びボロンをイオン注入し、その後、
フォトレジストを除去する。After removing the photoresist, for insulation,
The second insulating film 16 on the gate electrode is formed by thermal oxidation, and then the light receiving portion is formed to form the N-type impurity diffusion region 3 forming the light receiving portion and the P-type hole accumulation layer 6 on the surface of the light receiving portion. Is ion-implanted with phosphorus and boron using a photoresist in which an N-type impurity diffusion region 3 forming region and a P-type hole accumulation layer 6 forming region on the surface of the light receiving portion are opened.
Remove the photoresist.
【００２０】次に、図２（ｃ）に示すように、干渉膜で
あるシリコン窒化膜１１を形成するため、干渉膜形成領
域を覆うフォトレジストを用い、反応性イオンエッチン
グによりシリコン窒化膜１０をパターニングする。Next, as shown in FIG. 2C, in order to form a silicon nitride film 11 as an interference film, the silicon nitride film 10 is formed by reactive ion etching using a photoresist covering an interference film formation region. Perform patterning.
【００２１】次に、図２（ｄ）に示すように、平坦化の
ためにＣＶＤ法によりＢＰＳＧ膜１７を堆積し、遮光膜
１８を形成するため、スパッタ法によりＡｌ−Ｓｉ膜を
堆積し、遮光膜１８を覆うフォトレジストを用いて、反
応性イオンエッチングにより、遮光膜１８を形成する。Next, as shown in FIG. 2D, a BPSG film 17 is deposited by a CVD method for flattening, and an Al-Si film is deposited by a sputtering method to form a light shielding film 18, The light-shielding film 18 is formed by reactive ion etching using a photoresist covering the light-shielding film 18.
【００２２】最後に、パッシベーション膜１９であるＰ
−ＳｉＮ膜をプラズマＣＶＤ法により堆積させ、水素雰
囲気で４００℃付近の熱処理によるシンター処理を行い
工程を完了する。Finally, the passivation film 19, P
A SiN film is deposited by a plasma CVD method, and sintering is performed by heat treatment at about 400 ° C. in a hydrogen atmosphere to complete the process.
【００２３】図３は波長５５０ｎｍについてのシリコン
酸化膜（ＢＰＳＧ）で構成される層間絶縁膜の膜厚とシ
リコン基板内に透過する光の割合を、シリコン酸化膜と
シリコン窒化膜（パッシベーション膜）からなる多層構
造に関して、シュミレーションしたものである。図３に
おける破線は従来構造のシリコン酸化膜３０ｎｍとシリ
コン酸化膜（ＢＰＳＧ）で構成される層間絶縁膜２００
ｎｍから７００ｎｍとシリコン窒化膜（パッシベーショ
ン膜）３００ｎｍの多層構造に関してのものであり、実
線は本発明の構造のシリコン酸化膜３００ｎｍとシリコ
ン窒化膜３０ｎｍとシリコン酸化膜（ＢＰＳＧ）で構成
される層間絶縁膜２００ｎｍから７００ｎｍとシリコン
窒化膜（パッシベーション膜）３０ｎｍの多層構造に関
してのものである。FIG. 3 shows the thickness of the interlayer insulating film composed of a silicon oxide film (BPSG) for a wavelength of 550 nm and the ratio of light transmitted through the silicon substrate from the silicon oxide film and the silicon nitride film (passivation film). This is a simulation of a multilayer structure. A broken line in FIG. 3 indicates an interlayer insulating film 200 composed of a silicon oxide film 30 nm and a silicon oxide film (BPSG) of a conventional structure.
The present invention relates to a multilayer structure having a thickness of 300 nm to 700 nm and a silicon nitride film (passivation film) of 300 nm. The solid line indicates an interlayer insulating film composed of a silicon oxide film of 300 nm, a silicon nitride film of 30 nm, and a silicon oxide film (BPSG). This relates to a multilayer structure of a film having a thickness of 200 nm to 700 nm and a silicon nitride film (passivation film) having a thickness of 30 nm.
【００２４】図３から明らかなように、図１の固体撮像
装置のように、受光部の基板上が、膜厚が１ｎｍ以上
で、且つ、１００ｎｍ以下のシリコン酸化膜と膜厚が１
ｎｍで、且つ、１００ｎｍ以下のシリコン窒化膜と層間
絶縁膜（ＢＰＳＧ）と保護膜（Ｐ−ＳｉＮ）で形成され
ている場合、透過率のばらつきは従来構造に比べて低減
でき、またその平均値も従来構造より高い値を示す。As is clear from FIG. 3, as in the solid-state image pickup device of FIG. 1, the substrate on the light receiving section has a silicon oxide film having a thickness of 1 nm or more and 100 nm or less and a silicon oxide film having a thickness of 1 nm or less.
When the silicon nitride film, the interlayer insulating film (BPSG) and the protective film (P-SiN) each having a thickness of 100 nm or less are formed, the variation in the transmittance can be reduced as compared with the conventional structure, and the average value thereof is obtained. Also shows a higher value than the conventional structure.
【００２５】シリコン酸化膜及びシリコン窒化膜は、ゲ
ート電極との絶縁膜としても使用されており、シリコン
酸化膜及びシリコン窒化膜が薄いとゲート電極と基板と
の耐圧が劣化するため、使用電圧に合わせて膜厚は設定
され、通常は１ｎｍ以上である。また、シリコン酸化膜
厚が厚いと、図４からも明らかなように、感度が劣化
し、１００ｎｍ以上では従来構造からの優位性が認めら
れない。The silicon oxide film and the silicon nitride film are also used as an insulating film with the gate electrode. If the silicon oxide film and the silicon nitride film are thin, the withstand voltage between the gate electrode and the substrate deteriorates. The film thickness is set together, and is usually 1 nm or more. In addition, when the silicon oxide film thickness is large, the sensitivity is deteriorated, as is apparent from FIG. 4, and when the silicon oxide film thickness is 100 nm or more, superiority to the conventional structure is not recognized.
【００２６】また、シリコン窒化膜が薄いと、ゲート電
極と基板との耐圧劣化が生じるため、通常は１ｎｍ以上
に設定する。また、シリコン窒化膜厚が厚いと、図４か
らも明らかなように、感度が劣化し、１００ｎｍ以上で
はシリコン酸化膜厚の最適化を行っても、従来構造から
の優位性が認められない。If the silicon nitride film is thin, the withstand voltage between the gate electrode and the substrate deteriorates. Therefore, the thickness is usually set to 1 nm or more. Further, as is apparent from FIG. 4, when the silicon nitride film thickness is large, the sensitivity is deteriorated, and when the silicon oxide film thickness is 100 nm or more, even if the silicon oxide film thickness is optimized, the superiority to the conventional structure is not recognized.
【００２７】また、図４は波長５５０ｎｍについての、
受光部上面のシリコン酸化膜厚及び干渉膜であるシリコ
ン窒化膜厚とシリコン基板内に透過する光の割合を、シ
リコン酸化膜とシリコン窒化膜（パッシベーション膜）
からなる多層膜構造に関してシュミレーションしたもの
である。FIG. 4 is a graph for a wavelength of 550 nm.
The silicon oxide film and the silicon nitride film (passivation film) are used to determine the ratio of light transmitted through the silicon substrate to the thickness of the silicon oxide film and the silicon nitride film serving as an interference film on the upper surface of the light receiving unit.
Was simulated with respect to a multilayer film structure composed of:
【００２８】実線は従来構造の干渉膜であるシリコン窒
化膜がない場合の多層構造に関してのものであり、破線
は本発明構造の干渉膜であるシリコン窒化膜がある場合
の多層構造に関してのものである。The solid line is for the multilayer structure without the silicon nitride film as the interference film of the conventional structure, and the broken line is for the multilayer structure with the silicon nitride film as the interference film of the present invention structure. is there.
【００２９】図４から明らかなように、膜厚が１ｎｍ以
上で、且つ、１００ｎｍ以下、特に３０ｎｍ以上で、且
つ、６０ｎｍ以下のシリコン酸化膜と、膜厚が１ｎｍ以
上で、且つ、１００ｎｍ以下、特に３０ｎｍ以上で、且
つ、６０ｎｍ以下のシリコン窒化膜のうちから透過率の
よい膜厚比を選択することで、従来構造より高い透過率
を示す。As is apparent from FIG. 4, a silicon oxide film having a film thickness of 1 nm or more and 100 nm or less, particularly 30 nm or more and 60 nm or less, a silicon oxide film having a film thickness of 1 nm or more and 100 nm or less, In particular, by selecting a film thickness ratio having a good transmittance from a silicon nitride film having a thickness of 30 nm or more and 60 nm or less, a transmittance higher than that of the conventional structure is exhibited.
【００３０】[0030]
【発明の効果】以上、詳細に説明したように、本発明を
用いることにより、平坦化を目的として形成される層間
絶縁膜（ＢＰＳＧ及びＰＳＧ）の膜厚がばらついても、
透過率のばらつきは低減でき、透過率の平均値も高い値
を示す。したがって、感度が高くばらつきの少ない固体
撮像装置を提供することができる。As described in detail above, by using the present invention, even if the thickness of the interlayer insulating films (BPSG and PSG) formed for the purpose of planarization varies,
Variation in transmittance can be reduced, and the average value of transmittance also shows a high value. Therefore, it is possible to provide a solid-state imaging device with high sensitivity and little variation.
【００３１】また、受光部となる基板上の全面にシリコ
ン酸化膜が形成され、且つ、上記受光部となる基板上の
一部領域にのみシリコン窒化膜が形成されているので、
固体撮像装置形成最終工程である水素シンター工程時で
の受光部のシンター効果をシリコン窒化膜が妨げないた
め、暗電圧の上昇を招かない。Further, since a silicon oxide film is formed on the entire surface of the substrate serving as the light receiving portion and a silicon nitride film is formed only in a partial region on the substrate serving as the light receiving portion,
Since the silicon nitride film does not hinder the sintering effect of the light receiving portion in the hydrogen sintering step, which is the final step of forming the solid-state imaging device, the dark voltage does not increase.
【００３２】さらに、転送電極下のゲート絶縁膜がシリ
コン酸化膜とシリコン窒化膜とが順次形成された構成に
なっている場合、上記受光部のシリコン窒化膜が工程数
の増加を伴わずに形成することができる。Further, when the gate insulating film under the transfer electrode has a structure in which a silicon oxide film and a silicon nitride film are sequentially formed, the silicon nitride film of the light receiving portion is formed without increasing the number of steps. can do.
【図１】本発明の一実施の形態の固体撮像装置の構造断
面図である。FIG. 1 is a structural sectional view of a solid-state imaging device according to an embodiment of the present invention.
【図２】本発明の一実施の形態の固体撮像装置の製造工
程図である。FIG. 2 is a manufacturing process diagram of the solid-state imaging device according to one embodiment of the present invention;
【図３】波長５５０ｎｍについての層間絶縁膜の膜厚と
シリコン基板内に透過する光の割合との関係を示した図
である。FIG. 3 is a diagram showing a relationship between a film thickness of an interlayer insulating film and a ratio of light transmitted through a silicon substrate for a wavelength of 550 nm.
【図４】波長５５０ｎｍについての、受光部上面のシリ
コン酸化膜厚及びシリコン窒化膜厚とシリコン基板内に
透過する光の割合の関係を示した図である。FIG. 4 is a diagram showing a relationship between a thickness of a silicon oxide film and a thickness of a silicon nitride film on an upper surface of a light receiving unit and a ratio of light transmitted through a silicon substrate for a wavelength of 550 nm.
【図５】従来の固体撮像装置の製造工程図である。FIG. 5 is a manufacturing process diagram of a conventional solid-state imaging device.
１ Ｎ型シリコン基板 ２ 第１のＰ型ウエル領域 ３ 受光部を形成するＮ型不純物拡散領域 ４ Ｎ型転送チャネル領域 ５ Ｐ型チャネルストッパ領域 ６ Ｐ型正孔蓄積領域 ７ 第２のＰ型ウエル領域 ８ 読み出しゲート部 ９、１２ ゲート絶縁膜を形成するシリコン酸化膜 １０ ゲート絶縁膜を形成するシリコン窒化膜 １１ 干渉膜 １３ 第１のゲート電極 １４ ゲート電極間絶縁膜 １５ 第２のゲート電極 １６ 第２のゲート電極上のシリコン酸化膜 １７ 平坦化膜 １８ 遮光膜 １９ パッシベーション膜 DESCRIPTION OF SYMBOLS 1 N-type silicon substrate 2 1st P-type well region 3 N-type impurity diffusion region which forms a light receiving part 4 N-type transfer channel region 5 P-type channel stopper region 6 P-type hole accumulation region 7 2nd P-type well Region 8 Read gate section 9, 12 Silicon oxide film forming gate insulating film 10 Silicon nitride film forming gate insulating film 11 Interference film 13 First gate electrode 14 Intergate insulating film 15 Second gate electrode 16th Silicon oxide film on gate electrode 2 17 Planarization film 18 Light shielding film 19 Passivation film
Claims (3)
域とが形成され、上記受光部領域において光電変換にて
発生された電荷を上記転送チャネル領域に転送する読み
出し領域上にゲート絶縁膜を介して転送電極が形成さ
れ、転送チャネル領域を含む全面に層間絶縁膜が形成さ
れ、該層間絶縁膜上に該転送電極を覆うように遮光膜が
形成され、該遮光膜を含む全面に保護絶縁膜が形成され
た固体撮像装置において、 少なくとも上記受光部領域となる基板全面を覆う、所定
の膜厚の第１のシリコン酸化膜と、上記受光部領域とな
る基板の一部領域を覆う、所定の膜厚の第１のシリコン
窒化膜とが上記基板と上記層間絶縁膜との間に順次形成
されていることを特徴とする固体撮像装置。1. A light receiving portion region and a transfer channel region are formed on the same substrate, and a charge generation generated by photoelectric conversion in the light receiving portion region is transferred to a transfer channel region via a gate insulating film on a readout region. A transfer electrode is formed, an interlayer insulating film is formed on the entire surface including the transfer channel region, a light shielding film is formed on the interlayer insulating film so as to cover the transfer electrode, and a protective insulating film is formed on the entire surface including the light shielding film. A first silicon oxide film of a predetermined thickness covering at least the entire surface of the substrate serving as the light receiving portion region and a predetermined silicon oxide film covering a partial region of the substrate serving as the light receiving portion region. A solid-state imaging device, wherein a first silicon nitride film having a thickness is sequentially formed between the substrate and the interlayer insulating film.
リコン窒化膜の膜厚が共に１ｎｍ以上で、且つ、１００
ｎｍ以下であることを特徴とする、請求項１に記載の固
体撮像装置。2. The first silicon oxide film and the first silicon nitride film both have a thickness of 1 nm or more, and
2. The solid-state imaging device according to claim 1, wherein the diameter is equal to or less than nm.
膜と第２のシリコン窒化膜とが順次形成され、且つ、上
記第１のシリコン酸化膜と上記第２のシリコン酸化膜と
が同じ厚さで、且つ、上記第１のシリコン窒化膜と上記
第２のシリコン窒化膜とが同じ厚さであることを特徴と
する、請求項１又は請求項２に記載の固体撮像装置。3. The gate insulating film according to claim 1, wherein a second silicon oxide film and a second silicon nitride film are sequentially formed, and the first silicon oxide film and the second silicon oxide film have the same thickness. 3. The solid-state imaging device according to claim 1, wherein the first silicon nitride film and the second silicon nitride film have the same thickness. 4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10038584A JPH11238866A (en) | 1998-02-20 | 1998-02-20 | Solid-state image sensing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10038584A JPH11238866A (en) | 1998-02-20 | 1998-02-20 | Solid-state image sensing device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11238866A true JPH11238866A (en) | 1999-08-31 |
Family
ID=12529353
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10038584A Pending JPH11238866A (en) | 1998-02-20 | 1998-02-20 | Solid-state image sensing device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11238866A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6864475B1 (en) | 1999-11-08 | 2005-03-08 | Mitsubishi Denki Kabushiki Kaisha | Image sensor having uniform sensitivity |
| JP2006229150A (en) * | 2005-02-21 | 2006-08-31 | Sony Corp | Solid-state imaging device and method of manufacturing the same |
| JP2006332124A (en) * | 2005-05-23 | 2006-12-07 | Matsushita Electric Ind Co Ltd | Solid-state image pickup element and manufacturing method thereof |
| KR100683390B1 (en) * | 1999-12-28 | 2007-02-15 | 매그나칩 반도체 유한회사 | Method for manufacturing image sensor |
| JP2010199442A (en) * | 2009-02-26 | 2010-09-09 | Sharp Corp | Method of forming resist pattern, method of manufacturing semiconductor device, method of manufacturing solid-state imaging element, solid-state imaging element, and electronic information equipment |
| JP2010205843A (en) * | 2009-03-02 | 2010-09-16 | Sharp Corp | Solid-state image sensor, method of manufacturing the same, and electronic information apparatus |
-
1998
- 1998-02-20 JP JP10038584A patent/JPH11238866A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6864475B1 (en) | 1999-11-08 | 2005-03-08 | Mitsubishi Denki Kabushiki Kaisha | Image sensor having uniform sensitivity |
| KR100683390B1 (en) * | 1999-12-28 | 2007-02-15 | 매그나칩 반도체 유한회사 | Method for manufacturing image sensor |
| JP2006229150A (en) * | 2005-02-21 | 2006-08-31 | Sony Corp | Solid-state imaging device and method of manufacturing the same |
| JP2006332124A (en) * | 2005-05-23 | 2006-12-07 | Matsushita Electric Ind Co Ltd | Solid-state image pickup element and manufacturing method thereof |
| JP2010199442A (en) * | 2009-02-26 | 2010-09-09 | Sharp Corp | Method of forming resist pattern, method of manufacturing semiconductor device, method of manufacturing solid-state imaging element, solid-state imaging element, and electronic information equipment |
| JP2010205843A (en) * | 2009-03-02 | 2010-09-16 | Sharp Corp | Solid-state image sensor, method of manufacturing the same, and electronic information apparatus |
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