KR20010057528A - METHOD FOR MANUFACTURING OF TiSiN LAYER USED CVD METHOD - Google Patents
METHOD FOR MANUFACTURING OF TiSiN LAYER USED CVD METHOD Download PDFInfo
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- KR20010057528A KR20010057528A KR1019990061356A KR19990061356A KR20010057528A KR 20010057528 A KR20010057528 A KR 20010057528A KR 1019990061356 A KR1019990061356 A KR 1019990061356A KR 19990061356 A KR19990061356 A KR 19990061356A KR 20010057528 A KR20010057528 A KR 20010057528A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
Abstract
Description
본 발명은 CVD방법에 의한 타이타늄실리나이트라이드막 제조방법에 관한 것으로서, 보다 상세하게는 깊고 좁은 콘택에서도 층덮힘이 우수할 뿐만 아니라 결정입계가 없는 비정질 구조로서 확산방지력이 우수하며 내산화 특성이 우수한 장점을 갖는 타이타늄실리나이트라이드막을 화학적 기상증착 방법에 의해 제조하는 방법에 관한 것이다.The present invention relates to a method for manufacturing a titanium silicide nitride film by CVD method, and more particularly, it is excellent in layer covering even in deep and narrow contacts, as well as an amorphous structure without grain boundaries, and excellent in diffusion prevention and oxidation resistance. It relates to a method for producing a titanium silicide nitride film having excellent advantages by a chemical vapor deposition method.
기존의 반도체소자에서는 확산방지막으로서 이원계물질 즉, TiN, TaN, WN 등을 주로 사용하고 있다. 이들의 증착방법은 물리적 기상증착방법 및 화학적 기상 증착방법으로서 쉽게 증착할 수 있는 장점이 있다.In conventional semiconductor devices, binary materials such as TiN, TaN, and WN are mainly used as diffusion barriers. These deposition methods have the advantage that they can be easily deposited as physical vapor deposition method and chemical vapor deposition method.
그러나 미세구조 측면에서 볼 때 이들은 결정입계를 포함하는 구조를 갖고 있으므로 입계가 없는 비정질 물질보다 확산방지 능력이 떨어질뿐만 아니라 커패시터 제조공정의 산화분위기 열공정시 산화에 취약한 특성을 보이고 있다. 커패시터 전극의 확산방지막 능력의 저하 또는 확산방지막의 산화 발생에 의한 산화물이 생성되면 축전용량의 감소 및 소자 특성에 나쁜 영향을 미치게 된다.However, in terms of microstructure, since they have a structure including grain boundaries, they are less prone to diffusion prevention than amorphous materials without grain boundaries, and are vulnerable to oxidation during the oxidation process of the capacitor manufacturing process. When oxides are formed by the reduction of the diffusion barrier capability of the capacitor electrode or by the oxidation of the diffusion barrier, the capacity of the capacitor is reduced and the device characteristics are adversely affected.
따라서, 최근에는 상기의 문제점을 해결하기 위해 비정질 구조를 갖고 내산화 특성이 우수한 Ti-Si-N 으로 구성된 삼원계 물질에 대한 연구가 많이 수행되었으나 이들은 대부분 물리적 기상 증착방법이고 일부 화학적 기상 증착방법에 관한 것도 있다. 그러나, 물리적 기상증착 방법은 반도체 소자의 깊고 좁은 콘택에서의 층덮힘이 나쁜 단점을 갖고 있으므로 소자 특성의 저하를 일으키는 문제점이 있다. 이러한 문제로 인하여 화학적 기상증착 방법에 의한 TiSiN을 증착하는 연구가 진행되기도 하였다. 그러나 Ti소스로서 TDMT 또는 TDEAT같은 유기름속을 사용하여 증착한 경우에는 박막내에 다수의 산소 및 탄소를 함유하여 후속열공정시 인접층들을 산화시키고 또한 높은 비저항을 나타내어 소자 특성을 저하시키는 문제점이 있다.Therefore, in order to solve the above problems, many studies have been conducted on ternary materials composed of Ti-Si-N having an amorphous structure and excellent oxidation resistance, but most of them are physical vapor deposition methods and some chemical vapor deposition methods. There is also something about. However, the physical vapor deposition method has a disadvantage in that the layer covering in the deep and narrow contacts of the semiconductor device is bad, causing deterioration of device characteristics. Due to these problems, studies have been made to deposit TiSiN by chemical vapor deposition. However, in the case of depositing using organic fluxes such as TDMT or TDEAT as a Ti source, a large amount of oxygen and carbon are contained in the thin film to oxidize adjacent layers in a subsequent thermal process and exhibit high resistivity, thereby degrading device characteristics.
본 발명은 상기와 같은 문제점을 해결하기 위해 창작된 것으로서, 본 발명의 목적은 깊고 좁은 콘택에서도 층덮힘이 우수할 뿐만 아니라 결정입계가 없는 비정질 구조로서 확산방지력이 우수하며 내산화 특성이 우수한 장점을 갖는 타이타늄실리나이트라이드막을 화학적 기상층착 방법으로 제조하는 방법을 제공함에 있다.The present invention has been made to solve the above problems, the object of the present invention is not only excellent layer covering in deep and narrow contacts, but also excellent in the diffusion prevention and excellent oxidation resistance as an amorphous structure without grain boundaries. It is to provide a method for producing a titanium silicide nitride film having a chemical vapor deposition method.
상기와 같은 목적을 실현하기 위한 본 발명은 TiCl4가스라인과 SiH4가스라인이 독립적으로 구성된 CVD챔버에서 타이타늄실리나이트라이드막을 증착가스의 공정유량은 TiCl41sccm∼100sccm, SiH41sccm∼300sccm, H2100sccm∼5000sccm, N2100sccm∼3000sccm, Ar 10sccm∼500sccm로 하고, 증착온도는 300℃∼700℃, 증착압력은 1torr∼20torr, RF파워는 100W∼1KW의 범위에서 플라즈마를 여기하여 증착하는 것을 특징으로 한다.In order to achieve the above object, the present invention provides a process for the deposition of a titanium silicide film in a CVD chamber in which a TiCl 4 gas line and a SiH 4 gas line are independently formed, such as TiCl 4 1sccm to 100sccm, SiH 4 1sccm to 300sccm, H 2 100sccm ~ 5000sccm, N 2 100sccm ~ 3000sccm, Ar 10sccm ~ 500sccm, deposition temperature is 300 ℃ ~ 700 ℃, deposition pressure is 1torr ~ 20torr, RF power is deposited by excitation of plasma in the range of 100W ~ 1KW It is characterized by.
위와 같이 이루어진 본 발명은 CVD챔버로 공급되는 증착가스중 TiCl4와 SiH4가스의 라인을 각각 독립적으로 구성하여 사전에 라인내에서 혼합되어 부산물에 의한 결함발생 및 라인의 막히는 현상을 줄이도록 하였으며 Ar를 분위기 가스로 소스가스들이 플라즈마 상태를 유지할 수 있도록 하여 증착가스의 유량을 적절히 조절함으로써 TiN/TiSiX/Si3N4의 3상 혼합구성 비율을 조절하여 층덮힘이 우수할 뿐만 아니라 결정입계가 없는 비정질 구조의 확산방지력 및 내산화 특성이 우수한 타이타늄실리나이트라이드막을 증착할 수 있도록 한다.In the present invention made as described above, the lines of TiCl 4 and SiH 4 gas among the deposition gases supplied to the CVD chamber are independently configured to reduce the occurrence of defects by the by-products and the clogging of the lines. By controlling the flow rate of the deposition gas by allowing the source gases to maintain the plasma state as an atmosphere gas, the three-phase mixed composition ratio of TiN / TiSi X / Si 3 N 4 is adjusted to provide excellent layer coverage and grain boundaries. It is possible to deposit a titanium silicide nitride film having excellent diffusion preventing ability and oxidation resistance of an amorphous structure.
이하, 본 발명의 바람직한 실시예를 첨부된 도면을 참조하여 설명한다. 또한 본 실시예는 본 발명의 권리범위를 한정하는 것은 아니고, 단지 예시로 제시된 것이다.Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings. In addition, this embodiment is not intended to limit the scope of the present invention, but is presented by way of example only.
CVD TiSiN박박을 증착하기 위한 증착가스로는 TiCl4(타이나늄 테트라클로라이드), SiH4(사일렌), H2, N2, Ar을 이용하여 증착한다. 증착온도는 300℃∼700℃,증착압력은 1torr∼20torr의 범위이며 RF파워는 100W∼1KW의 범위에서 플라즈마여기증착방법으로 수행한다. 위와 같은 증착가스의 공정유량은 TiCl41sccm∼100sccm, SiH41sccm∼300sccm, H2100sccm∼5000sccm, N2100sccm∼3000sccm, Ar 10sccm∼500sccm의 범위에서 수행한다.As a deposition gas for depositing CVD TiSiN foil, TiCl 4 (titanium tetrachloride), SiH 4 (xylene), H 2 , N 2 , and Ar are deposited. The deposition temperature is 300 ° C to 700 ° C, the deposition pressure is in the range of 1torr to 20torr, and the RF power is performed by the plasma excitation deposition method in the range of 100W to 1KW. Process flow rate of the deposition gas as described above is carried out in the range of TiCl 4 1sccm ~ 100sccm, SiH 4 1sccm ~ 300sccm, H 2 100sccm ~ 5000sccm, N 2 100sccm ~ 3000sccm, Ar 10sccm ~ 500sccm.
CVD챔버의 가스라인 구성은 특히 TiCl4와 SiH4가 가스 라인내에서 사전에 혼하되어 부산물에 의한 파티클발생 및 라인 막힘을 방지하기 위하여 다른 독립된 라인으로 각각 흘러가도록 구성한다.The gas line configuration of the CVD chamber is particularly configured such that TiCl 4 and SiH 4 are premixed in the gas line and flow into different independent lines to prevent particle generation and line clogging by by-products.
상기와 같은 방법에 의하여 증착된 Ti-Si-N박막에서 Ti기는 TiCl4에서, Si기는 SiH4에서, N기는 N2에서 각각 유래한다. Ar은 각각의 가스 소스들이 플라즈마 상태를 유지할 수 있도록 분위기 가스 역할을 한다.In the Ti-Si-N thin film deposited by the above method, the Ti group is derived from TiCl 4 , the Si group is derived from SiH 4 , and the N group is derived from N 2. Ar serves as an atmosphere gas so that each gas source can maintain a plasma state.
상기의 반응에 의하여 형성되는 박막은 TiSixN1-x의 형태이며, 이때 x의 범위는 0.1 < x < 0.9이다. 증착된 박막의 구성상을 보면 TiN/TiSix/Si3N4의 3상이 일정비율로 혼합구성된 형태를 취한다. 여기서 3상 혼합상의 구성 비율은 각 증착가스의 유량을 적절히 변경하므로써 원하는 조성상을 얻을 수 있다.The thin film formed by the above reaction is in the form of TiSi x N 1-x , where x is in the range of 0.1 <x <0.9. In the configuration of the deposited thin film, three phases of TiN / TiSi x / Si 3 N 4 are mixed and formed in a constant ratio. Here, the composition ratio of the three-phase mixed phase can obtain a desired composition phase by appropriately changing the flow rate of each vapor deposition gas.
결국 상기 혼합상은 층덮힘이 우수할 뿐만 아니라 결정입계가 없는 비정질 구조로서 확산 방지력 및 내산화 특성이 우수한 특성을 갖게 된다.As a result, the mixed phase not only has excellent layer covering but also has an amorphous structure having no grain boundary and excellent diffusion preventing power and oxidation resistance.
상기한 바와 같이 본 발명은 CVD방법으로 3원계물질인 타이타늄실리나이트라이드막을 제조함으로써 깊고 좁은 콘택에서도 층덮힘이 우수할 뿐만 아니라 결정입계가 없는 비정질 구조로서 확산방지력이 우수하여 반도체 제조공정중 커패시터 전극의 확산방지막, 메탈콘택의 확산방지막, 비트라인의 콘택의 확산방지막 등에 사용가능하고, 내산화 특성이 우수한 이점이 있다.As described above, the present invention is not only excellent in layer covering even in deep and narrow contacts, but also in the deep and narrow contact by manufacturing the titanium silicide film, which is a tertiary material, by the CVD method. It can be used for the diffusion barrier of an electrode, the diffusion barrier of a metal contact, the diffusion barrier of a contact of a bit line, etc., and has the advantage that it is excellent in oxidation resistance.
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US20140054775A1 (en) * | 2012-08-27 | 2014-02-27 | Taekjung Kim | Semiconductor devices including metal-silicon-nitride patterns and methods of forming the same |
CN103633093A (en) * | 2012-08-27 | 2014-03-12 | 三星电子株式会社 | Semiconductor devices including metal-silicon-nitride patterns and methods of forming the same |
US9099473B2 (en) | 2012-08-27 | 2015-08-04 | Samsung Electronics Co., Ltd. | Semiconductor devices including metal-silicon-nitride patterns |
US9583440B2 (en) | 2012-08-27 | 2017-02-28 | Samsung Electronics Co., Ltd. | Semiconductor devices including metal-silicon-nitride patterns |
CN103633093B (en) * | 2012-08-27 | 2018-07-03 | 三星电子株式会社 | Semiconductor devices including metal-silicon-nitride pattern and forming method thereof |
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