KR20010048799A - apparatus for switch expanding in switching system - Google Patents

Abstract

PURPOSE: A switch expansion apparatus of an exchanger is provided to expand a capacity of a switch without changing a capacity of a bus by constructing two switch boards, two CBUSs and two ABUSs and switching or discarding a cell transmitted through the CBUS according to switching by a corresponding switch board. CONSTITUTION: A switching discriminating units(11,21) determines whether a received cell is to be switched in corresponding switches(17,27) on the basis of a header of the cell received through the first and second CBUSs from line connecting units(30-1,...,30-6). The first RAMs(13,23) include a 32 bit data bus and store a switching table indicating that a corresponding cell has been switched or not. The second RAMs(15,25) includes two 64 bit RAMs and store a cell to be switched in corresponding switches(17,27). The switches(17,27) switch the cell provided from the second RAMs(15,25) and transmits it through the first and second ABUSs to the line connecting units(30-1,...,30-6). The line connecting units(30-1,...,30-6) receive the cell to be switched from an external source and outputs a switched cell. A clock and SOC generating unit(40) generates a clock and a start of cell(SOC) and provides them.

Description

Switch for switching expansion in a switch

TECHNICAL FIELD The present invention relates to a switch expansion device of an exchanger, and more particularly, to a switch expansion device of an exchanger that enables expansion of a switch capacity without changing a capacity of a bus.

In general, a switch in a switch performs a function of exporting an input message to an output link determined by a network path selection strategy. As shown in FIG. 1, one line connection unit 5-1, ..., 5 If there is a cell to be switched in -6), the cell is loaded on the CBUS, and the cell loaded on the CBUS enters the switch section 3 and passes through the corresponding bus connections 5-1, ..., 5- Go to 6).

In FIG. 1, CBUS transmits a cell for switching in the line connection portions 5-1, ..., 5-6 to the switch portion 3, and ABUS transfers the cell passing through the switch portion 3 to the line connection portion ( 5-1,…, 5-6). The line connection units 5-1, ..., 5-6 receive cells for switching from the outside, and output the switched cells to the outside, and the clock and SOC generator 7 stores the clock and SOC ( Generate and supply Start Of Cell.

As described above, when loading data on the CBUS, the capacity of the entire cell cannot exceed the total capacity of the CBUS, and the capacity of the CBUS must not exceed the capacity of the switch unit 3 for switching the cells coming in from the CBUS, and passes through the switching. When one cell moves to line connections 5-1, ..., 5-6, the capacity of the entire cell must not exceed ABUS.

That is, the switch capacity of the entire system is determined to be the lowest among ABUS, CBUS, and the switch section 3.

For example, even if the capacity of the switch unit 3 becomes 5G, if the capacity of the bus is only 2.5Gbytes, the overall capacity is limited to 2.5Gbytes. On the contrary, even if the capacity of the bus becomes 5Gbytes, the capacity of the switch unit 3 is increased. If only 3Gbytes, the overall capacity will be limited to 3Gbytes.

In addition, it is necessary to redesign the entire CBUS according to the type of the line connection parts 5-1, ..., 5-6, and the position and number of insertions. In the line connection parts 5-1, ..., 5-6, A is 25 Mbytes. If B is mixed with 100 Mbytes, B must modify the bus so that B can send a cell four times while A sends one cell from an overall CBUS perspective.

As described above, in the related art, since the switch capacity of the entire system is determined according to the capacity of the switch and the capacity of the bus, there are many difficulties in expanding the line connection. In addition, there is a problem in that the entire CBUS needs to be redesigned according to the type of the line connection portions 5-1, ..., 5-6, and the position and number of insertions.

The present invention has been made to solve the above-described problem, by configuring two switch boards, CBUS, ABUS each of the cells received through the CBUS by switching or discarding according to whether or not switching in the switch board, the capacity of the bus It is an object of the present invention to provide a switch expansion device of an exchanger that enables expansion of a switch capacity without changing.

1 is a diagram showing a configuration of a switch device of a conventional exchanger.

2 is a diagram showing the configuration of a switch expansion device of an exchange according to the present invention;

*** Explanation of symbols for the main parts of the drawing ***

10. first switch unit, 20. second switch unit,

11, 21. Switching discrimination unit, 13, 23. First RAM,

15, 25. 2nd ram, 17, 27. switch,

30-1,... , 30-6. Line connection, 40. Clock and SOC generator

The switch expansion device of the exchange of the present invention for achieving the above object comprises: a plurality of switch units for determining whether or not to switch the received cell, and switching or discarding the cell according to the determination result; A plurality of line connection units receiving cells for switching from the outside and outputting the switched cells to the outside; An input bus configured to correspond to the switch unit and transmitting a cell for switching inputted to the line connection unit to each switch unit; It is configured to correspond to the switch unit, and comprises an output bus for transmitting the cell passing through each switch unit to the corresponding line connection.

The switch unit may include: a first memory unit having a switching table configured to store data indicating whether a cell received from the line connection unit is switched; A switching determination unit that reads the data from the first memory unit by using an address calculated by referring to the header of the cell, and determines whether to switch the cell in the corresponding switch unit based on the read data; ; A second memory unit for receiving and storing a cell to be switched in the switch unit from the switching determination unit; And a switch for switching a cell provided from the second memory unit and transmitting the cell to the corresponding line connection unit through the output bus.

The address may be calculated based on the number of virtual paths, the number of virtual channels, the total number of slots, the number of ports per board, and the size of the first memory unit.

Hereinafter, with reference to the accompanying drawings will be described in detail with respect to the switch expansion device of the exchanger according to a preferred embodiment of the present invention.

2 is a view showing the configuration of a switch expansion device of the exchanger according to the present invention. As shown in FIG. 2, the switch expansion device of the exchanger according to the present invention includes a first switch unit 10, a second switch unit 20, a first ABUS, a first CBUS, a second ABUS, and a second CBUS. And a line connection unit 30-1, ..., 30-6, and a clock and SOC generator 40.

In such a configuration, the configuration and operation of the first switch unit 10 and the second switch unit 20 are the same, and the switches 17 and 27, the switching discrimination units 11 and 21, and the first switch unit 10 are the same. The ram 13 and 23 and the 2nd ram 15 and 25 are comprised.

Here, the switching determination units 11 and 21 refer to the headers of the cells transmitted from the line connection units 30-1,..., And 30-6 through the first CBUS / second CBUS and transmit the received cells with the corresponding switches 17, 27. ), The first RAMs 13 and 23 have a 32-bit data bus, store a switching table indicating whether the corresponding cell is switched, and the second RAMs 15 and 25. ) Is composed of two 64-bit RAMs, and the cells to be switched in the corresponding switches 17 and 27 are stored, and the switches 17 and 27 switch the cells provided from the second RAMs 15 and 25 to the first ABUS. / 2ABUS to the corresponding line connection unit 30-1, ..., 30-6.

As described above, the switching determination units 11 and 21 may refer to the header of the cell transmitted from the line connection units 30-1,..., And 30-6 through the first CBUS / second CBUS and then receive the received cell. It is determined whether the switch 17, 27 should be switched, the switching determination unit 11, 21 refers to whether the corresponding cell stored in the first RAM (13, 23) by referring to the header of the cell The address of the switching table is calculated, and data indicating whether the corresponding cell is switched is read from the switching table of the first RAMs 13 and 23 by using the calculated address, and the line connection units 30-1,. It is determined whether the cell received from the switch should be switched in the corresponding switches 17 and 27.

As shown in Equation 1, the address of the switching table includes the number of virtual paths (VPs), the number of virtual channels (VCs), the total number of slots, and the number of ports per board, as used in the corresponding switch. And the size of the first RAMs 13 and 23 in which the switching table is stored.

For example, VP 5 bits, VC 9 bits are used, the maximum available slot is 16 (4 bits), 6 ports (3 bits), and the first RAM is 32 bits (32 → 2 ⁵ ). In the case of the configuration, the address of the switching table indicating whether the corresponding cell is switched is (5 + 9 + 4 + 3-5 =) 16 by Equation 1.

As described above, when the address of the switching table is calculated, the switching determination units 11 and 21 use the calculated address to indicate whether the corresponding cell is switched in the switching table stored in the first RAMs 13 and 23. If the read data is 1, the cell is switched in the corresponding switches 17 and 27. If the read data is 0, the cell is discarded without switching in the switches 17 and 27.

As described above, the second RAMs 15 and 25 are configured by two 64-bit RAMs, and store the cells to be switched in the corresponding switches 17 and 27 in the second RAMs 15 and 25. The cells to be switched in the stored corresponding switches 17 and 27 are applied to the corresponding switches 17 and 27 and switched, and then move to the corresponding line connection parts 30-1, ..., 30-6 through the first ABUS / second ABUS. Will be

Pointer management of the two reads and writes is performed by the switching determination units 11 and 21, and these pointers mean corresponding address values of the second RAMs 15 and 25, respectively.

The second RAMs 15 and 25 operate by dividing the clock in half in one SOC. For example, when the time for storing one cell requires eight clocks, the first four clocks are used. While the first 64-bit RAM performs the write operation, the second 64-bit RAM performs the read operation, and during the next four clocks, the first 64-bit RAM performs the read operation and the second 64-bit RAM performs the write operation.

The processing speed of the second RAMs 15 and 25 must be greater than the first CBUS + the second CBUS.

The pointer management described above initially has a write pointer and a read pointer having a value of '0', and if a cell is stored in one of the second RAMs 15 and 25, the write pointer is incremented by one and the counter is set to '1'. Is increased. If the counter is not zero, it reads the data in the read pointer to send the cell to the corresponding switches 17 and 27, increments the read pointer by one and decrements the counter by '1'. Here, when the write pointer and the read pointer are incremented and all bits become '1' at any one time, when one is increased, all bits are converted to '0'.

On the other hand, the first CBUS and the second CBUS transmit the cells for switching in the line connection units 30-1,..., 30-6 to the switching discriminating units 11, 21 provided in the switch units 10, 20. The first ABUS and the second ABUS transmit the cells passing through the first switch unit 10 / second switches 17 and 27 to the line connection units 30-1, ..., 30-6.

The line connection units 30-1,..., And 30-6 receive cells for switching from the outside, output the switched cells to the outside, and the clock and SOC generator 40 sets the clock and SOC (Start Of). Cells are generated and supplied.

Looking at the operation of the switch expansion device of the exchange according to the present invention.

For example, if there is a cell to switch to the line connection unit 30-1, the line connection unit 30-1 is associated with the clock and SOC generation unit 40 to transfer the cell to the first CBUS during the corresponding CBUS occupancy time. It is loaded. In this way, the cell loaded on the first CBUS is transmitted to the switching determination units 11 and 21 provided in the first switch unit 10 and the second switch unit 20, and the line connection unit 30- is connected via the first CBUS. Each of the switching determination units 11 and 21 receiving the cell from 1) calculates an address of the switching table in which data indicating whether the received cell is switched is stored with reference to the header of the received cell.

As described above, each of the switching determination units 11 and 21 calculating the address of the switching table uses the calculated address to provide data indicating whether the corresponding cell is switched in the switching table of the first RAM 13 and 23. When the data read by the switching determination unit 11 is 1 as a result of reading data from each switching determination unit 11 and 21, the cell received from the line connection unit 30-1 is switched to the first switch. Since the unit 10 needs to switch, the cell received is stored in the second RAM 15 and stored. If the data read from the switching determination unit 21 is 0, the cell is transmitted from the line connection unit 30-1. Since the second switch unit 20 does not have to switch, the corresponding cell is discarded.

As described above, when the cell 17 transmitted from the line connection unit 11 needs to be switched by the switch 17, the received cell is stored in the second RAM 15, and the cell is stored in the second RAM 15. If stored, increment the write pointer and counter by one, and if the counter is not zero, i.e. if there is a cell stored in the second RAM 15, the data in the read pointer is read to send the cell to the switch 17. Increments the read pointer by one and decrements the counter by one.

As described above, the cell stored in the second RAM 15 is transmitted to the switch 17, and the cell transmitted to the switch 17 is switched in the switch 17 and then the circuit connection unit 30-1 through the first ABUS. , 30-2, 30-3).

On the other hand, the cell passing through the switch 27 of the second switch unit 20 is transmitted to the line connection unit 30-4, 30-5, 30-6 via the second ABUS.

The switch expansion device of the exchanger of the present invention is not limited to the above-described embodiment, and can be implemented in various modifications within the range permitted by the technical idea of the present invention.

According to the switch expansion device of the exchange of the present invention as described above, by configuring two switch boards, CBUS, ABUS, respectively, the cells received through the CBUS by switching or discarding according to whether or not to switch in the corresponding switch board, There is an effect that can extend the capacity of the switch without changing the capacity.

And by switching the whole half with one switch board, it becomes easy to control according to the kind of line connection part.

Claims (3)

A plurality of switch units which determine whether to switch the received cell and whether to switch or discard the cell according to the determination result; A plurality of line connection units receiving cells for switching from the outside and outputting the switched cells to the outside; An input bus configured to correspond to the switch unit and transmitting a cell for switching inputted to the line connection unit to each switch unit; And an output bus configured to correspond to the switch unit, and configured to transmit a cell passing through each switch unit to a corresponding line connection unit. The method of claim 1, wherein the switch unit, A first memory unit having a switching table for storing data indicating whether a cell received from the line connection unit is switched; A switching determination unit that reads the data from the first memory unit by using an address calculated by referring to the header of the cell, and determines whether to switch the cell in the corresponding switch unit based on the read data; ; A second memory unit for receiving and storing a cell to be switched in the switch unit from the switching determination unit; And a switch configured to switch a cell provided from the second memory unit to transmit the cell to the corresponding line connection unit via the output bus. The method of claim 2, wherein the address is, And the number of virtual paths, the number of virtual channels, the total number of slots, the number of ports per board, and the size of the first memory unit.