KR20010014859A - Manufacturing method of cylindrical-capacitor lower electrode - Google Patents

Abstract

PURPOSE: A method for manufacturing a lower electrode of a cylindrical capacitor is provided to protect a conductive layer by removing an unnecessary photoresist except an outside of a cylindrical capacitor hole for a photoresist in an inside of the cylindrical capacitor hole. CONSTITUTION: An interlayer dielectric(102) is formed on a semiconductor substrate(101). A concave portion for molding a lower electrode is opened on a predetermined region of the interlayer dielectric(102). A conductive layer(107) is formed on the interlayer dielectric(102) including an inner face of the concave portion. A photoresist(108) is applied on the conductive layer(107) to bury the concave portion. The photoresist(108) on the conductive layer(107) except for the photoresist(108) of the concave portion is exposed. The photoresist(108) on the conductive layer(107) except for the photoresist(108) of the concave portion is removed selectively. The conductive layer(107) on the interlayer dielectric(102) except for the photoresist(108) of the concave portion is removed by performing an etching process. The photoresist(108) is removed from the concave portion.

Description

MANUFACTURING METHOD OF CYLINDRICAL-CAPACITOR LOWER ELECTRODE

The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a lower electrode of a cylindrical capacitor used in a semiconductor device.

With the tendency of the cells of Dynamic Random Access Memory (DRAM) to shrink, a cylindrical capacitor has been proposed from the necessity of forming a capacitor having a capacity required for a limited footprint. Conventionally, a cylindrical capacitor is formed as follows.

2 is a cross-sectional view sequentially showing steps of a method of manufacturing a cylindrical capacitor according to the first conventional technique.

An interlayer insulating film 202 and an etching stopper 204 are formed on the semiconductor substrate 201, and a conductor plug 203 is formed to be electrically connected to the semiconductor substrate 201, and a conventional chemical vapor deposition (CVD) is performed. The spacer insulating film 205 is formed over the semiconductor substrate by the technique. Again, by using conventional photolithography and etching techniques, a cylindrical capacitor hole 206 serving as a mold of the lower electrode of the cylindrical capacitor is formed, and is subsequently formed on the front surface including the inner wall and the bottom of the cylindrical capacitor hole 206. In the step of forming the amorphous silicon 207 to be the lower electrode of the cylindrical capacitor (the step up to a in Fig. 2).

Next, in order to remove the unnecessary conductive film except for the region serving as the lower electrode of the cylindrical capacitor, a suitable etching protective material 208 is applied on the entire surface of the semiconductor substrate so as to embed the hole for the cylindrical capacitor 206 (above in FIG. 2). steps up to b).

As an etching protective material 208 that protects the inside of a cylindrical capacitor hole-shaped conductive film in plasma etching of the conductive film, for example, a silicon oxide film system (organic SOG (spin with excellent embedding characteristics) -On-Glass), inorganic SOG or CVD oxide film) and photoresist have been studied. Among them, the method of using a photoresist is drawing attention as a method that can be easily realized at a relatively low cost.

Next, the development process is performed and the exposed photoresist 208 is removed (the steps up to FIG. 2C).

Next, plasma etching is performed to remove the unnecessary amorphous silicon 207 on the surface of the semiconductor substrate (the steps up to d in FIG. 2).

Finally, the entire surface is etched by the conventional method to remove the spacer insulating film 205 (up to step e of FIG. 2).

In this embodiment, silicon grains 209 are formed on the inner and outer walls of the lower electrode of the cylindrical capacitor using a hemispherical grain (HSG) technique.

In the manufacturing method of the cylindrical capacitor, the photoresist inside the hole for the cylindrical capacitor remains as much as possible, and the photoresist outside the hole for the cylindrical capacitor has been completely removed. The above reason is that since the positive photoresist remaining on the surface of the semiconductor substrate also acts as a mask, it causes unnecessary residue of the conductive film during etching of the conductive film and shortens the yield between the lower electrodes of the cylindrical capacitor. On the contrary, if there is little photoresist remaining in the cylindrical capacitor hole, even the conductive film of the inner wall of the cylindrical capacitor hole is damaged by the plasma in the next plasma etching step of the conductive film.

In order to completely remove photoresist outside the cylindrical capacitor hole, conventionally, a method of completely exposing unnecessary photoresist on the surface of a semiconductor substrate is set by setting the exposure dose amount at the time of full exposure to a level of overexposure. However, the conventional positive photoresist is designed such that the amount of remaining photoresist film after development is rapidly reduced (photosensitive) at a certain exposure dose amount. Therefore, since it is difficult to control the exposure dose and overexposure, it is not possible to ensure a sufficient amount of the photoresist residual film for protecting the conductive film inside the cylindrical capacitor hole. There arises a problem that the conductive film on the bottom surface is also etched.

In order to solve the above problem, Japanese Patent Application Laid-Open No. 9-331043 discloses a relationship between the exposure dose amount and the photoresist residual film by reducing the sensitivity of the positive photoresist ((amount of change in photoresist film thickness) / (exposure dose)). A second conventional technique is disclosed in which the exposure dose amount control is facilitated by smoothing the inclination of the sensitivity profile showing the amount of change of the amount) = γ).

The second conventional technique is very effective when used for the purpose of protecting the bottom of the cylindrical capacitor hole during plasma etching of the conductive film. However, in the case of using a photoresist with a lower sensitivity, it is necessary to adjust the dedicated photoresist in the above step, which is not so good in terms of cost.

In addition, according to the second conventional technology, it is disadvantageous in terms of throughput since it is necessary to make the sensitivity of the photoresist sufficiently low and lengthen the exposure time in order to precisely control the exposure dose amount.

In addition, since incident light enters vertically, light penetrates to the bottom of the cylindrical capacitor hole and the photoresist retreats essentially.

In either of the first conventional technique and the second conventional technique, some problems arise in subsequent steps in the conductive film exposed from the photoresist as a result of overexposure.

That is, the inner wall of the cylindrical capacitor hole exposed from the photoresist is exposed to the plasma during the plasma etching of the conductive film, and thus the upper end of the hole for the cylindrical capacitor is tapered (Fig. 2E). It is known that the part is very thin and mechanically fragile and therefore easily broken away into particles in subsequent cleaning steps and the like. In addition, there is a problem that the reliability is reduced by the electric field concentration because it is sharp and pointed.

The problem that the conductive film on the upper end of the cylindrical capacitor hole becomes tapered becomes particularly remarkable when the initial film thickness of the conductive film serving as the lower electrode of the cylindrical capacitor becomes 80 nm or less.

By the way, one of the technologies that are widely used as a technique for increasing the surface area in recent years is the HSG technology. The technique anneals amorphous silicon in an inert atmosphere or high vacuum in the transition temperature range between amorphous and crystal, and utilizes the surface migration of silicon atoms to crystallize hemispherical or mushroom-like grains around the crystal nuclei formed on the surface. In order to increase the surface area of an electrode, it is the technique attracting attention recently.

However, in the case of combining the HSG technique with the manufacturing method of the cylindrical capacitor according to the conventional technique, it is difficult to form HSG on the surface of the amorphous silicon once the amorphous silicon is exposed to the plasma during plasma etching of the conductive film. Was found.

It is known that the energized impurity ions in the plasma penetrate (knock-on) to a depth of about several nm of the amorphous silicon surface, thereby inhibiting the surface migration of silicon atoms during annealing. HSG technology is useful for increasing the capacitance of capacitors and has become an important technology in the manufacture of next-generation semiconductor memory devices. If the HSG technology cannot be applied to the capacitor lower electrode surface, it is considered to be a big disadvantage in manufacturing a semiconductor memory device having a required integration degree.

In the related art, when forming the lower electrode of the cylindrical capacitor in the semiconductor memory device, the light is exposed using vertical light, so that the photoresist for protecting the conductive film cannot be sufficiently left inside the cylindrical capacitor hole. Occurs. Thus, the present invention provides a method of removing unnecessary photoresist while protecting the conductive film by leaving sufficient photoresist inside the hole for the cylindrical capacitor to manufacture a cylindrical capacitor used in the next-generation semiconductor memory device with high quality with constant quality. The purpose.

The present invention provides a method for manufacturing a lower electrode of a cylindrical capacitor used in a semiconductor substrate,

The invention comprises the steps of forming an interlayer insulating film on a semiconductor substrate on which a semiconductor element is formed;

Opening a recess serving as a mold of the lower electrode of the cylindrical capacitor in a predetermined region of the interlayer insulating film;

Forming a conductive film on the interlayer insulating film including the recessed inner wall while maintaining a recessed shape;

Applying a thick conductive film with a positive photoresist to fill the recess;

An exposure step of leaving the photoresist in the recess and photosensitive the photoresist on the conductive film;

A developing step of leaving the photoresist in the recess and selectively removing the photoresist on the conductive film;

An etch-back step of leaving the conductive film inside the recess and selectively removing the conductive film on the interlayer insulating film by etching;

A peeling step of removing the photoresist in the recess;

In the exposing step, exposure is performed such that the inclined incident light component is substantially main in at least the normal direction of the semiconductor substrate in the region where the lower electrode is formed.

In the exposure light used in the exposing step, it is preferable that a light beam having an inclination angle of 10 degrees or less with respect to the normal direction of the semiconductor substrate not exceeding 50% of the total incident light incident on the semiconductor substrate. More preferably, the light rays within 10 degrees with respect to the normal direction of the semiconductor substrate do not exceed 30% of the total incident light incident on the semiconductor substrate. Incidentally, in the exposing step, the inclined incident light used for the exposure may use inclined light composed of light rays of 10 degrees or more with respect to the normal direction of the semiconductor substrate.

By exposing the hole for the cylindrical capacitor according to the above-described method, it is possible to leave a sufficient amount of photoresist inside the hole, thereby protecting the metal film for the lower electrode of the cylindrical capacitor.

In the exposing step, various mechanisms may be used.

For example, in the exposing step, the incident light is scanned in a straight line on the semiconductor substrate, and by a mechanism for moving the semiconductor substrate in a direction perpendicular to the scanning direction of the incident light in a plane including the semiconductor substrate in synchronization with this. Exposure may be performed.

Moreover, it is also possible to collectively expose all the semiconductor elements which exist on a semiconductor substrate by parallel light. Moreover, when exposing using a wide parallel light, it is also possible to rotate and expose a semiconductor substrate.

Moreover, it is more preferable to perform exposure by a reduction projection exposure apparatus. In this case, it is preferable that the condition of the optical system of the reduction projection exposure apparatus is NA? 0.5, and? Is 1??? In addition, in the case of performing exposure using a reduction projection exposure apparatus, it is even more preferable to further insert a filter for limiting the angle of incidence of incident light into the optical system, excluding light components close to vertical incidence.

Here, NA denotes the numerical aperature of the reduction lens on the side of the semiconductor substrate, sigma is the ratio of NA of the collimating lens and the reduction lens on the reticle side and an amount related to the spatial frequency dependence of the light contrast. to be.

In addition, any one of the above-described manufacturing methods can be suitably applied to the manufacturing method of the semiconductor device. The present invention provides a manufacturing method and a semiconductor device manufactured using the manufacturing method.

1 is a schematic cross-sectional view sequentially showing the steps of a method of manufacturing a lower electrode of a cylindrical capacitor according to the present invention.

2 is a schematic cross-sectional view sequentially illustrating the steps of a method of manufacturing a lower electrode of a cylindrical capacitor according to the prior art;

FIG. 3A is a cross-sectional view of the cylindrical capacitor immediately before the exposure step, FIG. 3B is a graph showing the relationship between the photoresist residual film thickness and the exposure dose amount according to the first conventional technique, and FIG. It is a graph which shows the relationship between the photoresist residual film thickness and exposure dose amount by a 2nd prior art, and FIG.3d shows the relationship between the photoresist residual film thickness and exposure dose amount in this invention. That puff.

4A is a schematic diagram of the first embodiment, and FIG. 4B is a graph showing the angular distribution of incident light of the first embodiment.

5A is a schematic diagram of the second embodiment, and FIG. 5B is a graph showing the angular distribution of incident light of the second embodiment.

FIG. 6A is a schematic diagram of the third embodiment, and FIG. 6B is a graph showing the angular distribution of incident light of the third embodiment.

Fig. 7A is a schematic diagram of the fourth embodiment, and Fig. 7B is a graph showing the angular distribution of incident light of the fourth embodiment.

FIG. 8A is a schematic diagram of the fifth embodiment, and FIG. 8B is a graph showing the angular distribution of incident light of the fifth embodiment.

9 is a graph showing aspect ratio dependence of light intensity at the center of a cylindrical capacitor.

<Brief description of the major symbols in the drawings>

101, 201: semiconductor substrate 102, 202: interlayer insulating film

103,203: conductor plug 104,204: etching stopper

105, 205: spacer insulating film 106, 206: hole for cylindrical capacitor

107 and 207: conductive film (amorphous silicon)

108, 208: photoresist (etching protective material)

109, 209: HSG 309: photoresist film thickness

310: hole depth for cylindrical capacitors

311: over-exposure photoresist film thickness

401, 502, 605, 711: semiconductor substrate

402: polycon mirrors 403, 503, 609: oblique incident light

404, 504, 608: incident angle θ 501, 606: stage

601, 702: light source 602: condenser lens

603: shutter 604, 706: condenser lens

607: rotation axis 701: reflector

703: relay lens 704: optical-integrator

705: σ aperture 707: reticle

708: Projection Lens 1 709: NA Aperture

710: Projection Lens 2 812: Perpil Filter 1

813: Perfill Filter 2

In the present invention, the photoresist is exposed using substantially inclined incident light to achieve protection of the metal film serving as the internal electrode for the cylindrical capacitor. Since the cylindrical capacitor hole has a relatively large aspect ratio of 2 to 4, the oblique incident light is blocked by the cylindrical capacitor hole and does not penetrate beyond the depth where the cylindrical capacitor hole exists. Therefore, exposure of the photoresist inside the cylindrical capacitor hole can be avoided. The angle of incidence range of incident light depends largely on the aspect ratio (hole depth / hole diameter) of the hole for the cylindrical capacitor. Commonly used holes for cylindrical capacitors have an aspect ratio of 2 to 4, with an aspect ratio of 2 or more, the exposure light or the semiconductor substrate of which light having an incident angle of 10 ° or more with respect to the normal direction of the semiconductor substrate is 50% or less of the total incident light incident on the semiconductor substrate. The inventors have experimentally found that it is possible to leave a sufficient amount of photoresist inside a cylindrical capacitor by exposing the light for an appropriate time using an exposure light having an angle of 10 ° or more in the normal direction.

Although the above-mentioned reasons are not clear, since the hole diameter is small and does not differ greatly from the wavelength of the exposure light, the photoresist inside the hole for the cylindrical capacitor is tilted by only 10 ° from the normal due to the light scattering and diffraction effects. It is thought that the exposure of is suppressed.

More preferably, 15 degrees or more of exposure light is used with respect to the normal direction of a semiconductor substrate, Most preferably, 25 degrees or more of exposure light is used with respect to the normal direction of a semiconductor substrate. 3A is a cross-sectional view of the cylindrical capacitor immediately before the exposure step. Here, D 309 is a height measured from the bottom surface of the cylindrical capacitor hole for the thickness of the photoresist applied to the semiconductor substrate. Ds 310 is the depth of the hole for the cylindrical capacitor. D 311 shows the photoresist film thickness for overexposure described later. Other indicators are the same as in FIG. 1.

FIG. 3B shows the exposure dose amount (horizontal axis) and photoresist residual film thickness (vertical axis) according to the first conventional technique using the above-mentioned vertical incident light and using a photoresist having moderate sensitivity as a hole protective material for a cylindrical capacitor. Shows the relationship between Here, D represents the height measured from the bottom of the cylindrical capacitor of the coated photoresist, as shown in FIG. Ds represents the depth of the hole for the cylindrical capacitor.

Hereinafter, the exposure dose amount which removes the photoresist only on the semiconductor substrate surface is set to E1.

However, considering that the film thickness of the photoresist is disturbed, overexposure e as much as removing the photoresist corresponding to the film thickness d is performed to prevent the remaining of the resist. Then, the exposure dose amount E2 irradiated to a semiconductor substrate is shown by the following formula | equation.

E2 = E1 + e

In addition, considering the variation in the exposure amount of the width W, E2 becomes as follows.

E2 = E1 + e + W / 2 ± W / 2

When the range of the exposure dose is applied to FIG. 1, the amount of residual photoresist inside the hole can be estimated in the range of 0 to Da1.

In the first conventional technique, since the photoresist residual amount contains 0, there is a possibility that all of the photoresist inside the hole for the cylindrical capacitor is removed. It also means that a deviation occurs in the height of the conductive film exposed from the photoresist between the holes for the cylindrical capacitor and between the treatment lot. This deviation is one cause of lowering the yield of the product in subsequent steps.

Fig. 3C shows the relationship between the exposure dose and the photoresist residual film thickness in the case where a photoresist with reduced sensitivity is used according to the second conventional technique (method of Japanese Patent Laid-Open No. 6-991043). .

The exposure amount can be calculated in the same manner as in the first conventional technique, but since the sensitivity of the photoresist is low, the exposure amount necessary for exposing the film thickness d for the overexposure becomes f unlike the first conventional technique.

In addition, as in the first conventional technique, when the variation W in the exposure amount is taken into consideration, the exposure amount received by the photoresist in the second conventional technique is in the following range.

E2 = E1 + f + W / 2 ± W / 2

The amount of photoresist remaining in the exposure range is Dal to Db2 (refer to c of FIG. 3), and in the worst case, the first conventional technique is that the resist can be left as much as Db2 inside the hole for the cylindrical capacitor. Better than

However, since vertical incident light is used, even if the lowest, the film thickness d (over exposure) cannot be prevented from being exposed and reduced.

According to the present invention, a case where exposure is performed using inclined incident light using a normal photoresist is shown in FIG.

As in the case of the first conventional technique (b of FIG. 3) and the second conventional technique (c of FIG. 3), in order to completely eliminate unnecessary photoresist residue on the surface of the semiconductor substrate, the film thickness d is over The exposure is performed (the overexposure is equal to e as in the prior art). In that case, E2 becomes like the 1st prior art and is represented by the following formula | equation.

E2 = E1 + e + W / 2 ± W / 2

By the way, when the oblique incident light is used, the incident light for the overexposure is blocked by the cylindrical capacitor hole, and does not occur when the light penetrates deeper than the depth determined by the incident angle θ and the cylindrical capacitor hole diameter.

In Fig. 3d, the slope of the curve is gentle at E1. This indicates that the photoresist has been exposed to the deepest position allowed at that angle of incidence. It is thought that the region where the slant of E1 or more is loose is caused because the photoresist remaining inside the hole for the cylindrical capacitor is now left at a depth at which the exposure light cannot sufficiently enter. It is thought that the photoresist in this region is not exposed by direct light but is slowly exposed by indirect light of scattered light and reflected light.

For the same reason as above, even if the film thickness d is considered as the overexposure portion as in the first conventional technique, when an appropriate angle of incidence is selected, a photoresist having a sufficient height to protect the conductive film inside the hole for the cylindrical capacitor is formed. Remaining (d in FIG. 3). In addition, since the incident light is mechanically cut by the cylindrical capacitor hole, the deviation Da3 to Db3 of the film thickness of the photoresist residual film is reduced as compared with either of the first conventional technique and the second conventional technique, and the capacitor The quality is stable.

Example

(First embodiment)

In the present embodiment, a method of forming the lower electrode of the cylindrical capacitor will be described with reference to FIG. 1. First, as shown in a of FIG. 1, on a semiconductor substrate 101 on which a semiconductor element (not shown) is formed, NSG (Non-doped Silica Glass) serving as an interlayer insulating film 102 and an etching stopper 104. ) Is formed by the CVD method.

Next, the contact hole is opened at a predetermined position using a known lithography technique and an etching technique, and polycrystalline silicon containing impurities is deposited on the entire surface of the semiconductor substrate by CVD, followed by etching back to form a conductor plug 103. ).

Next, BOSG (Boro-phospho-Silicate Glass) was formed into a spacer insulating film 105 by CVD method, and then about 100 μm was deposited on the conductor plug 103 by using a known lithography technique and an etching technique. Open the hole leading up. Next, about 600 microseconds of amorphous silicon 107 containing phosphorus as an impurity is formed on the entire surface of the semiconductor substrate including the inner wall and the bottom of the cylindrical capacitor hole 106. Next, as shown in b of FIG. 1, the positive photoresist 108 is coated by about 1 μm without including the hole depth to fill the cylindrical capacitor hole 106, and is exposed. In addition, the cylindrical capacitor hole 106 is elliptical, has a depth of 1.2 m, a hole diameter of 0.4 m (long axis direction), and an aspect ratio of about 3. The incident angle of incident light is 45 degrees with respect to the normal direction of the semiconductor substrate surface, and the exposure dose is about 12OmJ / cm 2.

As a result of the exposure, a photoresist having a height of 0.95 µm can be left inside the hole having a depth of 1.2 µm, so that good exposure selectivity can be obtained.

In order to irradiate the oblique incident light to the semiconductor substrate, a mechanism as shown in Fig. 4A was used. That is, the laser beam is scanned in the Y-axis direction of the semiconductor substrate 401 by the polycon mirror 402, and the semiconductor substrate 401 is moved in the X-axis direction in synchronization with this to expose the entire surface of the semiconductor substrate.

The angle distribution of incident light in a present Example is shown in FIG. The peak is a peak at an angle corresponding to the incident angle θ.

Thereafter, as shown in Fig. 1D, the unnecessary amorphous silicon 107 existing on the entire surface of the semiconductor substrate is plasma etched away by a conventional method. Next, the photoresist in the cylindrical capacitor hole is removed by thermal sulfuric acid or the like, the spacer insulating film 105 is removed by hydrofluoric acid or the like, and the amorphous silicon 107 is subsequently shaped into a sidewall.

Next, the photoresist is stripped with hot sulfuric acid or the like, and the spacer insulating film 105 is removed with hydrofluoric acid.

Subsequently, as illustrated in FIG. 1E, the HSG 109 is formed on the inner and outer surfaces of the cylindrical silicon 107 processed by a known method.

In this embodiment, since the amorphous silicon 107 serving as the lower electrode of the cylindrical capacitor is protected from the plasma by the photoresist 108, the top of the amorphous silicon 107 is prevented from being sharpened in a tapered shape. Further, for the same reason, it becomes possible to form the silicon HSG 109 uniformly on the inner wall and the outer wall of the lower electrode of the cylindrical capacitor.

In this embodiment, the HSG 109 is selectively formed after the amorphous silicon film is formed in a cylindrical shape. However, when the HSG 109 is used only on the inner surface of the cylindrical capacitor, the HSG is simultaneously formed with the formation of the amorphous silicon film in the step of FIG. May be formed. In the present embodiment, the lower electrode of the cylindrical capacitor is formed of silicon, but not limited to silicon, it may be a conductive film such as metal such as TiN, WSi, ruthenium, or a conductive film of the above-mentioned laminated film.

Thereafter, the dielectric film and the upper electrode are formed to complete the cylindrical capacitor (not shown).

(2nd Example)

A second embodiment will be described with reference to Fig. 5A. In this embodiment, the semiconductor substrate 502 is fixed on the stage 501. In the exposure step, a wide parallel oblique incident light 503 of θ = 35 ° is used. The exposure dose at this time is 120 mJ / cm 2. In addition, the cylindrical capacitor hole is elliptical, has a depth of 1.2 mu m, a hole diameter of 0.4 mu m (long axis direction), and an aspect ratio of about 3. As a result of the exposure, a photoresist having a height of 1.05 µm can be left inside the hole having a depth of 1.2 µm, thereby achieving good exposure selectivity.

The wide parallel oblique incident light 503 needs to have at least enough width to cover all the semiconductor elements on the semiconductor substrate surface.

As shown in b of FIG. 5, the distribution of incident light intensity has only one peak at the incident angle θ 504 because the semiconductor substrate 502 is fixed to the stage 501.

(Third Embodiment)

6A shows this embodiment. In the present embodiment, the semiconductor substrate 605 is fixed on the stage 606 rotating around the rotation shaft 607. As in the second embodiment, a wide parallel inclined incident light 608 is used, but is configured as a condenser lens 602, a shutter 603 and a condenser lens 604 to form the inclined incident light 608. The optical system used is used.

In addition, the cylindrical capacitor hole is elliptical, has a depth of 1.2 mu m, a hole diameter of 0.4 mu m (long axis direction), and an aspect ratio of about 3.

While rotating the semiconductor substrate at 30 rpm, the incident angle θ 608 is exposed at 30 ° and the exposure dose is 110 mJ / cm 2. By rotating the semiconductor substrate 605, the uniformity of the exposure dose in the semiconductor substrate surface is improved as compared with the second embodiment.

As a result of the exposure, a photoresist having a height of 1.08 µm can be left inside the hole having a depth of 1.2 µm, thereby achieving good exposure selectivity.

Since the semiconductor substrate 605 is rotated as shown in b of FIG. 6, the selectivity in this embodiment has a symmetric axis of θ = 0 ° as shown in b of FIG. 6. Peaks.

(4th Example)

As shown in Fig. 7, the present embodiment is implemented by using a reduction projection exposure apparatus.

Incident light generated from the light source 702 is collected by the reflector 701, passes through the relay lens 703, and uniformized by the optical-integrator 704. After that, the incident light is adjusted as the sigma aperture 705 and is incident on the condenser lens 706 and shaped into parallel rays. Then, it enters the reticle 707 and enters the semiconductor substrate surface 711 through a reduced optical system composed of the first projection lens 708, the NA aperture 709, and the second projection lens 710.

In the exposure apparatus, the light incident on the reticle 707 is normally perpendicular to the semiconductor substrate (solid line). Incidentally, light incident at an angle to the surface of the reticle 707 is also incident at an angle to the semiconductor substrate (dotted line).

Further, the light incident perpendicularly to the semiconductor substrate passes through the central portion of the aperture stop (σ aperture) 705 of the illumination optical system and the aperture stop (NA aperture) 709 of the projection optical system, and the light incident obliquely to the semiconductor substrate is It passes through the periphery of the aperture stop (σ aperture) 705 of the illumination optical system and the aperture stop (NA aperture) 709 of the projection optical system.

Therefore, by controlling the light passing through the aperture stop (? Aperture) 705 of the illumination optical system and the aperture (NA aperture) 709 of the projection optical system, it becomes possible to manipulate the angular distribution of light incident on the surface of the semiconductor substrate.

In Fig. 9, the relationship (calculated value) between the aspect ratio of the cylindrical capacitor hole and the intensity of the exposure light at the center of the hole in the case of exposure using the reduced projection exposure apparatus is shown. The vertical axis | shaft of the figure has shown the exposure light intensity in the hole bottom center point when the intensity on a semiconductor substrate surface is 1.0. The horizontal axis shows the aspect ratio of the hole.

In addition, this calculation does not consider effects, such as multiple scattering in the resist of exposure light. In fact, it is thought that the light intensity ratio in the inside of the hole and the surface of the semiconductor substrate becomes small, so that the curve of FIG.

The aspect ratio at which the intensity of the exposure light begins to decrease depends on the maximum angle of incidence of the exposure light, so that the greater the maximum angle of incidence in the exposure light, the lower the intensity from the smaller aspect ratio (ie, from the shallow hole).

The rate of decrease of the exposure light intensity (inclination of the curve) when the maximum incident angle of the exposure light is the same depends on the width of the incident angle range, and the incident light intensity at the bottom of the hole decreases gently as the incident angle range is wider. The aspect becomes apparent when comparing the curves of the fourth embodiment and the fifth embodiment of FIG. 9, and the fifth embodiment in which a pupil filter is inserted into the optical system to limit the incident angle has a high reduction ratio of the exposure light.

As a result of the experiment of the present inventors, good selectivity of exposure can be obtained from NA = 0.5 or more to the maximum value allowed by the optical system, and from σ = 0.7 or more to 1 or less. In addition, the cylindrical capacitor hole is elliptical, has a depth of about 1.2 μm, a hole diameter of 0.4 μm (long axis direction), and an aspect ratio of about 3.

The exposure dose in this embodiment is 120 mJ / cm 2. In addition, the conditions of the optical system are NA = 0.57 and sigma = 0.7. Under the above conditions, the exposure light satisfies the condition that the angle distribution of 0 to 23.5 ° and the incident light at an angle of 10 ° or less with respect to the normal direction of the semiconductor substrate is 50% or less of all incident light.

As a result of the exposure, a photoresist having a height of 1.03 μm can be left inside the hole having a depth of 1.2 μm, so that good exposure selectivity can be obtained.

For reference, in FIG. 9, when the intensity of incident light at the bottom of the hole of the present embodiment is read, it can be seen that the intensity of light is reduced to about 0.13 and at the bottom of the hole to 13% of the surface of the semiconductor substrate.

The light intensity distribution in this case is shown in b of FIG. In this case, unlike the previous examples, the incident light has uniform intensity with θ = 0 ° as the axis of symmetry.

(Fifth Embodiment)

8A shows this embodiment. This embodiment differs from the fourth embodiment in that an angle limiting filter (the first perforated filter 812 and the second perforated filter 813) of incident light is added to the optical system of the reduced projection exposure apparatus.

In addition, the cylindrical capacitor hole is elliptical, has a depth of 1.2 mu m, a hole diameter of 0.4 mu m (long axis direction), and an aspect ratio of about 3.

The exposure dose in this embodiment is 120 mJ / cm 2. In addition, conditions of an optical system are NA = O.57 and (sigma) = O.7. Under this condition, the exposure light has an angle of incidence distribution of 19.7 to 25.5 degrees.

As a result of the exposure, a photoresist having a height of 1.1 µm can be left inside the hole having a depth of 1.2 µm, so that good exposure selectivity can be obtained.

Two perforated filters inserted into the optical system remove components close to the vertical of light incident on the reticle 707, thereby performing selective exposure of the photoresist.

For reference, it can be seen from FIG. 9 that the intensity of the incident light at the bottom of the hole of this embodiment is 0, and that the exposed light does not directly reach the bottom of the hole.

In the present embodiment, the angle distribution of the incident light is removed by the effect of two pieces of percol filters, and the vertical component is removed. As shown in b of FIG. 8, the peak distribution has two peaks with θ = 0 ° as the axis of symmetry.

In the prior art, since the exposure is performed using vertical light when forming the lower electrode of the cylindrical capacitor in the semiconductor memory device, the photoresist for protecting the conductive film cannot be sufficiently left inside the cylindrical capacitor hole. Therefore, various problems arise at a later stage. Thus, the present invention provides a method of manufacturing a cylindrical capacitor that enables the removal of unnecessary external photoresist while protecting the conductive film by leaving sufficient photoresist inside the hole for the cylindrical capacitor by performing exposure using substantially oblique incident light. .

Claims (11)

In the manufacturing method of the lower electrode of the cylindrical capacitor used for a semiconductor device, Forming an interlayer insulating film on the semiconductor substrate on which the semiconductor element is formed; Opening a recess serving as a mold of the lower electrode of the cylindrical capacitor in a predetermined region of the interlayer insulating film; Forming a conductive film on the interlayer insulating film including the concave inner wall while maintaining the concave shape; Applying a positive photoresist on the conductive film so as to embed the recess; An exposure step of photosensitive the photoresist on the conductive film while leaving the photoresist inside the recess; A developing step of selectively removing the photoresist on the conductive film while leaving the photoresist inside the recess; Etching to selectively remove the conductive film on the interlayer insulating film while leaving a conductive film inside the recess; A peeling step of removing the photoresist in the recess; And in the exposing step, exposing the inclined incident light component substantially in the normal direction of the semiconductor substrate surface to at least a region where the lower electrode is formed so as to be exposed. The method of claim 1, And in the exposing step, a light beam having an incident angle of less than 10 ° with respect to a normal direction of the semiconductor substrate is 50% or less of all incident light incident on the semiconductor substrate. The method of claim 1, In the exposing step, the exposure method of the circular capacitor lower electrode, characterized in that for performing exposure by light rays having an incident angle of 10 degrees or more with respect to the normal direction of the semiconductor substrate. The method of claim 2, In the exposing step, the incident light is scanned in a straight line on the semiconductor substrate and the exposure is performed by a mechanism for moving the semiconductor substrate in a vertical direction in a plane including the semiconductor substrate with respect to the scanning direction of the incident light in synchronization with the above. Cylindrical capacitor lower electrode manufacturing method. The method of claim 1, In the exposing step, a cylindrical capacitor lower electrode manufacturing method for exposing all the semiconductor elements present on the semiconductor substrate collectively by parallel light rays. The method of claim 5, In the exposure step, the cylindrical capacitor lower electrode manufacturing method for performing the exposure while rotating the semiconductor substrate. The method of claim 2, In the exposing step, the cylindrical capacitor lower electrode manufacturing method characterized in that for performing exposure by a reduction projection exposure apparatus. The method of claim 7, wherein In the exposure step, the cylindrical capacitor lower electrode manufacturing method, characterized in that the condition of the optical system of the reduced projection exposure apparatus NA ≥ 0.5 and σ 0.7 ≤ σ ≤ 1. The method of claim 8, The optical system of the reduced projection exposure apparatus includes a filter for limiting the incident angle of incident light. A manufacturing method of a semiconductor device comprising the manufacturing method according to claim 1 as one step. A semiconductor device manufactured by the manufacturing method according to claim 10.