KR20010005312A - Voltage control oscillator for phase lock loop module - Google Patents

Abstract

PURPOSE: A voltage control oscillator in a phase synchronous loop module is provided to use only one transistor in packaging the phase synchronous loop module. CONSTITUTION: In a voltage control oscillator of a phase synchronous loop module, an oscillator(31a) includes a variable device allowing to adjust the magnitude of a reactance element. The oscillator generates a particular frequency signal depending on the adjustment value obtained by the variable device corresponding to the voltage generated from a PLL. An amplifier(34) receives the frequency signal output from the oscillator and amplifies and outputs the signal using one transistor. The amplifier utilizes the transistor as a negative resistor and matches the frequency signals generated from the oscillator. A pad(36) includes an output matching part(35) and a resistor, wherein the output matching part includes a capacitor, which matches the frequency signal output from the amplifier with that from a particular device side of the back stage and transfers the signal to the particular device.

Description

Voltage control oscillator for phase locked loop module

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase locked loop module essential for transmitting and receiving data in a wireless communication device. In particular, a voltage controlled oscillator is basically a device that occupies the most space in the process of packaging a phase locked loop module or a semiconductor chip. Because of the use of two transistors, it relates to a voltage controlled oscillator in a phase locked loop module to allow only one to be used.

In general, wireless communication devices modulate transmission data to be transmitted and received on a carrier frequency signal for transmission and reception of wireless data, and when receiving, limit a carrier frequency in a received scan signal and demodulate it.

At this time, the frequency generating means used to generate or remove the carrier frequency or channel frequency during transmission and reception is a PLL module, which is a device for generating a frequency signal commonly referred to as a reference frequency.

In general, referring to the reference frequency used in the mobile communication terminal as an example, the digital method of the existing DCS uses the CDMA method as in the PCS, the biggest difference in the hardware implementation of the DCS and PCS is the frequency band and channel used The gap is different. That is, the channel spacing of the DCS is 30 kHz, the channel spacing of the PCS is 50 kHz, and the reference frequencies of each PLL use 19.68 MHz (30 kHz × 656) and 24.6 MHz.

As described above, the PLL module is configured as shown in FIG. 1, and in FIG. 2, an internal configuration of the voltage controlled oscillator 300 of FIG. 1 is included. It consists of the resistance part 32 and the amplifier part 33. As shown in FIG.

Among the components, the reference frequency oscillator 31 has a first coil L1 having one end connected to an input terminal In and receiving a control voltage generated from a PLL connected to the input terminal In, and the first coil L1. The cathode terminal is connected to the other end of L1), and the anode terminal is connected to the ground terminal, and the first and second capacitors are connected in series and are connected in parallel with the varactor diodes (VD). A second coil L2 having one end connected to a connection point of the two capacitors C1 and C2, the first capacitor C1 and the second capacitor C2, and the other end connected to the ground terminal, and the first capacitor. And a third capacitor C3 having one end connected to the connection point of the C1 and the second capacitor C2.

In addition, the amplifier 33 receives the first transistor Q1 receiving an arbitrary positive voltage Vcc through the third coil L3 and the positive voltage applied to the third coil L3. A first resistor C4 charged by Vcc and a voltage applied to the third coil L3 are received at one end and the other end thereof is connected to the base terminal of the first transistor Q1. R1), a fifth capacitor C5 connected to the base terminal and the ground terminal of the first transistor Q1 and charged by a voltage output through the first resistor R1, and the first transistor C1. The second transistor Q2 having the collector terminal connected to the emitter terminal of Q1), the sixth capacitor C6 charged by the voltage applied to the collector terminal of the second transistor Q2, and the first transistor The second resistor R2 is connected to the base terminal of Q1 and the base terminal of the second transistor Q2. It consists of.

Finally, the negative feedback resistor unit 32 includes a seventh capacitor C7 connected to the base terminal and the emitter terminal of the second transistor Q2, and the base terminal and the ground terminal of the second transistor Q2. A third resistor R3 connected therebetween, an eighth capacitor C8 charged by a voltage applied to an emitter terminal of the second transistor Q2, and an eighth capacitor C8 in parallel; The fourth resistor R4 forms a discharge path of the voltage charged in the eighth capacitor C8.

Looking at the operation of the voltage controlled oscillator during the operation of the PLL module having a voltage controlled oscillator configured as described above, the control voltage output from the PLL 200 flowing through the input terminal (In) is the voltage of the varistor diode (VD) LC resonance is performed by the second capacitor C2 and the second coil L2 only when the threshold voltage is higher than the threshold voltage, and corresponds to the intrinsic value of the second capacitor C2 and the second coil L2 and the magnitude of the applied voltage. Specific frequency is generated.

Accordingly, the resonance frequencies of the second capacitor C2 and the second coil L2, which are components of the reference frequency oscillator 31, of the first and second transistors Q1 and Q2 of the amplifier 33 are formed. It is caught by the base terminal, and the first and second transistors Q1 and Q2 are turned on / off according to the voltage state of the resonance frequency applied to the base terminal.

Therefore, the output terminal (Out) connected to the collector terminal of the first transistor (Q1) during the on / off operation of the first and second transistors (Q1, Q2), the first frequency of the reference frequency oscillator (31) The resonance frequency generated by the two capacitors C2 and the second coil L2 is amplified and output.

In the process of one-chip or packaged the conventional PLL module operating as described above, there is a problem that there is a technical limitation in satisfying the taste of the consumer that is gradually reduced in size, light weight and slip.

This is because the transistor occupying the largest area in the semiconductor process is the transistor, and the biggest characteristic of the operation of the second transistor Q2 in the configuration of the voltage controlled oscillator is a signal flowing back from the load terminal rather than the amplification concept. Since the device has more functions to cut off, if it can be adjusted properly, the area consumed in the current one-chip or packaged can be greatly reduced, but the related technology has not been proposed yet.

An object of the present invention to solve the above problems is to use only one of the voltage controlled oscillator is basically a device that occupies the most space in the process of packaging a phase-locked loop module or a semiconductor chip process to use only one transistor To provide a voltage controlled oscillator in a phase locked loop module.

1 is a block diagram illustrating a conventional phase locked loop module;

2 is an exemplary circuit configuration of the voltage controlled oscillator shown in FIG.

3 is an exemplary circuit configuration of a voltage controlled oscillator according to the present invention.

Features of the present invention for achieving the above object, the oscillator for generating a constant frequency signal of a specific frequency band, a voltage controlled oscillator for generating a frequency of a magnitude corresponding to the input voltage, and generated in the voltage controlled oscillator A phase locked loop module having a PLL for changing a magnitude of a voltage applied to a voltage-controlled oscillator and a frequency signal generated by the oscillator, the voltage-controlled oscillator may adjust a magnitude of a reactance component. An oscillator for generating a specific frequency signal according to the adjustment value of the variable means in response to the voltage generated from the PLL and an amplified output using one transistor in response to the frequency signal output from the oscillator; But the transistor functions as a negative resistor And an output matching unit and a resistor including an amplifier for matching a frequency generated by the oscillation unit, and a capacitor for matching a signal of a frequency signal output from the amplifier to a specific device side at a later stage and transferring the signal to the specific device. It consists of a pad.

The above objects and various advantages of the present invention will become more apparent from the preferred embodiments of the invention described below with reference to the accompanying drawings by those skilled in the art.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

3 is an exemplary circuit diagram of a voltage controlled oscillator according to the present invention, and includes a reference frequency oscillator 31a, an amplifier 34, an output matcher 35, and a pad 36. As shown in FIG.

Among the components, the reference frequency oscillator 31a includes an eleventh coil L11 for receiving a control voltage generated from a PLL connected to an input terminal In and connected to the input terminal In, and the eleventh coil (11). An eleventh capacitor C11 charged by a control voltage applied to L11), a varistor diode VD having a cathode terminal connected to the other end of the eleventh coil L11, and an anode terminal connected to a ground terminal; Capacitors are connected in series and are connected to the 12th and 13th capacitors C12 and C13 and the 12th and 13th capacitors C12 and 13th capacitor C13 which are connected in parallel with the varactor diode VD. The other end is connected to the ground terminal and the variable coil VL having a variable reactance variable, and a fourteenth capacitor having one end connected to a connection point of the twelfth capacitor C12 and the thirteenth capacitor C13. It consists of (C14).

In addition, the amplifier 34 is charged by the eleventh resistor R11 receiving an arbitrary positive voltage Vcc through one end and the positive voltage Vcc applied to the eleventh resistor R11. A fifteenth capacitor (C15), a twelfth coil (L12) connected between the fourteenth capacitor (C14) and the fifteenth capacitor (C15) of the reference frequency oscillator (31a), and the eleventh resistor (R11). A transistor Q11 for turning on / off according to the positive voltage Vcc input to a base terminal and outputting an output signal of the reference frequency oscillator 31a input through an emitter terminal to a collector terminal during an on operation; A sixteenth capacitor C16 connected to the emitter terminal and the collector terminal of the transistor Q11, a twelfth resistor R12 connected between the base terminal and the ground terminal of the transistor Q11, and the twelfth resistor; A seventeenth capacitor C17 connected in parallel to R12 and a collector terminal of the transistor Q11; And it is composed of a thirteenth resistor (R13) connected between the ground terminal.

In addition, the output matching unit 35 may include an eighteenth capacitor C18 charged by a signal output through the collector terminal of the transistor Q11, and one end of which is connected to the collector terminal of the transistor Q11. It consists of 19 capacitors (C19).

Finally, the pad 36 is connected to the fourteenth resistor R14 that conducts the output signal of the output matching unit 35 to the ground side, and is connected in series with the fourteenth resistor R14 in parallel. 15 and 16 resistors R15 and R16.

Looking at the operation of the voltage controlled oscillator during the operation of the PLL module having a voltage controlled oscillator configured as described above, the control voltage output from the PLL 200 flowing through the input terminal (In) is the voltage of the varistor diode (VD) LC resonance is performed by the thirteenth capacitor C13 and the variable coil VL only when the threshold voltage is higher than or equal to the threshold voltage. Frequency is generated. At this time, the specific reference frequency requested by the manufacturer sets the target frequency by variably adjusting the reactance value of the variable coil VL.

Therefore, the resonance frequency of the thirteenth capacitor C13 and the variable coil VL, which are components of the reference frequency oscillator 31a, is caught by the emitter terminal of the transistor Q11 constituting the amplifier 34. At this time, a negative resistance value is generated by the transistor Q11 to match the frequency generated by the reference frequency oscillator 31a.

At this time, the sixteenth capacitor C16 connected to the emitter terminal and the collector terminal of the transistor Q11 is used as a feedback means for oscillation.

Through this process, the output signal of the transistor Q11 is transmitted to the specific device provided at the rear end through the output matching unit 35 and the pad 36, and the pad 36 performs the induction of the counter electromotive force or the reverse direction. It performs the function of blocking. That is, by using the connection point of the 15th and 16th resistors R15 and R16 connected in series as the output terminal, the signal flowing in the reverse direction from the rear end connected to the output terminal is transferred to the ground side.

While the invention has been shown and described in connection with specific embodiments thereof, it will be appreciated that various modifications and changes can be made without departing from the spirit and scope of the invention as indicated by the claims. Anyone who owns it can easily find out.

Minimization by minimizing the number of transistors, which occupy the most space in the process of packaging a PLL module or semiconductor chip by providing a voltage controlled oscillator in a phase locked loop module operating as described above It is effective.

Claims (3)

An oscillator for generating a constant frequency signal of a specific frequency band, a voltage controlled oscillator for generating a frequency corresponding to an input voltage, and a frequency generated from the voltage controlled oscillator and a frequency signal generated from the oscillator A phase locked loop module having a PLL that receives and varies a magnitude of a voltage applied to the voltage controlled oscillator: The voltage controlled oscillator, An oscillator having variable means capable of adjusting the magnitude of the reactance component and generating a specific frequency signal according to the adjustment value of the variable means in response to the voltage generated from the PLL; An amplifier which receives the frequency signal output from the oscillator and amplifies and outputs the signal using one transistor, wherein the transistor performs a function of a negative resistance to match a frequency generated by the oscillator; And Voltage control in a phase locked loop module comprising a pad formed of an output matching unit made of a capacitor and a resistor for matching a frequency signal outputted from the amplification unit to a specific device side at a later stage and then transferring the signal to the specific device oscillator. The method of claim 1, The oscillator comprises an eleventh coil having one end connected to an input terminal into which the voltage generated from the PLL is introduced and receiving a control voltage generated from the PLL connected to the input terminal; An eleventh capacitor charged by the control voltage applied to the eleventh coil; A varistor diode having a cathode terminal connected to the other end of the eleventh coil and an anode terminal connected to a ground terminal; A twelfth and thirteenth capacitor having two capacitors connected in series and connected in parallel with the varactor diode; A variable coil having one end connected to the connection point of the twelfth capacitor and the thirteenth capacitor and the other end connected to the ground terminal, and having a variable reactance component; And And a fourteenth capacitor having one end connected to a connection point of the twelfth and thirteenth capacitors. The method according to claim 1 or 2, The amplifier includes an eleventh resistor receiving an arbitrary positive voltage through one end; A fifteenth capacitor charged by the positive voltage applied to the eleventh resistor; A twelfth coil connected between the fourteenth capacitor and the fifteenth capacitor of the reference frequency oscillator; A transistor configured to perform an on-off operation according to the positive voltage input to the base terminal through the eleventh resistor, and output an output signal of the reference frequency oscillation unit input through an emitter terminal to a collector terminal during an on operation; A sixteenth capacitor connected to the emitter terminal and the collector terminal of the transistor; A twelfth resistor connected between the base terminal and the ground terminal of the transistor; A seventeenth capacitor connected in parallel to the twelfth resistor; And And a thirteenth resistor connected between the collector terminal of the transistor and a ground terminal.