KR100313329B1 - Voltage control oscillator for phase lock loop module - Google Patents

Abstract

The present invention provides a phase locked loop module for improving the operation efficiency of an oscillator performing an initial oscillation operation of a voltage controlled oscillator when providing a reference frequency of a heterogeneous frequency band within 300 MHz using one phase locked loop module. In particular, the voltage controlled oscillator includes, in particular, a reference frequency oscillator constituting a dual voltage controlled oscillator, a first coil receiving a control voltage generated from a PLL, a cathode terminal connected to the other end of the first coil, and an anode terminal connected to a ground terminal. And a first variable connected between the connection point of the second capacitor and the third capacitor, and the ground terminal of the second and third capacitors in which two capacitors are connected in series and are connected to the varactor diodes in parallel. A coil, a fourth capacitor having one end connected to the connection point of the second capacitor and the third capacitor, and two A diode connected between the input terminal and the ground terminal of the system control signal as a whole connected in series, and a voltage divider resistor for dividing and outputting the input system control signal, and a diode receiving the divided voltage output from the voltage divider resistor at the anode terminal; And a second variable coil connected to the cathode terminal and the ground terminal of the capacitor, and a capacitor connected to the anode terminal of the diode and the connection point of the second capacitor and the third capacitor.

Description

Voltage control oscillator for phase locked loop module

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase locked loop module that is essentially used for transmitting and receiving data in a wireless communication device. In particular, when a single phase locked loop module is used to provide a reference frequency of a heterogeneous frequency band within 300 MHz, A voltage controlled oscillator in a phase locked loop module for improving the operation efficiency of an oscillator performing an initial oscillation operation.

In general, wireless communication devices modulate transmission data to be transmitted and received on a carrier frequency signal for transmission and reception of wireless data, and when receiving, limit a carrier frequency in a received scan signal and demodulate it.

At this time, the frequency generating means used to generate or remove the carrier frequency or channel frequency during transmission and reception is a PLL module, which is a device for generating a frequency signal commonly referred to as a reference frequency.

Therefore, in general, one reference frequency is generated in one PLL module, so if one communication system wants to use heterogeneous reference frequencies, for example, DCS and PCS use the same CDMA communication method and have the same hardware configuration. However, if only the frequency band and channel used are different, in case of using DCS and PCS by using one system terminal, separate PLL module should be used. This is because the channel spacing of the DCS is 30 kHz, the channel spacing of the PCS is 50 kHz, and the reference frequencies of each PLL use 19.68 MHz (30 kHz × 656) and 24.6 MHz (50 kHz × 492).

However, when the frequency bands of two reference frequency signals to be used have a difference within 300 MHz, a method of switching and adjusting the LC resonance ratio of the reference frequency oscillator without using a separate voltage controlled oscillator is widely used. .

FIG. 1 schematically shows a PLL module capable of generating two reference frequency signals having a difference in frequency band within 300 MHz. In FIG. 2, the voltage controlled oscillator shown in FIG. With the internal configuration of 300, the reference frequency oscillator 31, the negative feedback resistor 33, the amplifier 32, and matching, which generate two reference frequency signals having a difference within 300 MHz according to the system control signal It is comprised by the filter part 34. As shown in FIG.

The voltage controlled oscillator 300 illustrated in FIG. 2 is a voltage controlled oscillator configuration when only one transistor is used.

Among the components, the reference frequency oscillator 31 has a first coil L1 having one end connected to an input terminal In and receiving a control voltage generated from a PLL connected to the input terminal In, and the first coil L1. The cathode terminal is connected to the other end of L1), and the anode terminal is connected to the ground terminal and the varistor diode (VD), and the two capacitors are connected in series and are connected to the varactor diode (VD) in parallel. First and second variable coils (C2, C3) and two variable coils connected in series and generally connected between the connection point of the second capacitor (C2) and the third capacitor (C3) and the ground terminal ( VL1, VL2, the fourth capacitor C4 having one end connected to the connection point of the second capacitor C2 and the third capacitor C3, and the two resistors are connected in series to the input terminal of the system control signal as a whole. Is connected between ground terminals and Voltage dividing resistors Ra and Rb for dividing and outputting the system control signal, and a divided voltage output from the voltage dividing resistors Ra and Rb to an anode terminal and a cathode terminal is connected to a ground terminal. And a capacitor Ca connected to an anode terminal of the diode D, and a connection point of the first variable coil VL1 and the second variable coil VL2.

In addition, the amplifying unit 32 includes a transistor Q1 receiving an arbitrary positive voltage Vcc through the third coil L3 and the positive voltage Vcc applied to the third coil L3. A first capacitor R5 charged with a fifth capacitor C5 and a voltage applied to the third coil L3 at one end thereof and connected to a base terminal of the transistor Q1 at the other end thereof, and The second resistor R2 is connected between the base terminal and the ground terminal of the transistor Q1.

In addition, the negative feedback resistor unit 33 is connected to the base terminal and the emitter terminal of the transistor (Q1) and the sixth capacitor (C6) is charged by the voltage output through the first resistor (R1), The seventh capacitor C7 is charged by the voltage across the emitter terminal of the transistor Q1, and the third resistor R3 is connected between the emitter terminal of the first transistor Q1 and the ground terminal. do.

Finally, the matching filter unit 34 is connected in series with the eighth capacitor C8 charged by the signal output through the collector terminal of the transistor Q1 and is generally parallel to the eighth capacitor C8. 9 and 10 capacitors C9 and C10 connected to each other.

Referring to the operation of the voltage controlled oscillator during the operation of the PLL module having the voltage controlled oscillator configured as described above, the output frequency of the reference frequency oscillator indicated by reference numeral 31 is different depending on the logic state of the system control signal. First, only when the logic state of the system control signal is low and the control voltage output from the PLL 200 flowing through the input terminal In is greater than or equal to the threshold voltage of the varistor diode VD.

Since the logic state of the system control signal is low, the diode D maintains the off state. Accordingly, the combined value of the reactance components of the first and second variable coils VL1 and VL2 and the capacitance of the third capacitor C3 are maintained. LC resonance is performed by the size of the components to generate a specific frequency corresponding to the intrinsic value of the third capacitor C2 and the first and second variable coils VL1 and VL2 and the magnitude of the applied voltage.

On the other hand, when the logic state of the system control signal is high and the control voltage output from the PLL 200 flowing through the input terminal In is greater than or equal to the threshold voltage of the varactor diode VD, the logic of the system control signal Since the state is high, the diode D is turned on.

As a result, the potential of the connection point of the first and second variable coils VL1 and VL2 is substantially equal to the ground potential, so that the reactance component for LC resonance is determined by the first variable coil VL1. That is, since the loop for LC resonance is composed of the third capacitor C3, the first variable coil VL1, the capacitor Ca, and the diode D, it is different from the case where the logic state of the system control signal is low. It will generate a resonance frequency.

In this case, when the logic state of the system control signal is low among the two operation modes as described above, the loop for LC resonance is composed of pure reactance component and capacitance component, whereas the logic state of the system control signal is high. In the state, since the loop for LC resonance is not composed of pure reactance component and capacitance component only, Q point is lowered, which causes a problem of deteriorating system stability.

An object of the present invention for solving the above problems is the operation efficiency of the oscillator performing the initial oscillation operation of the voltage controlled oscillator when providing a reference frequency of the heterogeneous frequency band within 300MHz using one phase locked loop module To provide a voltage controlled oscillator in a phase locked loop module to improve the efficiency.

1 is an exemplary diagram schematically showing a PLL module capable of generating two reference frequency signals having a difference in frequency band within 300 MHz;

2 is an exemplary circuit configuration of the voltage controlled oscillator shown in FIG.

3 is an exemplary circuit configuration of a voltage controlled oscillator according to the present invention.

A feature of the present invention for achieving the above object is that the oscillator for generating a constant frequency signal of a specific frequency band, and has a difference within a predetermined frequency corresponding to the magnitude of the input voltage according to the user's selection or system control signal A dual voltage controlled oscillator for generating two reference frequency signals, and a PLL that receives a reference frequency generated by the dual voltage controlled oscillator and a frequency signal generated by the oscillator and changes a magnitude of voltage applied to the dual voltage controlled oscillator. In the heterogeneous frequency-locked phase-locked loop module having a dual frequency controlled oscillator, the reference frequency oscillator comprises: a first coil receiving a control voltage generated from the PLL and a cathode terminal at the other end of the first coil; And the anode terminal is connected to the ground terminal. A second variable is connected between the collector diode, the two capacitors in series, and the second and third capacitors connected in parallel with the varactor diode, and the connection point between the second capacitor and the third capacitor and the ground terminal. The system control being connected between an input terminal and a ground terminal of a system control signal and a fourth capacitor having a coil, a fourth capacitor having one end connected to a connection point of the second capacitor and a third capacitor, and connected in series; A voltage divider for dividing the signal and outputting the divided voltage, a diode receiving the divided voltage output from the voltage divider resistor at an anode terminal, a second variable coil connected to a cathode terminal of the diode and a ground terminal, and an anode terminal of the diode; It is composed of a capacitor connected to the connection point of the second capacitor and the third capacitor.

The above objects and various advantages of the present invention will become more apparent from the preferred embodiments of the invention described below with reference to the accompanying drawings by those skilled in the art.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

First, referring to the technical idea of the present invention, when the logic state of the system control signal in the prior art illustrated in FIG. 2 is high, the loop for LC resonance does not consist of pure reactance components and capacitance components. The reason is that since the loop for LC resonance consists of the third capacitor C3, the first variable coil VL1, the capacitor Ca and the diode D, the internal resistance of the diode D is included in the LC resonance loop. Because.

Accordingly, the present invention seeks to provide a circuit in which the configuration of the internal resistance of the diode D is minimized while the change in hardware configuration is not large.

3 is an exemplary circuit configuration diagram of a voltage controlled oscillator according to the present invention, wherein a reference frequency oscillator 31a and a negative feedback resistor generate two reference frequency signals having a difference within 300 MHz according to a system control signal. The basic configuration of the unit 33, the amplifier 32, and the matching filter unit 34 is not much different from that shown in FIG.

Among the components, the reference frequency oscillator 31a has a first coil L1 having one end connected to an input terminal In and receiving a control voltage generated from a PLL connected to the input terminal In, and the first coil L1. The cathode terminal is connected to the other end of L1), and the anode terminal is connected to the ground terminal and the varistor diode (VD), and the two capacitors are connected in series and are connected to the varactor diode (VD) in parallel. A third variable coil (C2, C3), a first variable coil (VL1) connected between a connection point and a ground terminal of the second capacitor (C2) and the third capacitor (C3), and the second capacitor (C2) The fourth capacitor C4, one end of which is connected to the connection point of the third capacitor C3, and the two resistors are connected in series so as to be connected between the input terminal and the ground terminal of the system control signal as a whole. Voltage dividing resistor (R) a, Rb, a diode D receiving the divided voltages output from the divided resistors Ra and Rb to an anode terminal, and a second variable coil connected to the cathode terminal and the ground terminal of the diode D; VL2) and a capacitor Ca connected to the anode terminal of the diode D and the connection point of the second capacitor C2 and the third capacitor C3.

In addition, the amplifying unit 32 includes a transistor Q1 receiving an arbitrary positive voltage Vcc through the third coil L3 and the positive voltage Vcc applied to the third coil L3. A first capacitor R5 charged with a fifth capacitor C5 and a voltage applied to the third coil L3 at one end thereof and connected to a base terminal of the transistor Q1 at the other end thereof, and The second resistor R2 is connected between the base terminal and the ground terminal of the transistor Q1.

In addition, the negative feedback resistor unit 33 is connected to the base terminal and the emitter terminal of the transistor (Q1) and the sixth capacitor (C6) is charged by the voltage output through the first resistor (R1), The seventh capacitor C7 is charged by the voltage across the emitter terminal of the transistor Q1, and the third resistor R3 is connected between the emitter terminal of the first transistor Q1 and the ground terminal. do.

Finally, the matching filter unit 34 is connected in series with the eighth capacitor C8 charged by the signal output through the collector terminal of the transistor Q1 and is generally parallel to the eighth capacitor C8. 9 and 10 capacitors C9 and C10 connected to each other.

Referring to the operation of the voltage controlled oscillator during operation of the PLL module having the voltage controlled oscillator configured as described above, the output frequency of the reference frequency oscillator indicated by reference numeral 31a is different depending on the logic state of the system control signal. First, only when the logic state of the system control signal is low and the control voltage output from the PLL 200 flowing through the input terminal In is greater than or equal to the threshold voltage of the varistor diode VD.

Since the logic state of the system control signal is low, the diode D remains in an off state. Accordingly, no voltage difference occurs between both ends of the capacitor Ca. Therefore, the reactance component and the first component of the first variable coil VL1 are not generated. LC resonance is performed by the magnitude of the capacitance component of the three capacitor C3 to generate a specific frequency corresponding to the intrinsic value of the third capacitor C2 and the first variable coil VL1 and the magnitude of the applied voltage.

On the other hand, when the logic state of the system control signal is high and the control voltage output from the PLL 200 flowing through the input terminal In is greater than or equal to the threshold voltage of the varactor diode VD, the logic of the system control signal Since the state is high, the diode D is turned on.

Accordingly, the combined value of the reactance components of the first and second variable coils VL1 and VL2 is a loop composed of the reactance component of the first variable coil VL1 versus the capacitor Ca, the diode D, and the second variable coil VL2. When the logic state of the system control signal is obtained by the parallel synthesis value of the reactance component of the first variable coil (VL1), and by the parallel synthesis reactance component and the capacitor component of the third capacitor (C3) It generates a different resonant frequency than.

Therefore, the impedance component of the internal resistance of the diode (d) is minimized, and the influence on the LC resonant loop is extremely weak compared to the conventional circuit, so that the Q point is stabilized.

While the invention has been shown and described in connection with specific embodiments thereof, it will be appreciated that various modifications and changes can be made without departing from the spirit and scope of the invention as indicated by the claims. Anyone who owns it can easily find out.

When the voltage controlled oscillator in the phase locked loop module according to the present invention operates as described above to provide a reference frequency of a heterogeneous frequency band within 300 MHz using one phase locked loop module, There is an effect of improving the operating efficiency of the oscillator to perform the oscillation operation.

Claims (1)

An oscillator for generating a constant frequency signal of a specific frequency band, and a dual voltage controlled oscillator for generating two reference frequency signals having a difference within a predetermined frequency corresponding to the magnitude of the input voltage according to a user's selection or system control signal. And a PLL which receives a reference frequency generated by the dual voltage controlled oscillator and a frequency signal generated by the oscillator, and changes a magnitude of a voltage applied to the dual voltage controlled oscillator. : A reference frequency oscillator constituting the dual voltage controlled oscillator, A first coil to receive a control voltage generated from the PLL; A varistor diode having a cathode terminal connected to the other end of the first coil and an anode terminal connected to a ground terminal; Second and third capacitors in which two capacitors are connected in series and are connected to the varactor diode in parallel; A first variable coil connected between a connection point of the second capacitor and a third capacitor and a ground terminal; A fourth capacitor having one end connected to a connection point of the second capacitor and the third capacitor; Two resistors connected in series to each other and connected between the input terminal and the ground terminal of the system control signal and divide the input system control signal; A diode which receives the divided voltage output from the voltage divider at an anode terminal; A second variable coil connected to the cathode terminal and the ground terminal of the diode; And And a capacitor connected to an anode terminal of the diode and a connection point of the second capacitor and the third capacitor.