KR20010005086A - A method for fabricating capacitor in semiconductor device - Google Patents

Abstract

PURPOSE: A method for manufacturing a capacitor of a semiconductor device is provided to increase the capacitance of a capacitor by using a hemisphere type silicon grain. CONSTITUTION: A polysilicon charge storage node pattern is formed on a predetermined lower layer. A hemisphere type silicon grain(13) is formed on a surface of the polysilicon charge storage node pattern. A dielectric layer(14) including a nitride layer is formed along a surface of the whole structure. The dielectric layer(14) is formed along a profile of the hemisphere type silicon grain(13). A plate electrode is formed on the dielectric layer(14).

Description

A method for fabricating capacitor in semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing technology, and more particularly to a method of forming a capacitor in manufacturing a semiconductor device.

As semiconductor devices are highly integrated, various technologies have been developed to increase the capacitance of a capacitor. The capacitance of the capacitor is inversely proportional to the thickness of the capacitor dielectric film, and is proportional to the surface area of the charge storage electrode and the dielectric constant of the capacitor dielectric film.

As one of them, the technique of increasing the capacitance of a capacitor by reducing the thickness of the capacitor dielectric film has faced limitations because it causes a problem of increasing leakage current, and thus, the charge storage electrode of the capacitor has a two-dimensional structure such as a simple stack structure. The technique of increasing the surface area of the charge storage electrode has been mainly applied by changing from a structure to a three-dimensional structure such as a cylinder structure, a fin structure, and a bellows structure. However, in the highly integrated device of 256M DRAM or more, it is difficult to secure sufficient cell capacitance and electrical characteristics by changing the shape of the charge storage electrode.

Accordingly, a technique for applying a high dielectric material such as Ta ₂ O ₅ as a capacitor dielectric film has been developed, but there are still problems to be solved in the actual mass production.

Recently, in order to solve this problem, a selective hemi-spherical silicon grain (HSG) thin film formation technology capable of increasing the surface area of the charge storage electrode by more than twice while using the same layout area and structure as the conventional one has been developed to reduce the capacitance of the capacitor. It can be secured to some extent.

However, in the next generation of giga DRAM class devices, the HSG charge storage electrode structure alone will face a limit in securing sufficient capacitance, and thus, a countermeasure is required.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a capacitor of a semiconductor device capable of increasing capacitance without changing a layout and structure when manufacturing a capacitor using a hemispherical silicon grain thin film.

1a to 1d is a manufacturing process of a cylindrical capacitor according to an embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings

10: substrate

11: interlayer insulating film

12, 15: polysilicon film

13: HSG

14: dielectric film

According to another aspect of the present invention, there is provided a method of manufacturing a capacitor of a semiconductor device, the method including: forming a polysilicon charge storage electrode pattern on a predetermined lower layer; Forming a hemispherical silicon grain on a surface of the charge storage electrode pattern; A third step of forming a dielectric film including a nitride film along the entire structure surface after performing the second step, wherein the dielectric film is formed along a profile of the hemispherical silicon grain; And a fourth step of forming a plate electrode on the dielectric film.

That is, according to the present invention, after forming the charge storage electrode having a hemi-spherical silicon grain (HSG) structure, the deposition conditions of the nitride film used as the capacitor dielectric material are changed to allow the nitride film to be deposited unevenly along the profile of the HSG, thereby increasing the effective surface area of the electrode. It is an increasing technology.

1A to 1D illustrate a cylindrical capacitor manufacturing process according to an embodiment of the present invention, which will be described below with reference to the drawings.

In the process according to the present embodiment, first, as shown in FIG. 1A, the polysilicon film 12 is used to form a charge storage electrode pattern having a cylindrical structure. At this time, the process of forming the cylindrical charge storage electrode pattern is in accordance with the conventional process using the deposition of the sacrificial film and the polysilicon film of two layers. Reference numeral '10' denotes a substrate and '11' denotes an interlayer insulating film.

Next, as shown in FIG. 1B, the HSG 13 is selectively deposited on the surface of the polysilicon film 12. The deposition process of the HSG 13 also applies a conventional recipe.

Subsequently, a dielectric film 14 is deposited along the entire structure surface as shown in FIG. 1C. The dielectric film 14 is formed through a nitride film deposition and an oxidation process as a nitride / oxide (NO) structure, and the profile of the HSG 13 is transferred to the dielectric film 14 so as to be formed unevenly.

At this time, the nitride film deposition process is performed under the following conditions.

A) SiH ₂ Cl ₂ (or SiH ₄ ) gas and NH ₃ gas are used as the deposition gas.

B) The flow ratio of SiH ₂ Cl ₂ (or SiH ₄ ) gas and NH ₃ gas is set from 1: 5 to 1:15.

C) The deposition temperature is set to 680 to 900 ° C.

D) The pressure inside the deposition chamber is set to 0.1 to 0.5 Torr.

E) Low-Pressure Chemical Vapor Deposition (LPCVD) is used as the deposition method.

Next, as shown in FIG. 1D, a polysilicon film 15 is deposited on the entire structure and patterned to form a plate electrode.

In the above process, the dielectric film 14 is formed along the surface of the HSG 13 to increase the effective surface area of the plate electrode as well as the charge storage electrode, thereby greatly increasing the capacitance of the capacitor.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary knowledge.

For example, in the above-described embodiment, the case where the cylindrical charge storage electrode structure is adopted is described as an example, but the present invention is a capacitor of any structure that can be applied to the selective HSG technology, such as fin type, bellows type, general stack type, etc. Applicable at the time of manufacture.

The present invention described above can ensure a stable capacitance without changing the layout and structure of the capacitor, thereby improving the operating characteristics of the semiconductor device.

Claims (6)

Forming a polysilicon charge storage electrode pattern on a predetermined lower layer; Forming a hemispherical silicon grain on a surface of the charge storage electrode pattern; A third step of forming a dielectric film including a nitride film along the entire structure surface after performing the second step, wherein the dielectric film is formed along a profile of the hemispherical silicon grain; And A fourth step of forming a plate electrode on the dielectric film Capacitor manufacturing method of a semiconductor device comprising a. The method of claim 1, The third step, A fifth step of forming the nitride film along the profile of the hemispherical silicon grains; And a sixth step of forming an oxide film for a dielectric along the profile of the nitride film. The method of claim 2, In the fifth step, A method for manufacturing a capacitor of a semiconductor device, characterized in that for depositing the nitride film using a low pressure chemical vapor deposition method. The method of claim 3, In the fifth step, And a deposition temperature of the nitride film is 680 to 900 占 폚. The method of claim 4, wherein In the fifth step, The deposition pressure of the nitride film is 0.1 to 0.5 Torr, characterized in that the capacitor manufacturing method of the semiconductor device. The method of claim 5, In the fifth step, Manufacture of capacitors for semiconductor devices characterized by using SiH ₂ Cl ₂ / NH ₃ (flow ratio of 1: 5 to 1:15) or SiH ₄ / NH ₃ (flow ratio of 1: 5 to 1:15) as the deposition gas Way.