KR20010005040A - Method of fabricating storage node of capacitor in semiconductor device - Google Patents

Abstract

PURPOSE: A capacitor charge storage electrode formation method is provided to be capable of increasing the static capacitance and prohibiting generation of bridge, by forming polysilicon as a double layer and using MPS(metastable polysilicon) growth, after formation of an internal cylinder. CONSTITUTION: An etch prevention film(7) on a semiconductor substrate is formed. An oxide film is then formed on the etch prevention film. Next, the oxide film is selectively etched and accordingly the exposed etch prevention film is etched, thus forming a given capacitor contact region. A dual polysilicon layer is formed by continuously depositing polysilicon having a different doping concentration on the entire surface of the oxide film including the capacitor contact region. Then, the dual polysilicon layer is divided depending on a capacitor charge storage electrode. The oxide film is removed, Next, MPS is grown on the entire surface of the dual polysilicon layer, thus forming a cylinder-shape charge storage electrode made of polysilicon and MPS.

Description

Method of forming a capacitor charge storage electrode of a semiconductor memory device {Method of fabricating storage node of capacitor in semiconductor device}

The present invention relates to a method of forming a capacitor charge storage electrode of a semiconductor memory device, and more particularly, to a method of forming a capacitor charge storage electrode of a large capacity using a double polysilicon layer and selective MPS (metastable polysilicon) growth.

Although the shape of the capacitor charge storage electrode is changing to an inner cylinder type with high integration of semiconductor memory devices, securing a stable capacitance within a small area is another problem in device development.

Most of the internal cylindrical charge storage electrodes are formed by forming a cylinder by etching an oxide layer, depositing polysilicon, growing MPS, and separating capacitors. Recently, the development of materials that can replace polysilicon and MPS has been studied, but it has not been realized yet.

A conventional process of forming an internal cylindrical charge storage electrode using polysilicon and MPS will be described with reference to FIGS. 1A to 1D.

First, as shown in FIG. 1A, a contact hole is formed by selectively etching an interlayer insulating film 1 formed on a semiconductor substrate (not shown), and then polysilicon is buried in the contact hole to form a capacitor contact plug 2. To form. Subsequently, an oxide film 3 is formed on the interlayer insulating film 1 on which the contact plug 2 is formed, and then selectively etched to form a contact region 4 exposing a predetermined portion including the contact plug 2. do.

Next, as shown in FIG. 1B, polysilicon 5 is deposited on the entire surface of the oxide film 3 including the contact region 4, and the MPS 6 is grown thereon.

Subsequently, as shown in FIG. 1C, polysilicon and MPS layers deposited in regions other than the contact region 4 are removed using a method such as CMP to separate the charge storage electrode.

FIG. 1D illustrates a case in which MPS is grown on the entire surface of polysilicon after depositing polysilicon, separating the charge storage electrode by CMP.

In the case of forming the capacitor charge storage electrode of the semiconductor memory device by the above process, oxide etching of 13000Å or more is required for forming the capacitor contact region 4 in 256M DRAM or higher class, which is inevitable between the cell region and the peripheral circuit region. The step is caused, and even if the CMP process is applied, the overall depth is increased, which causes problems in subsequent processes. Therefore, if possible, it is necessary to apply a low thickness oxide film and implement a stable capacitance securing method.

In addition to the above process, charge storage electrodes are generally separated by using a method such as CMP. At this time, although the process of growing the MPS is carried out after the process of depositing polysilicon and CMP (Fig. 1d), both cases have the following problems. In the case of continuously growing MPS after polysilicon deposition, since the MPS does not grow on the outer wall of the cylinder, the possibility of forming bridges between the charge storage electrodes becomes smaller, but the overall electrostatic discharge is higher than in the case where the MPS is grown on both sides of the cylinder (FIG. 1C). Higher capacitors are required as the capacity is reduced. This leaves a burden on the subsequent process as described above. In addition, there is a possibility of bridging by separation of MPS grains in the CMP process for separation.

On the other hand, in the case of growing MPS after preferentially advancing CMP after polysilicon deposition, there is a possibility of bridging at the outer wall, and the possibility of bridging is very high because the gap between the adjacent capacitors is very narrow due to the high integration of the device.

The present invention is to solve the above-described problems, after forming a double polysilicon layer, CMP process and MPS growth process proceeds to secure a stable capacitance at a lower height than the conventional cylindrical capacitor and to generate the bridge It is an object of the present invention to provide a method for forming a capacitor charge storage electrode of a semiconductor memory device which can be suppressed.

According to another aspect of the present invention, there is provided a method of forming a capacitor charge storage electrode of a semiconductor device, the method comprising: forming an etch stop layer on a semiconductor substrate, forming an oxide layer on the etch stop layer, selectively etching the oxide layer and Etching the exposed etch stop layer to form a predetermined capacitor contact region, continuously depositing polysilicon having a different doping concentration on the entire surface of the oxide film including the capacitor contact region to form a double polysilicon layer, the double poly Separating the silicon layer for each capacitor charge storage electrode, removing the oxide film, and growing MPS on the entire surface of the double polysilicon layer to form a cylindrical charge storage electrode made of polysilicon and MPS. do.

1A to 1D are process flowcharts showing a method of forming an internal cylindrical capacitor charge storage electrode according to the prior art;

2A to 2E are process flowcharts showing a method of forming an internal cylindrical capacitor charge storage electrode according to the present invention;

* Description of the symbols for the main parts of the drawings *

1.Insulation film 2.Contact plug

7.Anti-etching film 8.Oxide film

10 A. Undoped or lightly doped polysilicon layer

10B. Highly Doped Polysilicon Layer

11.MPS

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

2A to 2E illustrate a method of forming a capacitor charge storage electrode of a semiconductor memory device according to the present invention in accordance with a process sequence.

First, referring to FIG. 2A, a contact hole is formed by selectively etching an interlayer insulating film 1 formed on a semiconductor substrate (not shown). Then, the contact plug 2 is formed by embedding polysilicon in the contact hole. Form. Subsequently, a nitride film (SiN) or SiON or the like is deposited on the interlayer insulating film 1 having the contact plug 2 formed thereon to form an etch stop film 7. Subsequently, oxide films 8A and 8B having a difference in wet etching ratio in HF, such as PE-TEOS and PSG, are sequentially deposited on the etch stop film 7 or a single layer oxide film 8 is formed to a predetermined thickness.

Next, as shown in FIG. 2B, the oxide layer 8 is selectively etched using the mask pattern 9 defining the capacitor contact region, and thus the exposed etch stop layer 7 is continuously removed by dry etching. A capacitor contact region is formed.

Next, as shown in FIG. 2C, polysilicon is deposited in two steps on the entire surface of the oxide film 8 including the capacitor contact region. That is, firstly doped polysilicon or lightly doped polysilicon is deposited as the first polysilicon layer 10A, and then a high concentration of doped polysilicon is deposited as the second polysilicon layer 10B. To form a double polysilicon layer 10 does not exceed the existing thickness.

Next, as shown in FIG. 2D, a buried material (not shown) such as an oxide film or a photoresist is deposited on the entire surface of the substrate and CMP is applied to separate the polysilicon layer 10 for each charge storage electrode.

Subsequently, as shown in FIG. 2E, the buried material layer is removed, the oxide film 8 is diped out, and then MPS 11 is grown on the entire surface of the polysilicon layer 10 to form polysilicon and A cylindrical charge storage electrode made of MPS is completed. When the oxide layer 8 is formed as a single layer during the dip out of the oxide layer 8, the etch stop layer serves as a barrier, and when the oxide layer is formed as a double layer, the lower oxide layer 8A serves as a barrier.

In the MPS growth, when undoped polysilicon is applied to the first polysilicon layer 10A, MPS does not grow in the undoped polysilicon region, and thus, bridges due to MPS growth do not occur on the outer wall of the cylinder. As compared with the case where MPS is formed before CMP in the existing process, there is no possibility of deviation of MPS during CMP, thus ensuring stable process in terms of bridge. On the other hand, when the low concentration doped polysilicon is applied to the first polysilicon layer (10A) compared to the polysilicon layer (10B) doped with a high concentration, the growth rate of the MPS is slow as shown in Figure 2e MPSs 11A and 11B having different sizes are grown on two polysilicon layers 10A and 10B having different concentrations. Therefore, if this adjustment is made, it is possible to secure an increased capacitance without generating a bridge at the same height.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary knowledge.

In the present invention, after forming the inner cylinder, polysilicon is formed into a double layer and selective MPS growth is applied to increase the capacitance (capable of securing the required capacitance at a lower capacitor height) and to suppress the occurrence of bridges. Through this can improve the characteristics of the device and increase the yield.

Claims (14)

Forming an etch stop layer on the semiconductor substrate; Forming an oxide film on the etch stop layer; Selectively etching the oxide film and etching the exposed anti-etching film to form a predetermined capacitor contact region, Forming a double polysilicon layer by continuously depositing polysilicon having different doping concentrations on the entire surface of the oxide film including the capacitor contact region; Separating the double polysilicon layer for each capacitor charge storage electrode; Removing the oxide film, and Growing a MPS on the entire surface of the double polysilicon layer to form a cylindrical charge storage electrode made of polysilicon and MPS. The method of claim 1, The method of forming a capacitor charge storage electrode of a semiconductor memory device, characterized in that the etch stop layer is formed of a nitride film (SiN) or SiON. The method of claim 1, The method of claim 1, wherein the anti-etching layer is formed to a thickness of 200-300 Å. The method of claim 1, The oxide film is a method of forming a capacitor charge storage electrode of a semiconductor memory device, characterized in that to form a two-layer structure by successively depositing oxide films with different wet etching ratio to HF. The method of claim 4, wherein The method of forming a capacitor charge storage electrode of a semiconductor memory device, wherein the lower oxide layer has a lower wet etching ratio than the upper oxide layer in the two layer oxide layer. The method of claim 4, wherein And forming a two-layer oxide film of PE-TEOS and PSG. The method of claim 1, The method for forming a capacitor charge storage electrode of a semiconductor memory device, characterized in that the oxide film is formed of a single layer. The method of claim 1, The double polysilicon layer comprises a first polysilicon layer formed by depositing undoped polysilicon or a lightly doped polysilicon and a second polysilicon layer formed by depositing a highly doped polysilicon. A capacitor charge storage electrode forming method of a semiconductor memory device. The method of claim 1, The method of claim 1, wherein the etch stop layer serves as a barrier when the oxide layer is removed. The method according to claim 1 and 4, When the oxide film has a two-layer structure, a method of forming a capacitor charge storage electrode of a semiconductor memory device, wherein the lower oxide film in the two-layer oxide film serves as a barrier when the oxide film is removed. The method according to claim 1 and 8, When the first polysilicon layer of the double polysilicon layer is made of undoped polysilicon, MPS is grown only on the second polysilicon layer heavily doped. The method according to claim 1 and 8, When the first polysilicon layer of the double polysilicon layer is made of low-doped polysilicon, the MPS is grown at a low rate in the low-doped first polysilicon layer compared to the high-doped second polysilicon layer. A method for forming a capacitor charge storage electrode of a semiconductor memory device, characterized in that. The method of claim 1, The method of forming a capacitor charge storage electrode of a semiconductor memory device, characterized in that the size of the MPS grown on the outer wall is smaller than the inner wall of the cylindrical charge storage electrode. The method of claim 1, MPS is grown on an inner wall of the cylindrical charge storage electrode, and MPS is not grown on an outer wall of the cylindrical charge storage electrode.