KR20010004956A - A GaAs-based P-HEMT having low noise and high gain characteristic - Google Patents

A GaAs-based P-HEMT having low noise and high gain characteristic Download PDF

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KR20010004956A
KR20010004956A KR1019990025734A KR19990025734A KR20010004956A KR 20010004956 A KR20010004956 A KR 20010004956A KR 1019990025734 A KR1019990025734 A KR 1019990025734A KR 19990025734 A KR19990025734 A KR 19990025734A KR 20010004956 A KR20010004956 A KR 20010004956A
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layer
gaas
hemt
mobility transistor
gasa
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Korean (ko)
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김병규
정윤하
정명남
윤찬의
김연수
한오형
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이계철
한국전기통신공사
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    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47CCHAIRS; SOFAS; BEDS
    • A47C27/00Spring, stuffed or fluid mattresses or cushions specially adapted for chairs, beds or sofas
    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47CCHAIRS; SOFAS; BEDS
    • A47C21/00Attachments for beds, e.g. sheet holders, bed-cover holders; Ventilating, cooling or heating means in connection with bedsteads or mattresses
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    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47CCHAIRS; SOFAS; BEDS
    • A47C27/00Spring, stuffed or fluid mattresses or cushions specially adapted for chairs, beds or sofas
    • A47C27/14Spring, stuffed or fluid mattresses or cushions specially adapted for chairs, beds or sofas with foamed material inlays
    • A47C27/15Spring, stuffed or fluid mattresses or cushions specially adapted for chairs, beds or sofas with foamed material inlays consisting of two or more layers
    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47CCHAIRS; SOFAS; BEDS
    • A47C27/00Spring, stuffed or fluid mattresses or cushions specially adapted for chairs, beds or sofas
    • A47C27/14Spring, stuffed or fluid mattresses or cushions specially adapted for chairs, beds or sofas with foamed material inlays
    • A47C27/16Spring, stuffed or fluid mattresses or cushions specially adapted for chairs, beds or sofas with foamed material inlays reinforced with sheet-like or rigid elements, e.g. profiled
    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47CCHAIRS; SOFAS; BEDS
    • A47C27/00Spring, stuffed or fluid mattresses or cushions specially adapted for chairs, beds or sofas
    • A47C27/14Spring, stuffed or fluid mattresses or cushions specially adapted for chairs, beds or sofas with foamed material inlays
    • A47C27/20Spring, stuffed or fluid mattresses or cushions specially adapted for chairs, beds or sofas with foamed material inlays with springs moulded in, or situated in cavities or openings in foamed material
    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61NELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
    • A61N5/00Radiation therapy
    • A61N5/06Radiation therapy using light
    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61NELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
    • A61N5/00Radiation therapy
    • A61N5/06Radiation therapy using light
    • A61N2005/0658Radiation therapy using light characterised by the wavelength of light used
    • A61N2005/0659Radiation therapy using light characterised by the wavelength of light used infrared
    • A61N2005/066Radiation therapy using light characterised by the wavelength of light used infrared far infrared

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Abstract

PURPOSE: A pseudo high electron mobility transistor of a GaSa series with low noise and high gain characteristic is provided to prevent the generation of DX-center and improve the efficiency of an electron supply layer. CONSTITUTION: A pseudo high electron mobility transistor of a GaSa series with low noise and high gain characteristic comprises the following structure. The pseudo high electron mobility transistor of a GaSa series comprises a super lattice layer(20), a buffer layer(21), a channel layer(22), an electron supply layer(23), and a cap layer(24). The electron supply layer(23) comprises a delta-doped GaAs layer. The electron supply layer further comprises the first AlxGa1-xAs layer(23a) provided on the channel layer(22), a GaSa layer(23b) provided on the first AlxGa1-xAs layer, a silicon-deltas doping layer inserted into the GaSa layer, and the second AlxGa1-xAs layer(23c) provided on the GaSa layer.

Description

저잡음 고이득 특성을 가진 갈륨아세나이드계 의사 고전자이동도 트랜지스터{A GaAs-based P-HEMT having low noise and high gain characteristic}GaAs-based P-HEMT having low noise and high gain characteristic

본 발명은 반도체 기술에 관한 것으로, 특히 갈륨아세나이드(GaAs)계 의사 고전자이동도 트랜지스터(Pseudo High Electron Mobility Transistor, P-HEMT)에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor technology, and more particularly to a GaAs-based pseudo high electron mobility transistor (Pseudo High Electron Mobility Transistor, P-HEMT).

P-HEMT는 개인용 휴대 통신시스템(IMT-2000), 위성 통신, 차량 자동항법 시스템, 무선 근거리 통신망과 같은 무선통신 시스템의 RF 송신부 초고주파 집적회로에 점차적으로 그 수요가 증대되고 있다.P-HEMT is increasingly demanded in the RF transmitter of the RF transmitter of the wireless communication system such as personal portable communication system (IMT-2000), satellite communication, vehicle automatic navigation system, wireless local area network.

저잡음 고이득 특성을 가지는 P-HEMT를 제작하기 위해 먼저 고려해야 할 부분이 에피 구조(Epi-structure)라 할 수 있다.In order to fabricate a P-HEMT with low noise and high gain characteristics, an epi-structure may be considered.

첨부된 도면 도 1은 종래기술에 따른 AlxGa1-xAs/InxGa1-xAs P-HEMT의 에피 구조를 도시한 것으로, 이하 이를 참조하여 설명한다.1 is a cross-sectional view illustrating an epitaxial structure of Al x Ga 1-x As / In x Ga 1-x As P-HEMT according to the related art, which will be described below.

종래기술에 따른 AlxGa1-xAs/InxGa1-xAs P-HEMT의 에피층은 도시된 바와 같이 AlGaAs/GaAs 초격자층(10), 진성-GaAs 버퍼층(11), 진성-InxGa1-xAs 채널층(12), 진성-AlxGa1-xAs 전자 공급층(13) 및 n+GaAs 캡층(14)이 적층된 구조를 가진다.The epitaxial layer of Al x Ga 1-x As / In x Ga 1-x As P-HEMT according to the prior art is AlGaAs / GaAs superlattice layer 10, intrinsic GaAs buffer layer 11, intrinsic- The In x Ga 1-x As channel layer 12, the intrinsic-Al x Ga 1-x As electron supply layer 13, and the n + GaAs cap layer 14 are stacked.

이러한 에피 구조를 가지는 종래의 P-HEMT에서, 이차원 전자밀도를 증가시키기 위하여 진성-AlxGa1-xAs 전자 공급층(13)을 이루는 알루미늄(Al)의 몰분율 x를 0.2 이상으로 증가시킬 경우, 깊은 트랩(DX center)이 발생하여 전자 공급층(13)의 효율이 떨어지는 문제점이 발생하게 된다.In the conventional P-HEMT having such an epi structure, in order to increase the two-dimensional electron density, when the mole fraction x of aluminum (Al) forming the intrinsic-Al x Ga 1-x As electron supply layer 13 is increased to 0.2 or more A deep trap (DX center) is generated, which causes a problem that the efficiency of the electron supply layer 13 is lowered.

본 발명은 이차원 전자밀도 증가를 위해 전자 공급층을 이루는 알루미늄의 몰분율(x)을 0.2 이상으로 증가시키고자 할 때 발생하는 깊은 트랩(DX center)의 발생을 방지할 수 있는 티형 게이트 구조의 갈륨아세나이드계 의사 고전자이동도 트랜지스터를 제공하는데 그 목적이 있다.The present invention provides a gallium acetate having a tee-type gate structure that can prevent the occurrence of a deep trap (DX center) generated when the mole fraction (x) of aluminum constituting the electron supply layer is increased to 0.2 or more to increase the two-dimensional electron density. The purpose of providing a ide-based pseudo classical mobility is also a transistor.

도 1은 종래기술에 따른 AlxGa1-xAs/InxGa1-xAs P-HEMT의 에피 구조도.1 is an epi structure diagram of Al x Ga 1-x As / In x Ga 1-x As P-HEMT according to the prior art.

도 2는 본 발명의 일 실시예에 따른 AlxGa1-xAs/InxGa1-xAs P-HEMT의 에피 구조도.Figure 2 is an epi structure diagram of Al x Ga 1-x As / In x Ga 1-x As P-HEMT according to an embodiment of the present invention.

도 3은 본 발명의 일 실시예에 따른 Al0.25Ga0.75As/In0.25Ga0.75As P-HEMT(0.25㎛×70㎛ 단위 T형 게이트)의 드레인-소오스 전압에 따른 전류 특성 곡선.3 is a current characteristic curve according to the drain-source voltage of Al 0.25 Ga 0.75 As / In 0.25 Ga 0.75 As P-HEMT (0.25 μm × 70 μm unit T-type gate) according to an embodiment of the present invention.

도 4는 본 발명의 일 실시예에 따른 Al0.25Ga0.75As/In0.25Ga0.75As P-HEMT(0.25㎛×70㎛ 단위 T형 게이트)의 게이트 전압에 따른 전달 컨덕턴스(transconductance)와 드레인 전류 특성 곡선.4 is a diagram illustrating transfer conductance and drain current characteristics according to a gate voltage of Al 0.25 Ga 0.75 As / In 0.25 Ga 0.75 As P-HEMT (0.25 μm × 70 μm unit T-type gate) according to an exemplary embodiment of the present invention. curve.

도 5는 본 발명의 일 실시예에 따른 Al0.25Ga0.75As/In0.25Ga0.75As P-HEMT(0.25㎛×70㎛ 단위 T형 게이트)의 차단 전류 이득과 최대 안정/가용 이득 특성 곡선.5 is a cut-off current gain and a maximum stable / available gain characteristic curve of Al 0.25 Ga 0.75 As / In 0.25 Ga 0.75 As P-HEMT (0.25 μm × 70 μm unit T-type gate) according to an embodiment of the present invention.

도 6은 본 발명의 일 실시예에 따른 Al0.25Ga0.75As/In0.25Ga0.75As P-HEMT(0.25㎛×70㎛ 단위 T형 게이트)의 주파수에 따른 최소잡음지수 및 관련이득 특성 곡선.6 is a graph of a minimum noise figure and an associated gain characteristic curve according to a frequency of Al 0.25 Ga 0.75 As / In 0.25 Ga 0.75 As P-HEMT (0.25 μm × 70 μm unit T-type gate) according to an embodiment of the present invention.

* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings

20 : AlGaAs/InGaAs 초격자층 21 : 진성-GaAs 버퍼층(21)20: AlGaAs / InGaAs superlattice layer 21: intrinsic-GaAs buffer layer 21

22 : 진성-In0.25Ga0.75As 채널층 23 : 전자 공급층22: intrinsic-In 0.25 Ga 0.75 As channel layer 23: electron supply layer

23a : 진성-Al0.25Ga0.75As 스페이서층 23b : 진성-GaAs층23a: Intrinsic-Al 0.25 Ga 0.75 As spacer layer 23b: Intrinsic-GaAs layer

23c : 진성-Al0.25Ga0.75As층 24 : n+GaAs 캡층23c: intrinsic-Al 0.25 Ga 0.75 As layer 24: n + GaAs cap layer

A : Si-델타 도핑층 B : 이차원 전자밀도A: Si-delta doped layer B: Two-dimensional electron density

상기의 기술적 과제를 달성하기 위한 본 발명은, 초격자층, 버퍼층, 채널층, 전자 공급층 및 캡층을 포함하는 에피층을 가진 갈륨아세나이드계 의사 고전자이동도 트랜지스터에 있어서, 상기 전자 공급층이, 실리콘이 델타 도핑된 GaAs층을 포함하여 이루어진 것을 특징으로 한다.The present invention for achieving the above technical problem, in the gallium arsenide-based pseudo high electron mobility transistor having an epi layer including a superlattice layer, a buffer layer, a channel layer, an electron supply layer and a cap layer, the electron supply layer This silicon is characterized in that it comprises a delta doped GaAs layer.

또한 본 발명은, 초격자층, 버퍼층, 채널층, 전자 공급층 및 캡층을 포함하는 에피층을 가진 갈륨아세나이드계 의사 고전자이동도 트랜지스터에 있어서, 상기 전자 공급층이, 상기 채널층 상에 제공되는 스페이서용 제1 AlxGa1-xAs층과, 상기 제1 AlxGa1-xAs층 상에 제공되는 GaAs층과, 상기 GaAs층에 삽입된 실리콘-델타 도핑층과, 상기 GaAs층 상에 제공되는 제2 AlxGa1-xAs층을 포함하여 이루어진 것을 특징으로 한다.The present invention also provides a gallium arsenide-based pseudo high electron mobility transistor having an epitaxial layer including a superlattice layer, a buffer layer, a channel layer, an electron supply layer, and a cap layer, wherein the electron supply layer is formed on the channel layer. A first Al x Ga 1-x As layer for a spacer provided, a GaAs layer provided on the first Al x Ga 1-x As layer, a silicon-delta doped layer inserted in the GaAs layer, and the GaAs And a second Al x Ga 1-x As layer provided on the layer.

또한, 상기 제1 및 제2 AlxGa1-xAs층에서, 상기 알루미늄(Al)의 몰분율(x)이 0.2보다 크게 하며, 바람직하게는 상기 알루미늄(Al)의 몰분율(x)을 실질적인 0.25로 한다.Further, in the first and second Al x Ga 1-x As layers, the mole fraction (x) of the aluminum (Al) is greater than 0.2, and preferably the mole fraction (x) of the aluminum (Al) is substantially 0.25. Shall be.

깊은 트랩(DX center)은 도우너 원자와 알루미늄 원자가 공존할 경우 발생하므로 이들 원자의 공간적인 분리로 그 문제를 해결할 수 있다. 즉, 본 발명은 Si-Al 결합생성에 따른 깊은 트랩 유기 현상을 최소화하면서 InxGa1-xAs 채널층 내의 이차원 전자밀도(2-DEG)를 극대화 시키기 위하여, AlxGa1-xAs 전자 공급층 내에 Si 델타-도핑된(Delta-doped) GaAs층을 삽입하였으며, 이로써 저잡음 고이득 특성을 가진 GaAs계 P-HEMT를 구현할 수 있다.Deep traps (DX centers) occur when donor atoms and aluminum atoms coexist, so the spatial separation of these atoms solves the problem. That is, the present invention provides Al x Ga 1-x As electrons in order to maximize the two-dimensional electron density (2-DEG) in the In x Ga 1-x As channel layer while minimizing the deep trap organic phenomenon caused by the Si-Al bond formation. A Si delta-doped GaAs layer was inserted into the supply layer, thereby realizing GaAs-based P-HEMT having low noise and high gain characteristics.

이하, 본 발명이 속한 기술분야에서 통상의 지식을 가진 자가 본 발명을 보다 용이하게 실시할 수 있도록 하기 위하여 본 발명의 바람직한 실시예를 소개하기로 한다.Hereinafter, preferred embodiments of the present invention will be introduced in order to enable those skilled in the art to more easily carry out the present invention.

첨부된 도면 도 2는 본 발명의 일 실시예에 따른 AlxGa1-xAs/InxGa1-xAs P-HEMT의 에피 구조를 도시한 것으로, 이하 이를 참조하여 설명한다.2 is a cross-sectional view illustrating an epitaxial structure of Al x Ga 1-x As / In x Ga 1-x As P-HEMT according to an embodiment of the present invention.

본 실시예에 따른 Al0.25Ga0.75As/In0.25Ga0.75As P-HEMT의 에피층은 도시된 바와 같이 AlGaAs/InGaAs 초격자층(20), 진성-GaAs 버퍼층(21), 진성-In0.25Ga0.75As 채널층(22), 진성-Al0.25Ga0.75As 스페이서층(23a), 진성-GaAs층(23b), 진성-Al0.25Ga0.75As층(23c) 및 n+GaAs 캡층(24)이 적층된 구조를 가지며, 진성-GaAs층(23b)에 Si-델타 도핑층(A)이 삽입되어 있다.According to the present embodiment Al 0.25 Ga 0.75 As / In 0.25 Ga 0.75 As epilayer of P-HEMT is AlGaAs / InGaAs super lattice layer 20, an intrinsic -GaAs buffer layer 21. As shown, the intrinsic -In 0.25 Ga 0.75 As channel layer 22, intrinsic-Al 0.25 Ga 0.75 As spacer layer 23a, intrinsic-GaAs layer 23b, intrinsic-Al 0.25 Ga 0.75 As layer 23c and n + GaAs cap layer 24 stacked Structure, and the Si-delta doping layer A is inserted in the intrinsic GaAs layer 23b.

이를 자세히 살펴보면, 우선 AlGaAs/GaAs 초격자층(20)은 에피구조의 안정화를 위한 구조이며, 진성-GaAs 버퍼층(21)은 버퍼 역할을 위해 약 1000Å 정도의 두께를 가진다. 진성-InGaAs 채널층(22)은 높은 전자이동도 및 이차원 전자밀도(B)를 위해서 In의 몰분율을 0.25로 하였으며, 그 두께는 임계두께를 고려하여 100Å으로 하였다.In detail, first, the AlGaAs / GaAs superlattice layer 20 is a structure for stabilizing the epi structure, and the intrinsic-GaAs buffer layer 21 has a thickness of about 1000 μs to serve as a buffer. The intrinsic-InGaAs channel layer 22 has a molar fraction of In of 0.25 for high electron mobility and two-dimensional electron density (B), and its thickness is 100 μs in consideration of the critical thickness.

본 발명에서는 특히 전자 공급층(23)을 약 70Å의 진성-Al0.25Ga0.75As 스페이서층(23a), 약 40Å의 진성-GaAs층(23b) 및 약 350Å의 진성-Al0.25Ga0.75As층(23c)으로 구성하였으며, 진성-GaAs층(23b)은 Si-델타 도핑(A)되어 있다.In particular, in the present invention, the electron supply layer 23 may be formed of an intrinsic-Al 0.25 Ga 0.75 As spacer layer 23a of about 70 GPa, an intrinsic GaAs layer 23b of about 40 GPa, and an intrinsic-Al 0.25 Ga 0.75 As layer of about 350 GPa 23c), and the intrinsic-GaAs layer 23b is Si-delta doped (A).

한편, n+GaAs 캡층은 소오스 저항을 줄이기 위해 2x1018/㎤ 이상의 농도로 도핑하여 200Å 두께로 형성하였다.On the other hand, n + GaAs cap layer was formed to a thickness of 200Å by doping at a concentration of 2x10 18 / cm 3 or more to reduce the source resistance.

상기와 같이 구성된 에피층을 가진 본 실시예의 Al0.25Ga0.75As/In0.25Ga0.75As P-HEMT(0.25㎛×70㎛ 단위 T형 게이트)는, 홀 측정(Hall Measurement)결과 전자 이동도가 7300㎠/V·s이고, 이차원 전자밀도는 1.8×1012/㎠로서 지금까지 발표된 GaAs계 P-HEMT 중 가장 좋은 결과를 기록했다.The Al 0.25 Ga 0.75 As / In 0.25 Ga 0.75 As P-HEMT (0.25 μm × 70 μm unit T-type gate) of the present embodiment having the epi layer configured as described above had a hole measurement result of electron mobility of 7300. It was cm 2 / V · s, and the two-dimensional electron density was 1.8 × 10 12 / cm 2, which was the best GaAs-based P-HEMT ever published.

첨부된 도면 도 3은 본 발명의 일 실시예에 따른 Al0.25Ga0.75As/In0.25Ga0.75As P-HEMT(0.25㎛×70㎛ 단위 T형 게이트)의 드레인-소오스 전압에 따른 전류 특성 곡선을 나타낸 것으로, 기존에 발표된 GaAs계 P-HEMT와 비교해서 우수한 전류 특성을 나타냄을 확인할 수 있다.3 is a graph illustrating a current characteristic curve according to a drain-source voltage of Al 0.25 Ga 0.75 As / In 0.25 Ga 0.75 As P-HEMT (0.25 μm × 70 μm unit T-type gate) according to an exemplary embodiment of the present invention. As shown, it can be seen that it shows excellent current characteristics compared to the previously published GaAs-based P-HEMT.

또한, 첨부된 도면 도 4는 본 발명의 일 실시예에 따른 Al0.25Ga0.75As/In0.25Ga0.75As P-HEMT(0.25㎛×70㎛ 단위 T형 게이트)의 게이트 전압에 따른 전달 컨덕턴스(transconductance)와 드레인 전류 특성 곡선을 나타낸 것으로, 최대 전달 컨덕턴스가 440mS/mm이고, 최대 드레인 전류밀도는 470mA/mm2로 같은 면적의 기존에 발표된 GaAs계 P-HEMT와 비교해서 우수한 특성을 얻을 수 있었다.In addition, Figure 4 is a transmission conductance (transconductance) according to the gate voltage of Al 0.25 Ga 0.75 As / In 0.25 Ga 0.75 As P-HEMT (0.25㎛ × 70㎛ unit T-type gate) according to an embodiment of the present invention ), And maximum drain conductance is 440mS / mm and maximum drain current density is 470mA / mm 2 , which is superior to that of GaAs-based P-HEMT. .

한편, 첨부된 도면 도 5는 본 발명의 일 실시예에 따른 Al0.25Ga0.75As/In0.25Ga0.75As P-HEMT(0.25㎛×70㎛ 단위 T형 게이트)의 차단 전류 이득과 최대 안정/가용 이득 특성 곡선을 나타낸 것으로, 전류이득 차단주파수는 65GHz, 전력 이득 차단주파수는 110GHz를 나타내고 있다.Meanwhile, FIG. 5 is a block current gain and maximum stability / availability of Al 0.25 Ga 0.75 As / In 0.25 Ga 0.75 As P-HEMT (0.25 μm × 70 μm unit T-type gate) according to an exemplary embodiment of the present invention. The gain characteristic curve is shown, with a current gain cutoff frequency of 65 GHz and a power gain cutoff frequency of 110 GHz.

또한, 첨부된 도면 도 6은 본 발명의 일 실시예에 따른 Al0.25Ga0.75As/In0.25Ga0.75As P-HEMT(0.25㎛×70㎛ 단위 T형 게이트)의 주파수에 따른 최소잡음지수 및 관련이득 특성 곡선을 도시한 것으로, 주파수가 9GHz에서 0.7dB의 특성으로 고이득과 낮은 잡음지수를 나타내고 있음을 확인할 수 있다.In addition, Figure 6 is a minimum noise index according to the frequency of Al 0.25 Ga 0.75 As / In 0.25 Ga 0.75 As P-HEMT (0.25㎛ × 70㎛ unit T-type gate) according to an embodiment of the present invention and related The gain characteristic curve is shown, and it can be seen that the frequency exhibits a high gain and a low noise figure with a characteristic of 0.7 dB at 9 GHz.

이상에서 설명한 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 치환, 변형 및 변경이 가능하다는 것이 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 있어 명백할 것이다.The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary knowledge.

예컨대, 전술한 실시예에서는 0.25㎛×70㎛ 단위 T형 게이트를 가지는 Al0.25Ga0.75As/In0.25Ga0.75As P-HEMT의 경우를 일례로 들어 설명하였으나, 본 발명은 GaAs계 P-HEMT의 에피 구조에 그 특징이 있는 것으로, 다른 게이트 구조를 가지더라도 적용될 수 있다.For example, in the above-described embodiment, the case of Al 0.25 Ga 0.75 As / In 0.25 Ga 0.75 As P-HEMT having a 0.25 μm × 70 μm unit T-type gate has been described as an example. The epi structure is characterized in that it can be applied even if it has a different gate structure.

전술한 본 발명은 Si-Al 결합생성에 따른 깊은 트랩 유기 현상을 최소화하면서 InxGa1-xAs 채널층 내의 이차원 전자밀도(2-DEG)를 극대화 시키는 효과가 있으며, 이로 인하여 저잡음 고이득 특성을 가진 GaAs계 P-HEMT를 구현할 수 있다.The present invention described above has the effect of maximizing the two-dimensional electron density (2-DEG) in the In x Ga 1-x As channel layer while minimizing the deep trap organic phenomena due to the Si-Al bond formation, thereby low noise and high gain characteristics. GaAs-based P-HEMT can be implemented.

Claims (4)

초격자층, 버퍼층, 채널층, 전자 공급층 및 캡층을 포함하는 에피층을 가진 갈륨아세나이드계 의사 고전자이동도 트랜지스터에 있어서,In a gallium arsenide-based pseudo high electron mobility transistor having an epi layer including a superlattice layer, a buffer layer, a channel layer, an electron supply layer, and a cap layer, 상기 전자 공급층이,The electron supply layer, 실리콘이 델타 도핑된 GaAs층을 포함하여 이루어진 것을 특징으로 하는 갈륨아세나이드계 의사 고전자이동도 트랜지스터.A gallium arsenide-based pseudo high electron mobility transistor comprising silicon delta-doped GaAs layer. 초격자층, 버퍼층, 채널층, 전자 공급층 및 캡층을 포함하는 에피층을 가진 갈륨아세나이드계 의사 고전자이동도 트랜지스터에 있어서,In a gallium arsenide-based pseudo high electron mobility transistor having an epi layer including a superlattice layer, a buffer layer, a channel layer, an electron supply layer, and a cap layer, 상기 전자 공급층이,The electron supply layer, 상기 채널층 상에 제공되는 스페이서용 제1 AlxGa1-xAs층과,A first Al x Ga 1-x As layer for spacers provided on the channel layer; 상기 제1 AlxGa1-xAs층 상에 제공되는 GaAs층과,A GaAs layer provided on the first Al x Ga 1-x As layer; 상기 GaAs층에 삽입된 실리콘-델타 도핑층과,A silicon-delta doped layer embedded in the GaAs layer, 상기 GaAs층 상에 제공되는 제2 AlxGa1-xAs층을 포함하여 이루어진 것을 특징으로 하는 갈륨아세나이드계 의사 고전자이동도 트랜지스터.A gallium arsenide-based pseudo high electron mobility transistor comprising a second Al x Ga 1-x As layer provided on the GaAs layer. 제2항에 있어서,The method of claim 2, 상기 제1 및 제2 AlxGa1-xAs층에서,In the first and second Al x Ga 1-x As layer, 상기 알루미늄(Al)의 몰분율(x)이 0.2보다 큰 것을 특징으로 하는 갈륨아세나이드계 의사 고전자이동도 트랜지스터.A gallium arsenide-based pseudo high mobility mobility transistor, wherein the molar fraction x of aluminum (Al) is greater than 0.2. 제2항에 있어서,The method of claim 2, 상기 제1 및 제2 AlxGa1-xAs층에서,In the first and second Al x Ga 1-x As layer, 상기 알루미늄(Al)의 몰분율(x)이 실질적인 0.25인 것을 특징으로 하는 갈륨아세나이드계 의사 고전자이동도 트랜지스터.A gallium arsenide-based pseudo high mobility mobility transistor, wherein the mole fraction x of aluminum (Al) is substantially 0.25.
KR1019990025734A 1999-06-30 1999-06-30 A GaAs-based P-HEMT having low noise and high gain characteristic KR20010004956A (en)

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Cited By (1)

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Publication number Priority date Publication date Assignee Title
KR100438895B1 (en) * 2001-12-28 2004-07-02 한국전자통신연구원 Pseudomorphic high electron mobility transistor power device and method for manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100438895B1 (en) * 2001-12-28 2004-07-02 한국전자통신연구원 Pseudomorphic high electron mobility transistor power device and method for manufacturing the same

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