KR20010003446A - Method for forming data line of liquid crystal display device - Google Patents
Method for forming data line of liquid crystal display device Download PDFInfo
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- KR20010003446A KR20010003446A KR1019990023743A KR19990023743A KR20010003446A KR 20010003446 A KR20010003446 A KR 20010003446A KR 1019990023743 A KR1019990023743 A KR 1019990023743A KR 19990023743 A KR19990023743 A KR 19990023743A KR 20010003446 A KR20010003446 A KR 20010003446A
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- molybdenum metal
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
Abstract
Description
본 발명은 액정표시소자의 제조방법에 관한 것으로, 특히, 몰리브덴 금속막을 이용한 데이터 라인 형성방법에 관한 것이다.The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a data line forming method using a molybdenum metal film.
텔레비젼 및 그래픽 디스플레이 등의 표시 장치에 이용되는 액정표시소자 (Liquid Crystal Display : 이하, LCD)는 CRT(Cathod-ray tube)를 대신하여 개발되어져 왔다. 특히, 매트릭스 형태로 배열된 각 화소마다 박막 트랜지스터(Thin Film Transistor : 이하, TFT)가 구비된 TFT LCD는 고속 응답 특성을 갖는 잇점과 고화소수에 적합하다는 잇점 때문에 CRT에 필적할만한 화면의 고화질화 및 대형화, 컬러화 등을 실현하는데 크게 기여하고 있다.Liquid crystal displays (hereinafter, LCDs) used in display devices such as televisions and graphic displays have been developed in place of the CRT (Cathod-ray tube). In particular, TFT LCDs equipped with thin film transistors (TFTs) for each pixel arranged in a matrix form have high-speed response characteristics and are suitable for high pixel counts, so that the screen quality comparable to CRTs is increased in size and size. It greatly contributes to realizing colorization.
이러한 TFT LCD는 일반적으로 TFT 및 화소전극이 구비된 하부기판과, 컬러필터 및 상대전극이 구비된 상부기판 및 상기 기판들 사이에 개재되는 액정층을 포함하여 이루어진다.Such a TFT LCD generally includes a lower substrate provided with a TFT and a pixel electrode, an upper substrate provided with a color filter and a counter electrode, and a liquid crystal layer interposed between the substrates.
도 1은 종래 TFT LCD의 하부기판을 개략적으로 도시한 평면도로서, 도시된 바와 같이, 게이트 라인들(2)과 데이터 라인들(4)이 수직·교차하게 배열되어 있고, 상기 게이트 라인들(2)과 데이터 라인들(4)에 의해 한정된 화소영역 내에는 ITO 금속막으로 이루어진 화소전극(6)이 배치되어 있으며, 상기 게이트 라인(2)과 데이터 라인(4)의 교차부에는 스위칭 소자인 TFT(10)가 구비되어 있다. 여기서, TFT(10)는 게이트 라인(2)의 일부분인 게이트 전극과, 패턴의 형태로 구비된 반도체층(8), 및 상기 반도체층(8)의 일측 및 타측 상부와 소정 부분 오버랩되게 배치된 소오스 및 드레인 전극(9a, 9b)을 포함하며, 상기 소오스 전극(9b)은 화소 전극(6)과 콘택되게 배치된다.FIG. 1 is a plan view schematically illustrating a lower substrate of a conventional TFT LCD. As shown in the drawing, gate lines 2 and data lines 4 are vertically and alternately arranged, and the gate lines 2 ) And a pixel electrode 6 made of an ITO metal film is arranged in the pixel region defined by the data lines 4, and a switching element TFT is formed at the intersection of the gate line 2 and the data line 4. (10) is provided. Here, the TFT 10 is disposed to overlap a predetermined portion with the gate electrode which is a part of the gate line 2, the semiconductor layer 8 provided in the form of a pattern, and one side and the other upper portion of the semiconductor layer 8. Source and drain electrodes 9a and 9b are included, and the source electrode 9b is disposed in contact with the pixel electrode 6.
상기와 같은 TFT LCD의 하부기판에서, 데이터 라인은 통상 전기전도도가 우수하고, 비교적 취급이 용이한 알루미늄 금속막으로 형성하고 있다. 그러나, 알루미늄 금속막은 상기한 장점을 갖고 있으나, 제조 공정의 단순화를 위하여 탑 ITO 구조를 채택하고 있는 현 실정에서, 알루미늄 금속막으로 데이터 라인을 형성할 경우에는 ITO 에천트로 인하여 데이터 라인의 오픈과 같은 결함이 발생하게 되는 문제점이 존재한다.In the lower substrate of the TFT LCD as described above, the data line is usually formed of an aluminum metal film having excellent electrical conductivity and relatively easy handling. However, the aluminum metal film has the above-described advantages, but in the present situation in which the top ITO structure is adopted to simplify the manufacturing process, when the data line is formed of the aluminum metal film, such as opening of the data line due to ITO etchant, There is a problem that causes a defect.
따라서, 최근에는 ITO 에천트에 대한 저항력이 우수한 몰리브덴 금속막으로 데이터 라인을 형성하는 방법이 제안되고 있으며, 이 방법에서 몰리브덴 금속막에 대한 식각은 과수(H2O2) 및 CH3COO(HN4)을 포함한 에천트 또는 알루미늄 에천트의 희석액을 이용한 습식 식각으로 수행하고 있다.Therefore, recently, a method of forming a data line with a molybdenum metal film having excellent resistance to ITO etchant has been proposed, and in this method, the etching of the molybdenum metal film is performed with fruit water (H 2 O 2 ) and CH 3 COO (HN). 4 ) It is performed by wet etching using a diluent of etchant or aluminum etchant.
그러나, 과수(H2O2) 및 암모늄 아세테이트(CH3COO(NH4))을 포함한 에천트를 이용하여 몰리브덴 금속막을 식각할 경우, 그 식각 균일성이 불량하기 때문에, 데이터 라인의 신뢰성이 저하되는 문제점이 있다. 즉, 도 2에 도시된 바와 같이, 상기 에천트로 몰리브덴 금속막을 식각할 경우에는 유리기판(11)의 중심부(Center Region : CR)와 가장자리부(Edge Region : ER)에서 몰리브덴 금속막의 식각 속도가 상이하기 때문에, 결과적으로, 각 영역들에서의 몰리브덴 금속막(12)의 식각 프로파일이 서로 다르게 된다. 그러므로, 몰리브덴 금속막으로 데이터 라인을 형성할 경우에는 그 신뢰성이 보장할 수 없게 된다.However, when the molybdenum metal film is etched using an etchant containing fruit tree (H 2 O 2 ) and ammonium acetate (CH 3 COO (NH 4 )), the etching uniformity is poor, so the reliability of the data line is lowered. There is a problem. That is, as shown in FIG. 2, when the molybdenum metal film is etched with the etchant, the etching rate of the molybdenum metal film is different in the center region (CR) and the edge region (ER) of the glass substrate 11. As a result, the etching profiles of the molybdenum metal film 12 in the respective regions are different from each other. Therefore, in the case of forming the data line with the molybdenum metal film, its reliability cannot be guaranteed.
따라서, 상기와 같은 문제점을 해결하기 위하여 안출된 본 발명은, 유리기판 중심부와 가장자리부에서의 몰리브덴 금속막의 식각 프로파일을 균일하게 만들 수 있는 LCD의 데이터 라인 형성방법을 제공하는데, 그 목적이 있다.Accordingly, an object of the present invention is to provide a method for forming a data line of an LCD capable of making the etching profile of the molybdenum metal film uniform at the center and the edge of a glass substrate.
도 1은 박막 트랜지스터 액정표시소자를 도시한 평면도.1 is a plan view showing a thin film transistor liquid crystal display device.
도 2는 종래 기술에 따라 식각된 유리기판의 중심부와 가장자리부에서의 몰리브덴 금속막의 식각 프로파일을 보여주는 도면.2 is a view showing an etching profile of a molybdenum metal film at the center and the edge of a glass substrate etched according to the prior art.
도 3은 본 발명의 실시예에 따라 식각된 유리기판의 중심부와 가장자리부에서의 몰리브덴 금속막의 식각 프로파일을 보여주는 도면.3 is a view showing an etching profile of a molybdenum metal film at the center and the edge of a glass substrate etched according to an embodiment of the present invention.
(도면의 주요 부분에 대한 부호의 설명)(Explanation of symbols for the main parts of the drawing)
21 : 유리기판 22 : 몰리브덴 금속막21 glass substrate 22 molybdenum metal film
상기와 같은 목적을 달성하기 위하여 본 발명이 LCD의 데이터 라인 형성방법 은, 몰리브덴 금속막으로 데이터 라인을 형성하는 LCD의 데이터 라인 형성방법에 있어서, 상기 몰리브덴 금속막에 대한 식각은 과수와, 암모늄 아세테이트, 초산(CH3COOH) 및 물의 혼합액을 이용한 습식 식각 공정으로 수행하는 것을 특징으로 한다.In order to achieve the above object, the present invention provides a method for forming a data line of a liquid crystal display (LCD) in which a data line is formed of a molybdenum metal film, wherein the etching of the molybdenum metal film is fruit tree and ammonium acetate. It is characterized in that it is carried out by a wet etching process using a mixture of acetic acid (CH 3 COOH) and water.
본 발명에 따르면, 과수 및 암모늄 아세테이트를 포함하는 에천트에 유리기판의 중심부에서 몰리브덴 금속막의 식각 속도를 감소시키는 초산(CH3COOH)을 첨가시킴으로써, 유리기판의 전체에 대해서, 식각 속도를 균일하게 만들 수 있으며, 이에 따라, 식각 균일성을 향상시킬 수 있다.According to the present invention, by adding acetic acid (CH 3 COOH) to reduce the etching rate of the molybdenum metal film at the center of the glass substrate to the etchant containing fruit tree and ammonium acetate, the etching rate is uniformly applied to the entire glass substrate. Can be made, thereby improving the etching uniformity.
이하, 본 발명의 바람직한 실시예를 첨부된 도면을 참조하여 보다 상세하게 설명하도록 한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 2는 본 발명의 실시예에 따라 식각된 몰리브덴 금속막의 식각 프로파일을 보여주는 단면도이다. 도시된 바와 같이, 몰리브덴 금속막(22)의 식각 프로파일은 유리기판(21)의 중심부(CR) 및 가장자리부(ER)에서 거의 유사하다.2 is a cross-sectional view illustrating an etching profile of a molybdenum metal film etched according to an embodiment of the present invention. As shown, the etching profile of the molybdenum metal film 22 is almost similar at the central portion CR and the edge portion ER of the glass substrate 21.
이와 같은 식각 프로파일을 갖도록 하기 위해서, 본 발명은 몰리브덴 금속막에 대한 식각 공정을 다음의 표 1과 같은 조성을 갖는 에천트로 수행한다.In order to have such an etching profile, the present invention performs an etching process for the molybdenum metal film with an etchant having the composition shown in Table 1 below.
상기 표 1에서, H2O2는 몰리브덴 금속막의 산화제, 즉, 실질적인 식각제이며, 그 반응식은 다음의 식 1과 같다.In Table 1, H 2 O 2 is an oxidant of the molybdenum metal film, that is, a substantial etchant, and the reaction formula is shown in Equation 1 below.
Mo + OH → MoO2------- (식 1)Mo + OH → MoO 2 ------- (Equation 1)
그리고, CH3COO(NH4)는 식각 메카니즘 측면에서 식각 속도에 대한 버퍼 역할을 하는 것으로서, 에천트 전체의 산도를 조절하는 기능을 한다.In addition, CH 3 COO (NH 4 ) serves as a buffer for the etching rate in terms of the etching mechanism, and controls the acidity of the entire etchant.
또한, 초산(CH3COOH)은 유기산으로써, 습식 식각시에 식각 프로파일을 개선시킴은 물론, 식각 균일성을 향상시키는 역할을 한다. 즉, 초산은 유리기판의 중심부에서 몰리브덴 금속막의 식각 속도가 저하되도록 하는 기능을 하는 것으로써, 유리기판의 전체에 대해서 그 중심부와 가장자리부에서 몰리브덴 금속막의 식각 속도가 균일하게 되도록 만드는 기능을 한다.In addition, acetic acid (CH 3 COOH) is an organic acid, and improves the etching profile as well as the etching uniformity during wet etching. That is, the acetic acid serves to lower the etching rate of the molybdenum metal film at the center of the glass substrate, thereby making the etching rate of the molybdenum metal film uniform at the center and the edge of the entire glass substrate.
본 발명에 따른 에천트를 사용하여 몰리브덴 금속막을 습식 식각하는 경우와, 종래의 에천트를 사용하여 몰리브덴 금속막을 식각하는 경우에서의 그 결과 데이터를 하기의 표 2에 도시하였다.The results of the wet etching of the molybdenum metal film using the etchant according to the present invention and the etching of the molybdenum metal film using the conventional etchant are shown in Table 2 below.
상기 표 2에서, 식각 속도는 유리기판의 전체에 대한 몰리브덴 금속막의 평균적인 식각 속도를 나타내는 것이고, 균일도는 유리기판의 중심부와 가장자리부간의 식각 정도의 차이를 나타낸다.In Table 2, the etching rate represents the average etching rate of the molybdenum metal film over the entire glass substrate, and the uniformity represents the difference in the degree of etching between the center portion and the edge portion of the glass substrate.
표 2와 같이, 본 발명의 실시예에서 적용된 에천트를 이용하여 몰리브덴 금속막에 대한 습식 식각 공정을 수행할 경우, 유리기판의 중심부와 가장자리부에서의 몰리브덴 금속막의 식각 프로파일은 동일하게 된다.As shown in Table 2, when the wet etching process for the molybdenum metal film is performed using the etchant applied in the embodiment of the present invention, the etching profile of the molybdenum metal film at the center and the edge of the glass substrate is the same.
따라서, 종래와 비교할 때, 본 발명에 따른 에천트를 이용할 경우에는 몰리브덴 금속막(22)의 식각 균일도를 향상시킬 수 있으며, 이에 따라, 몰리브덴 금속막으로 이루어진 데이터 라인의 신뢰성을 향상시킬 수 있게 된다.Therefore, when using the etchant according to the present invention, the etching uniformity of the molybdenum metal film 22 can be improved, and thus, the reliability of the data line made of the molybdenum metal film can be improved. .
이상에서와 같이, 본 발명은 과수와, 암모늄 아세테이트를 포함하는 에천트에 식각 속도의 버퍼 역할을 하는 초산을 첨가시킴으로써, 유리기판의 전체에 대해서 몰리브덴 금속막의 식각 균일성을 향상시킬 수 있고, 이에 따라, 몰리브덴 금속막으로 이루어진 데이터 라인에 대한 신뢰성을 향상시킬 수 있다.As described above, the present invention can improve the etching uniformity of the molybdenum metal film over the entire glass substrate by adding acetic acid serving as a buffer of etching rate to the fruit tree and the etchant containing ammonium acetate. Accordingly, the reliability of the data line made of the molybdenum metal film can be improved.
또한, 본 발명의 방법을 이용할 경우, ITO 에천트에 대한 저항력과, 보호막의 에천트인 BOE 용액에 대한 저항력이 높은 몰리브덴 금속막으로 데이터 라인을 형성할 수 있게 되기 때문에, 탑 ITO 구조에 매우 유리하게 적용시킬 수 있다.In addition, when the method of the present invention is used, a data line can be formed of a molybdenum metal film having high resistance to ITO etchant and resistance to BOE solution, which is an etchant of the protective film, which is very advantageous for the top ITO structure. Can be applied.
한편, 여기에서는 본 발명의 특정 실시예에 대하여 설명하고 도시하였지만, 당업자에 의하여 이에 대한 수정과 변형을 할 수 있다. 따라서, 이하, 특허청구의 범위는 본 발명의 진정한 사상과 범위에 속하는 한 모든 수정과 변형을 포함하는 것으로 이해할 수 있다.Meanwhile, although specific embodiments of the present invention have been described and illustrated, modifications and variations can be made by those skilled in the art. Accordingly, the following claims are to be understood as including all modifications and variations as long as they fall within the true spirit and scope of the present invention.
Claims (2)
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019990023743A KR20010003446A (en) | 1999-06-23 | 1999-06-23 | Method for forming data line of liquid crystal display device |
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| Application Number | Priority Date | Filing Date | Title |
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| KR1019990023743A KR20010003446A (en) | 1999-06-23 | 1999-06-23 | Method for forming data line of liquid crystal display device |
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| KR20010003446A true KR20010003446A (en) | 2001-01-15 |
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Cited By (3)
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|---|---|---|---|---|
| US7605091B2 (en) | 2004-11-03 | 2009-10-20 | Samsung Electronics Co., Ltd. | Etchant for conductive materials and method of manufacturing a thin film transistor array panel using the same |
| KR101009666B1 (en) * | 2003-12-30 | 2011-01-19 | 엘지디스플레이 주식회사 | Liquid Crystal Display Device and method for fabricating the same |
| CN108342734A (en) * | 2017-01-23 | 2018-07-31 | 东友精细化工有限公司 | The preparation method and array substrate of etchant, array substrate for display device |
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| JPH04372934A (en) * | 1991-06-24 | 1992-12-25 | Toshiba Corp | Manufacture of array substrate for liquid crystal display device |
| JPH09127555A (en) * | 1995-11-01 | 1997-05-16 | Sony Corp | Formation of laminated wiring |
| JPH09148586A (en) * | 1995-11-28 | 1997-06-06 | Sharp Corp | Thin film transistor and its manufacture |
| KR19990040842A (en) * | 1997-11-20 | 1999-06-15 | 윤종용 | Wiring for liquid crystal display device and manufacturing method therefor |
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| JPH04372934A (en) * | 1991-06-24 | 1992-12-25 | Toshiba Corp | Manufacture of array substrate for liquid crystal display device |
| JPH09127555A (en) * | 1995-11-01 | 1997-05-16 | Sony Corp | Formation of laminated wiring |
| JPH09148586A (en) * | 1995-11-28 | 1997-06-06 | Sharp Corp | Thin film transistor and its manufacture |
| KR19990040842A (en) * | 1997-11-20 | 1999-06-15 | 윤종용 | Wiring for liquid crystal display device and manufacturing method therefor |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR101009666B1 (en) * | 2003-12-30 | 2011-01-19 | 엘지디스플레이 주식회사 | Liquid Crystal Display Device and method for fabricating the same |
| US7605091B2 (en) | 2004-11-03 | 2009-10-20 | Samsung Electronics Co., Ltd. | Etchant for conductive materials and method of manufacturing a thin film transistor array panel using the same |
| CN108342734A (en) * | 2017-01-23 | 2018-07-31 | 东友精细化工有限公司 | The preparation method and array substrate of etchant, array substrate for display device |
| CN108342734B (en) * | 2017-01-23 | 2020-05-26 | 东友精细化工有限公司 | Etching solution composition, method for manufacturing array substrate for display device and array substrate |
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