KR20000060141A - An electroluminescent display and a fabricating method thereof - Google Patents

Abstract

PURPOSE: An electro luminescent display and a fabricating method thereof are provided to improve opening efficiency remarkably by allowing light generated from an EL(Electro Luminescent) layer to penetrate a transparent conductive layer only without passing an obstacle. CONSTITUTION: An EL part is formed by stacking a metal layer(39C) as cathode, an organic EL layer(39F) and a transparent conductive layer(39A) as anode in sequence. The metal layer(39C) is formed in each picture element so that it is independently formed in each picture element. The organic EL layer(39F) is independently formed in each picture element. The transparent conductive layer(39F) as anode is used as a common electrode, so it is formed across a substrate to cover each picture element. Light generated from the organic EL layer(39F) passes the transparent conductive layer(39A) and then is visible to the eye. Light generated from the organic EL layer(39F) does not pass other obstacles thereby enhancing photo efficiency and opening efficiency of an electro luminescent display.

Description

An electroluminescent display and a fabricating method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electroluminescent display (ELD), and more particularly, to an active thin film transistor-electroluminescent device (TFT-ELD) using a thin film transistor and an organic light emitting material.

ELD is a device that injects electrons and holes from the outside, recombines electrons and holes, generates excitation molecules, and emits light of these excitation molecules, which does not require a backlight, thereby reducing the thickness of the panel. As power consumption can be lowered relatively, attention is focused on the next generation display.

Especially. An organic ELD using an organic EL (ElectroLuminescence) material to form a light emitting layer, that is, an EL layer, requires (1) low voltage to emit an organic EL cell, (2) high luminous efficiency of the organic EL cell, and (3 ) It has the advantage of being able to proceed to low temperature manufacturing process.

1 shows a schematic equivalent circuit diagram of an active TFT-ELD.

The plurality of scanning lines 1 and the signal lines 2 intersect to form a plurality of pixel cells, and the power supply lines 3 are arranged in the same direction as the signal lines 2 in each pixel cell.

Each pixel cell has two TFTs (T1) (T2), a storage capacitor (CS), and an EL portion (EL). A feature of the ELD using two TFT (T1) (T2) is that the EL excitation signal and the scanning signal can be used separately. The EL portion EL is selected by the logic TFT1 (T1), and the excitation power of the EL portion EL is adjusted by the power of the TFT2 (T2). The storage capacitor CS functions to hold the excitation power of the EL portion of the selected cell.

FIG. 2 is a view for explaining a TFT-ELD according to the prior art, and schematically illustrates a cross-sectional structure of an EL portion, and a TFT and a storage capacitor portion connected to the EL portion.

A bottom gate type TFT and a storage capacitor are formed on the transparent insulating substrate 20, and the EL portion is electrically connected to the drain electrode 25D of the TFT.

In the TFT, a gate electrode 21G is formed on the transparent insulating substrate 20, and the gate insulating film 22 covers the gate electrode 21G. The semiconductor layer 23 and the impurity doped semiconductor layer 24 are formed on the gate insulating film 22, and the source electrode 25S and the drain electrode 25D are electrically connected to the semiconductor layer 23. It is.

In the storage capacitor, the first storage electrode 21C is formed on the transparent insulating substrate 20, and the gate insulating layer 22 covers the first storage electrode 21C. The second story electrode 25C is formed on the gate insulating film 22 corresponding to the first storage electrode 21C.

The protective film 26 covers the entire surface of the substrate in a state where the drain electrode 25D of the TFT is exposed.

An EL portion connected to the drain electrode 25D is formed on the protective film 26.

The EL portion is formed by sequentially stacking an anode transparent conductive layer 29A, an organic EL layer 29F and a cathode metal layer 29C on the protective film 26. Accordingly, light generated in the organic EL layer 29F is visible through the transparent conductive layer 29A and the transparent insulating substrate 20.

In the TFT-ELD according to the prior art, light generated in the organic EL layer passes through two or more layers of insulating films and may cause light loss while passing through the substrate. In addition, the scanning line, the signal line, the storage capacitor line, the power supply line, and the TFT region (see FIG. 1) block light so that the area through which the light passes is reduced, thereby reducing the aperture ratio.

SUMMARY OF THE INVENTION An object of the present invention is to provide a TFT-ELD and a method of manufacturing the same, which can solve the problems according to the prior art.

An object of the present invention is to provide a TFT-ELD having a high brightness and a high opening ratio and a manufacturing method thereof.

In order to achieve the above object, the present invention provides a substrate, a pixel cell defined by a scan line and a signal line on the substrate, a switching element formed in the pixel cell and electrically connected to the scan line and the signal line, and the switching. An electroluminescent device comprising a protective film covering an exposed front surface except for a portion of the device, and an EL portion connected to a portion of the exposed switching device, the EL portion being sequentially stacked on the protective film, the cathode layer, the organic light emitting layer, and the anode layer; To provide.

In addition, the present invention provides a process for preparing a substrate having a pixel cell defined by the scan line and the signal line, and a switching element formed in the pixel cell, and electrically connected to the scan line and the signal line, and a substrate excluding a part of the switching element. Forming a protective film covering the exposed entire surface of the substrate; forming a cathode layer connected to the exposed portion of the switching element on the protective film; forming an organic EL layer on the cathode layer; It provides a method of manufacturing an electroluminescent device comprising the step of forming an anode layer on the cathode layer.

1 is a schematic equivalent circuit diagram of a TFT-ELD

2 is a schematic cross-sectional view of a TFT-ELD according to the prior art.

3 is a schematic cross-sectional structure diagram of a TFT-ELD according to a first embodiment of the present invention;

4A through 4E are manufacturing process diagrams of the TFT-ELD shown in FIG.

5 is a schematic cross-sectional structure diagram of a TFT-ELD according to a second embodiment of the present invention;

6 is a schematic cross-sectional structure diagram of a TFT-ELD according to a third embodiment of the present invention;

Hereinafter, the present invention will be described with reference to the following examples and accompanying drawings.

The present invention is characterized in that, in the structure of the TFT-ELD, the light efficiency and the aperture ratio of the device are increased by changing the positions of the anode and the cathode.

As shown in the equivalent circuit diagram of FIG. 1, the TFT-ELD defines a plurality of pixel cells by crossing signal lines and scanning lines, and a powder supply line is positioned in each pixel cell, and is arranged in the same direction as the signal line. The pixel cell has two TFTs (T1) (T2), a storage capacitor (CS), and an EL portion (EL).

FIG. 3 is a view for explaining a TFT-ELD according to a first embodiment of the present invention, and schematically illustrates a cross-sectional structure of an EL portion, a TFT portion connected to the EL portion, and a storage capacitor portion.

A bottom gate type TFT and a storage capacitor are formed on the insulating substrate 300 with the gate electrode 31G disposed below, and an EL portion is connected to the drain electrode 35D of the TFT.

A gate electrode 31G is formed on the insulating substrate 300 in the TFT portion, and the gate insulating film 32 covers the gate electrode 31G. The semiconductor layer 33 and the impurity doped semiconductor layer 34 are formed on the gate insulating film 32, and the source electrode 35S and the drain electrode 35D are electrically connected to the semiconductor layer 33. It is. The structure is the same as that of a conventional bottom gate type TFT.

In the storage capacitor portion, the first storage electrode 31C is formed on the insulating substrate 300, and the gate insulating layer 32 covers the first storage electrode 31C. The second story electrode 35C is formed on the gate insulating layer 32 corresponding to the first storage electrode 31C.

The protective film 36 covers the entire surface of the substrate in a state where a part of the drain electrode 35D of the TFT is exposed.

On the protective film 36, an EL portion connected to the drain electrode 35D and the second storage electrode 35C is formed.

The EL portion is formed by sequentially laminating a cathode metal layer 39C, an organic EL layer 39F, and an anode transparent conductive layer 39A on the protective film 36. The cathode metal layer 39C is formed separately for each pixel cell so as to be formed independently in each pixel cell. The organic EL layer 39F is also formed separately for each pixel cell so as to be formed independently in each pixel cell. The transparent conductive layer 39F, which is an anode, which is an upper layer of the EL portion, is used as a common electrode, and thus is formed on the entire surface of the substrate so as to cover each pixel cell.

The organic EL layer 39F includes a hole injecting and transporting region in contact with the anode layer and an electron injecting and transporting region constituting the organic EL layer 39F.

The hole injection and transport region may be formed of a single material or multiple materials, and includes a hole injection region in contact with the anode layer and a hole transport region located between the hole injection region and the electron injection and transport region.

The electron injection and transport region may also be formed of a single material or multiple materials, and has an electron injection region in contact with the cathode and an electron transport region located between the electron injection region and the hole injection and transport region.

The recombination of electrons and holes causes light emission near the section of the hole injection and transport region and the electron injection and transport region.

In this way, the light generated in the organic EL layer 39F is visible through the transparent conductive layer 39A as an anode. In the TFT-ELD according to the present invention, a transparent conductive layer 39F, which is an anode, is positioned at the top of the substrate and is commonly formed on the entire surface of the substrate. Therefore, the light generated in the organic EL layer 39F and transmitted through the transparent conductive layer 39A does not pass through other obstacles, thereby improving the light efficiency and aperture ratio of the ELD element.

4A to 4E are views for explaining a method of manufacturing a TFT-ELD according to a first embodiment of the present invention, and show an example for manufacturing a cross-sectional structure of the device shown in FIG.

Referring to FIG. 4A, after forming the gate electrode 31G and the first electrode 31C of the storage capacitor on the insulating substrate 300, a gate insulating layer 32 covering the entire surface of the exposed substrate is deposited. Subsequently, the impurity semiconductor layer 34 doped with an impurity, which is an active region of the switching layer and the ohmic contact region located on the semiconductor layer 33, is formed on the gate insulating layer 32 on the gate electrode 31G. ).

The insulating substrate 300 may use a crystalline material such as quartz or glass.

The gate electrode 31G may be formed by depositing a conventional conductive layer on the insulating substrate 300 to a thickness of 2000 to 4000 micrometers, and then etching the photo. In this case, the first electrode 31C of the storage capacitor may be formed together.

The gate insulating film 32 may be formed by depositing a silicon oxide film or a silicon nitride film with a thickness of 3000 to 5000 microns through a conventional insulating film deposition technique.

The semiconductor layer 33 and the impurity semiconductor layer 34 are sequentially deposited on the gate insulating film 32 with an amorphous silicon layer and an impurity amorphous silicon layer at a thickness of 1500 to 2500 Å and 200 to 500 각각, respectively, followed by photolithography. Can be formed.

Referring to FIG. 4B, a storage capacitor corresponding to the source electrode 35S and the drain electrode 35D electrically connected to the impurity semiconductor layer 34 and the first electrode 31C of the storage capacitor is formed on the gate insulating layer 32. The second electrode 35C is formed. Subsequently, the exposed portion of the impurity semiconductor layer 34 is etched and removed using the source electrode 35S and the drain electrode 35D as a mask.

The source electrode 35S, the drain electrode 35D, and the second electrode 35C of the storage capacitor can be formed simultaneously by depositing a conventional conductive layer with a thickness of 1500 to 3000 m on the exposed entire surface of the substrate, and then photo-etching them. have.

Referring to FIG. 4C, after forming the passivation layer 36 covering the exposed entire surface of the substrate, the passivation layer 36 is photo-etched to expose the drain electrode 35D and a part of the second electrode 35C of the storage capacitor. Tone holes are formed respectively.

The protective film 36 can be formed by depositing a silicon oxide film or a silicon nitride film with a thickness of 2500 to 4000 microns through a conventional insulating film deposition technique.

Next, the cathode layer 39C of the organic EL portion connected to the drain electrode 35D and the second electrode 35C of the storage capacitor is formed on the protective film 36.

The cathode layer 39C may be formed by depositing a metal layer having a low work function, such as potassium, sodium, calcium, and lithium, on the exposed entire surface of the substrate at a thickness of 1500 to 2500Å, followed by photolithography. The cathode layer 39C connected to the drain electrode 35D is formed to be separated from each other in each pixel cell because the signal must be independently transmitted to each pixel cell.

Referring to Fig. 4D, an EL layer 39F covering the cathode layer 39C of the EL is formed in each pixel cell.

Since the EL layer 39F must operate independently for each pixel cell, it is formed separately from each other.

The EL layer 39F selectively selects a plurality of layers in each pixel cell using a shadow mask on a plurality of layers including a hole injection and transport layer and an electron injection and transport layer constituting the EL layer 39F. It can be formed using an appropriate method according to the manufacturing conditions, such as using a method of forming a sequential layer.

The EL layer 39F having a plurality of layers can be formed to a thickness of 700 to 1500 kPa.

Referring to Fig. 4E, a transparent conductive layer 39A which is an anode covering the entire surface of the substrate including the EL layer 39F formed in each pixel cell is formed. The transparent conductive layer 39A can be formed by depositing the transparent conductive layer on the entire surface of the substrate in a thickness of 700-1500 kV by a conventional transparent conductive layer deposition technique.

5 shows a schematic cross-sectional structure of a TFT-ELD according to a second embodiment of the present invention.

In the TFT-ELD according to the second embodiment of the present invention, when the protective film 56 positioned between the TFT portion and the EL portion is formed flat over the entire substrate, compared to the cross-sectional structure shown in the first embodiment of the present invention. to be. In this case, the passivation layer 56 may be formed to cover the exposed surface of the substrate evenly using a conventional organic material such as BenzoCycloButane (BCB) or Spin On Glass (SOG).

As described above, when the protective film 56 positioned at the lower end of the EL portion is formed flat, defects due to the step can be reduced during the subsequent process, for example, the process of forming the EL portion, and the signal lines and the power supply are provided. An organic film having a low dielectric constant is interposed on a line, so that a coupling effect that may occur between wirings can be reduced, so that a good image quality can be obtained.

FIG. 6 is a view for explaining a TFT-ELD according to a third embodiment of the present invention, and schematically illustrates a cross-sectional structure of an EL portion, a TFT portion connected to the EL portion, and a storage capacitor portion. In the third embodiment of the present invention, a coplanar TFT is adopted.

A storage capacitor formed by overlapping the top gate TFT and the power supply line 65 is formed on the insulating substrate 600 on which the buffer layer 60 is formed.

The TFT portion is formed of polycrystalline silicon on the insulating substrate 600, and is selectively doped with impurities to form an active layer 61 having a source region 61S and a drain region 61D, and a gate formed on the active layer 61. An insulating film 62 and a gate electrode 63 are provided, and a source electrode 67S connected to the source region 61S and a drain electrode 67D connected to the drain region 61D are provided. The power supply line 65 is connected to the source electrode 67S.

The storage capacitor portion is formed of polycrystalline silicon on the insulating substrate 600, and is formed of a first storage electrode 61C formed to have conductivity by being doped with impurities, a first insulating layer 64 covering the upper portion, and a first A portion of the powder supply line 65 overlapping the storage electrode 61C includes the second storage finger electrode.

The protective film 68 covers the exposed entire surface of the substrate, and an EL portion connected to the drain electrode 67D of the TFT is formed on the protective film 68. The EL portion is constituted of a structure in which a cathode metal layer 69C, an organic EL layer 69F, and an anode transparent conductive layer 69A are sequentially stacked on the protective film 68. The cathode metal layer 69C is separated for each pixel cell so as to be driven independently of each pixel cell. The organic EL layer 69F is also separated for each pixel cell so as to be driven independently of each pixel cell. The transparent conductive layer 69A, which is an anode, which is the upper layer of the EL portion, is used as a common electrode and is formed on the entire surface of the substrate to cover each pixel cell.

The light generated in the organic EL layer 69F by the above structure is visible through the transparent conductive layer 69A as an anode. In the TFT-ELD according to the present invention, a transparent conductive layer 69F, which is an anode, is positioned at the top of the substrate and is commonly formed on the entire surface of the substrate. Therefore, the light generated in the organic EL layer 69F and transmitted through the transparent conductive layer 69A does not pass through other obstacles, thereby improving the light efficiency and aperture ratio of the ELD element.

The manufacturing process of the TFT-ELD according to the third embodiment of the present invention is characterized in that the EL portion is formed by changing the deposition order and pattern formation of the cathode metal layer and the anode transparent conductive layer as compared with the conventional coplanar TFT. have. In addition, the forming process of the EL portion is as described with reference to Figs. 4C to 4E showing the manufacturing process of the TFT-ELD according to the first embodiment of the present invention.

The present invention provides an ELD having a structure in which an anode, a transparent conductive layer is positioned on the top of the substrate and is formed to cover the entire surface of the substrate. Therefore, since the light emitted from the organic EL layer passes through the transparent conductive layer and is immediately visible, the light generated from the organic EL layer passes through two or more layers of insulating films and passes through the substrate, resulting in light loss. Can be improved. Further, in the present invention, since the light generated in the EL layer passes through the transparent conductive layer only without passing through an obstacle, the aperture ratio can be significantly improved as compared with the prior art in which light is blocked in the wirings constituting the device.

Claims (10)

Substrate, A pixel cell defined by a scan line and a signal line on the substrate; A switching element formed in the pixel cell and electrically connected to the scan line and the signal line; A protective film covering an entire exposed surface of the switching device, And an EL portion connected to a part of the exposed switching element, the EL portion being sequentially stacked on the passivation layer, the cathode layer, the organic light emitting layer, and the anode layer. The method according to claim 1, The cathode layer is formed of a metal material having a low work function, such as potassium, sodium, calcium and lithium. The method according to claim 1, The anode layer is an electroluminescent device formed of a transparent conductive material. The method according to claim 1 to 3, And the TFTs have a bottom gate type structure. The method according to claim 1 to 3, The TFTs are electroluminescent devices having a coplanar structure. The method according to claim 1 to 3, The protective film is an electroluminescent device is formed so that the top is flat. The method according to claim 6, The protective film is an electroluminescent device formed of an organic material such as BCB or SOG. Providing a substrate including a pixel cell defined by a scan line and a signal line, and a switching element formed in the pixel cell and electrically connected to the scan line and the signal line; Forming a protective film covering an exposed entire surface of the substrate except for a part of the switching device; Forming a cathode layer on the passivation layer, the cathode layer being connected to an exposed portion of the switching element; Forming an organic EL layer on the cathode layer; The method of manufacturing an electroluminescent device comprising the step of forming an anode layer on the cathode layer. The method according to claim 8, The protective film is a manufacturing method of the electroluminescent device is formed so that the upper surface is flat. The method according to claim 8, The organic EL layer is a method of manufacturing an electroluminescent device using a shadow mask to selectively form a plurality of material layers constituting the organic EL layer in the pixel cell sequentially.