KR20000056163A - Program/erase method of non-volatile memory - Google Patents

Abstract

PURPOSE: A method for programming/erasing a non-volatile memory is provided to improve operation efficiency of the memory by performing programming/erasing operations of one cell or one array, and by performing programming/erasing operations of the other cell or the other array. CONSTITUTION: A method for programming/erasing a non-volatile memory comprises the steps of: when an erase controlling signal is generated, loading program data; and performing programming/erasing operations in a predetermined cell or a memory array, and performing programming/erasing operations for other predetermined cell or other memory array.

Description

Program / erase method of nonvolatile memory {PROGRAM / ERASE METHOD OF NON-VOLATILE MEMORY}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a program / erase method of a nonvolatile memory. In particular, the entire memory operation is performed by one cell or array performing a program or erase operation while the other cell or array also performs a program or erase operation. The present invention relates to a program / erase method of a nonvolatile memory to maximize efficiency.

1 is an exemplary view showing a configuration of a general nonvolatile memory. As shown in FIG. 1, first and second memories to which data is read or written, program means for programming data to the first and second memories, Erasing means for erasing predetermined data of said first and second memories, and a peripheral portion for enabling said program means and erasing means if necessary.

4 is a flowchart illustrating a program / erase method of a conventional nonvolatile memory. As shown in FIG. 4, when an erase control signal ES is generated, the erase operation of a predetermined cell or a memory array is performed. A first step of determining whether the ease operation is completed; When the erase operation is not completed as a result of the determination of the first step, the operation returns to the first step, and when the erase operation is completed, a second step of loading program data and performing a program operation is performed. The program and erase operations will be described.

First, if two memory cells in a nonvolatile memory are erased as shown in FIG. 2, and then new data is to be programmed, one of two cells is first erased by an erase control signal ES outputted from the erase means. Perform the ease operation.

Then, if one of the two cells is programmed with the program control signal PS generated by the program means, all the operations are completed.

Here, the two cells are sequentially erased and then program operations are sequentially performed again. After erasing one cell, the program operation may be performed immediately and the other cells may be erased and then programmed. The same memory array also operates in the same manner as above.

However, the prior art as described above has a problem in that the operation efficiency of the memory is deteriorated because the program and the erase operation cannot be performed simultaneously when programming or erasing the memory cell or the memory array.

Accordingly, the present invention devised in view of the above problems maximizes the overall memory operation efficiency by performing a program or erase operation while one cell or array performs a program or erase operation. It is an object of the present invention to provide a program / erase method of a nonvolatile memory.

1 is an exemplary view showing a configuration of a general nonvolatile memory.

FIG. 2 is an exemplary view showing program or erase data in a memory cell in FIG. 1; FIG.

FIG. 3 is an exemplary view showing program or erase data in a memory array in FIG. 1; FIG.

4 is an operation flowchart of a program / erase method of a conventional nonvolatile memory.

Fig. 5 is an operational flowchart of the program / erase method of the present invention nonvolatile memory.

The present invention for achieving the above object comprises a first step of loading the program data at the same time the erasure control signal is generated; A second step of performing a program operation or an erase operation on a predetermined cell and at the same time performing an erase operation or a program operation on another predetermined cell.

Hereinafter, operations and effects of the program / erase method of the present invention nonvolatile memory will be described in detail with reference to the accompanying drawings.

Fig. 5 is an operational flowchart of the program / erase method of the nonvolatile memory of the present invention, as shown in Fig. 1, wherein the erasure control signal ES is generated and at the same time the program data is loaded; A second step of performing a program operation or an erase operation on a predetermined cell and at the same time performing an erase operation or a program operation on another predetermined cell. The operation of the present invention will be described with reference to FIGS. 1 and 2. do.

First, when a memory cell or a memory array has a program means and an erase means, respectively, the operation of programming or erasing another memory cell or memory array while simultaneously performing a program operation is performed by one memory cell or a memory array. In addition, when the erase operation is performed on one memory cell or memory array, the other memory cell or memory array is simultaneously programmed or erased.

In this way, memory operation efficiency can be increased by performing two identical or different operations at the same time.

In other words, referring to Fig. 1, one cell starts to perform a program operation by generating a program control signal PS by the program means to program one cell.

At this time, the other cell can perform a program operation or an erase operation. That is, when the program means operates to generate the program control signal PS, the cell is programmed or the erase means operate to erase the signal. Cell can be erased.

In other words, while one cell performs a program operation, the other cell may be programmed or erased.

In addition, one cell performs an erase operation by the erase control signal ES generated by the erase means, and at the same time, another cell is programmed or erased by the program control signal PS generated by the program means. The erase control signal ES generated by the erase means is erased, that is, while one cell performs the erase operation, the other one can be programmed or perform the erase operation.

If one cell starts to perform the erase operation by the erase control signal of the erase means, and at the same time the other cell is programmed or erased by the program control signal PS of the program means. Erased by the control signal, that is, one cell may perform the erase operation and simultaneously program or erase the other cell.

In addition, as shown in FIG. 2, the memory array operation may perform a program or erase operation with the other memory array while one memory array performs a program or erase operation.

As described in detail above, the present invention has an effect of improving memory operating efficiency by performing a program or erase operation on one cell or an array and a program or erase operation on another cell or an array. .

Claims (1)

A first step of loading program data simultaneously with the generation of the erase control signal; Performing a program operation or erase operation on a predetermined cell or memory array and performing a second operation of performing an erase operation or a program operation on another predetermined cell or memory array; Izu method.